From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16914058883730.35503330727476623; Mon, 7 Aug 2023 03:58:08 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qSxvG-0008Vy-B9; Mon, 07 Aug 2023 06:57:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qSxv8-0008VJ-SX; Mon, 07 Aug 2023 06:57:06 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qSxv6-0001ya-2F; Mon, 07 Aug 2023 06:57:06 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 1E12518A48; Mon, 7 Aug 2023 13:57:01 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id AF44E1BFA3; Mon, 7 Aug 2023 13:56:59 +0300 (MSK) Received: (nullmailer pid 206304 invoked by uid 1000); Mon, 07 Aug 2023 10:56:59 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-trivial@nongnu.org, BALATON Zoltan , Michael Tokarev Subject: [PATCH trivial for-8.1 1/3] hw/i2c: Fix bitbang_i2c_data trace event Date: Mon, 7 Aug 2023 13:56:49 +0300 Message-Id: <8ada214a902225c90583b644cabd85bc89bf188c.1691405748.git.mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1691405891077100005 Content-Type: text/plain; charset="utf-8" From: BALATON Zoltan The clock and data values were logged swapped. Correct the trace event text to match what is logged. Also fix a typo in a comment nearby. Signed-off-by: BALATON Zoltan Signed-off-by: Michael Tokarev --- hw/i2c/bitbang_i2c.c | 2 +- hw/i2c/trace-events | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/i2c/bitbang_i2c.c b/hw/i2c/bitbang_i2c.c index bb18954765..de5f5aacf5 100644 --- a/hw/i2c/bitbang_i2c.c +++ b/hw/i2c/bitbang_i2c.c @@ -70,7 +70,7 @@ static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, in= t level) return level & i2c->last_data; } =20 -/* Leave device data pin unodified. */ +/* Leave device data pin unmodified. */ static int bitbang_i2c_nop(bitbang_i2c_interface *i2c) { return bitbang_i2c_ret(i2c, i2c->device_out); diff --git a/hw/i2c/trace-events b/hw/i2c/trace-events index 8e88aa24c1..d7b1e25858 100644 --- a/hw/i2c/trace-events +++ b/hw/i2c/trace-events @@ -5,7 +5,7 @@ bitbang_i2c_state(const char *old_state, const char *new_st= ate) "state %s -> %s" bitbang_i2c_addr(uint8_t addr) "Address 0x%02x" bitbang_i2c_send(uint8_t byte) "TX byte 0x%02x" bitbang_i2c_recv(uint8_t byte) "RX byte 0x%02x" -bitbang_i2c_data(unsigned dat, unsigned clk, unsigned old_out, unsigned ne= w_out) "dat %u clk %u out %u -> %u" +bitbang_i2c_data(unsigned clk, unsigned dat, unsigned old_out, unsigned ne= w_out) "clk %u dat %u out %u -> %u" =20 # core.c =20 --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1691405888302352.87130474593494; Mon, 7 Aug 2023 03:58:08 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qSxvI-00009a-CW; Mon, 07 Aug 2023 06:57:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qSxvA-0008W8-Un; Mon, 07 Aug 2023 06:57:14 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qSxv9-0001zE-EI; Mon, 07 Aug 2023 06:57:08 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 4762818A49; Mon, 7 Aug 2023 13:57:01 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id D83FF1BFA4; Mon, 7 Aug 2023 13:56:59 +0300 (MSK) Received: (nullmailer pid 206307 invoked by uid 1000); Mon, 07 Aug 2023 10:56:59 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-trivial@nongnu.org, Michael Tokarev Subject: [PATCH trivial for-8.1 2/3] stubs/colo.c: spelling Date: Mon, 7 Aug 2023 13:56:50 +0300 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1691405890008100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- stubs/colo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/stubs/colo.c b/stubs/colo.c index f33379d0fd..08c9f982d5 100644 --- a/stubs/colo.c +++ b/stubs/colo.c @@ -21,7 +21,7 @@ void colo_checkpoint_delay_set(void) =20 void migrate_start_colo_process(MigrationState *s) { - error_report("Impossible happend: trying to start COLO when COLO " + error_report("Impossible happened: trying to start COLO when COLO " "module is not built in"); abort(); } --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 169277008865015.615920905532562; Tue, 22 Aug 2023 22:54:48 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgn2-0001K3-DB; Wed, 23 Aug 2023 01:52:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgmx-0001IQ-Ac for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:19 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgmt-0007J3-01 for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:17 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 22B3C1C38D for ; Wed, 23 Aug 2023 08:52:19 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id B68BB21235; Wed, 23 Aug 2023 08:52:00 +0300 (MSK) Received: (nullmailer pid 1917453 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 02/24] bsd-user: spelling fixes Date: Wed, 23 Aug 2023 08:51:31 +0300 Message-Id: <20230823055155.1917375-3-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770089965100009 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- bsd-user/errno_defs.h | 2 +- bsd-user/freebsd/target_os_siginfo.h | 2 +- bsd-user/freebsd/target_os_stack.h | 4 ++-- bsd-user/freebsd/target_os_user.h | 2 +- bsd-user/qemu.h | 2 +- bsd-user/signal-common.h | 4 ++-- bsd-user/signal.c | 6 +++--- 7 files changed, 11 insertions(+), 11 deletions(-) diff --git a/bsd-user/errno_defs.h b/bsd-user/errno_defs.h index f3e8ac3488..abe70119d9 100644 --- a/bsd-user/errno_defs.h +++ b/bsd-user/errno_defs.h @@ -150,5 +150,5 @@ =20 /* Internal errors: */ -#define TARGET_EJUSTRETURN 254 /* Just return without mod= ifing regs */ +#define TARGET_EJUSTRETURN 254 /* Just return without mod= ifying regs */ #define TARGET_ERESTART 255 /* Restart syscall */ =20 diff --git a/bsd-user/freebsd/target_os_siginfo.h b/bsd-user/freebsd/target= _os_siginfo.h index 4573738752..6c282d8502 100644 --- a/bsd-user/freebsd/target_os_siginfo.h +++ b/bsd-user/freebsd/target_os_siginfo.h @@ -73,5 +73,5 @@ typedef struct target_siginfo { } _mesgp; =20 - /* SIGPOLL -- Not really genreated in FreeBSD ??? */ + /* SIGPOLL -- Not really generated in FreeBSD ??? */ struct { int _band; /* POLL_IN, POLL_OUT, POLL_MSG */ diff --git a/bsd-user/freebsd/target_os_stack.h b/bsd-user/freebsd/target_o= s_stack.h index 0590133291..d15fc3263f 100644 --- a/bsd-user/freebsd/target_os_stack.h +++ b/bsd-user/freebsd/target_os_stack.h @@ -26,5 +26,5 @@ =20 /* - * The inital FreeBSD stack is as follows: + * The initial FreeBSD stack is as follows: * (see kern/kern_exec.c exec_copyout_strings() ) * @@ -60,5 +60,5 @@ static inline int setup_initial_stack(struct bsd_binprm *= bprm, p -=3D sizeof(struct target_ps_strings); =20 - /* Add machine depedent sigcode. */ + /* Add machine dependent sigcode. */ p -=3D TARGET_SZSIGCODE; if (setup_sigtramp(p, (unsigned)offsetof(struct target_sigframe, sf_uc= ), diff --git a/bsd-user/freebsd/target_os_user.h b/bsd-user/freebsd/target_os= _user.h index f036a32343..1ca7b5ab17 100644 --- a/bsd-user/freebsd/target_os_user.h +++ b/bsd-user/freebsd/target_os_user.h @@ -27,5 +27,5 @@ struct target_priority { uint8_t pri_class; /* Scheduling class. */ uint8_t pri_level; /* Normal priority level. */ - uint8_t pri_native; /* Priority before propogation. */ + uint8_t pri_native; /* Priority before propagation. */ uint8_t pri_user; /* User priority based on p_cpu and p_nice= . */ }; diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h index 8f2d6a3c78..470d0337d5 100644 --- a/bsd-user/qemu.h +++ b/bsd-user/qemu.h @@ -119,5 +119,5 @@ extern const char *qemu_uname_release; * TARGET_ARG_MAX defines the number of bytes allocated for arguments * and envelope for the new program. 256k should suffice for a reasonable - * maxiumum env+arg in 32-bit environments, bump it up to 512k for !ILP32 + * maximum env+arg in 32-bit environments, bump it up to 512k for !ILP32 * platforms. */ diff --git a/bsd-user/signal-common.h b/bsd-user/signal-common.h index 6f90345bb2..c044e81165 100644 --- a/bsd-user/signal-common.h +++ b/bsd-user/signal-common.h @@ -50,9 +50,9 @@ void target_to_host_sigset(sigset_t *d, const target_sigs= et_t *s); * host_to_target_siginfo_noswap() and tswap_siginfo(); it does not appear * either within host siginfo_t or in target_siginfo structures which we g= et - * from the guest userspace program. Linux kenrels use this internally, bu= t BSD + * from the guest userspace program. Linux kernels use this internally, bu= t BSD * kernels don't do this, but its a useful abstraction. * * The linux-user version of this uses the top 16 bits, but FreeBSD's SI_U= SER - * and other signal indepenent SI_ codes have bit 16 set, so we only use t= he top + * and other signal independent SI_ codes have bit 16 set, so we only use = the top * byte instead. * diff --git a/bsd-user/signal.c b/bsd-user/signal.c index f4e078ee1d..6e77dd0b4d 100644 --- a/bsd-user/signal.c +++ b/bsd-user/signal.c @@ -45,5 +45,5 @@ static inline int sas_ss_flags(TaskState *ts, unsigned lo= ng sp) =20 /* - * The BSD ABIs use the same singal numbers across all the CPU architectur= es, so + * The BSD ABIs use the same signal numbers across all the CPU architectur= es, so * (unlike Linux) these functions are just the identity mapping. This migh= t not * be true for XyzBSD running on AbcBSD, which doesn't currently work. @@ -242,5 +242,5 @@ static inline void host_to_target_siginfo_noswap(target= _siginfo_t *tinfo, /* * Unsure that this can actually be generated, and our support for - * capsicum is somewhere between weak and non-existant, but if we = get + * capsicum is somewhere between weak and non-existent, but if we = get * one, then we know what to save. */ @@ -320,5 +320,5 @@ int block_signals(void) * It's OK to block everything including SIGSEGV, because we won't run= any * further guest code before unblocking signals in - * process_pending_signals(). We depend on the FreeBSD behaivor here w= here + * process_pending_signals(). We depend on the FreeBSD behavior here w= here * this will only affect this thread's signal mask. We don't use * pthread_sigmask which might seem more correct because that routine = also --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1691405902147927.6493742077764; Mon, 7 Aug 2023 03:58:22 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qSxvH-000093-3K; Mon, 07 Aug 2023 06:57:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qSxvB-00004r-QA; Mon, 07 Aug 2023 06:57:14 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qSxvA-0001zg-5u; Mon, 07 Aug 2023 06:57:09 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 6D92D18A4A; Mon, 7 Aug 2023 13:57:01 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 0ECCC1BFA5; Mon, 7 Aug 2023 13:57:00 +0300 (MSK) Received: (nullmailer pid 206310 invoked by uid 1000); Mon, 07 Aug 2023 10:56:59 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-trivial@nongnu.org, Luca Bonissi , Thomas Huth , Michael Tokarev Subject: [PATCH trivial for-8.1 3/3] Fixed incorrect LLONG alignment for openrisc and cris Date: Mon, 7 Aug 2023 13:56:51 +0300 Message-Id: <6ee960823da8fd780ae9912c4327b7e85e80d846.1691405748.git.mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1691405904526100001 Content-Type: text/plain; charset="utf-8" From: Luca Bonissi OpenRISC (or1k) has long long alignment to 4 bytes, but currently not defined in abitypes.h. This lead to incorrect packing of /epoll_event/ structure and eventually infinite loop while waiting for file descriptor[s] event[s]. Fixed also CRIS alignments (1 byte for all types). Signed-off-by: Luca Bonissi Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1770 Reviewed-by: Thomas Huth Signed-off-by: Michael Tokarev --- include/exec/user/abitypes.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/exec/user/abitypes.h b/include/exec/user/abitypes.h index 6191ce9f74..6178453d94 100644 --- a/include/exec/user/abitypes.h +++ b/include/exec/user/abitypes.h @@ -15,8 +15,16 @@ #define ABI_LLONG_ALIGNMENT 2 #endif =20 +#ifdef TARGET_CRIS +#define ABI_SHORT_ALIGNMENT 1 +#define ABI_INT_ALIGNMENT 1 +#define ABI_LONG_ALIGNMENT 1 +#define ABI_LLONG_ALIGNMENT 1 +#endif + #if (defined(TARGET_I386) && !defined(TARGET_X86_64)) \ || defined(TARGET_SH4) \ + || defined(TARGET_OPENRISC) \ || defined(TARGET_MICROBLAZE) \ || defined(TARGET_NIOS2) #define ABI_LLONG_ALIGNMENT 4 --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692769987572432.49235119563673; Tue, 22 Aug 2023 22:53:07 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgn4-0001Og-DZ; Wed, 23 Aug 2023 01:52:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgn1-0001MR-T0 for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:24 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgmy-0007K1-N6 for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:22 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id A9B8C1C390 for ; Wed, 23 Aug 2023 08:52:19 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 5013821238; Wed, 23 Aug 2023 08:52:01 +0300 (MSK) Received: (nullmailer pid 1917462 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 03/24] ui: spelling fixes Date: Wed, 23 Aug 2023 08:51:34 +0300 Message-Id: <20230823055155.1917375-4-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692769990892100009 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- ui/cocoa.m | 2 +- ui/keymaps.h | 2 +- ui/sdl2-2d.c | 2 +- ui/sdl2.c | 2 +- ui/vnc-enc-zrle.c.inc | 2 +- ui/vnc-enc-zywrle.h | 4 ++-- 6 files changed, 7 insertions(+), 7 deletions(-) diff --git a/ui/cocoa.m b/ui/cocoa.m index 0c2153d17c..4d8989c4eb 100644 --- a/ui/cocoa.m +++ b/ui/cocoa.m @@ -2046,5 +2046,5 @@ static void cocoa_display_init(DisplayState *ds, Disp= layOptions *opts) /* * Create the menu entries which depend on QEMU state (for consoles - * and removeable devices). These make calls back into QEMU functions, + * and removable devices). These make calls back into QEMU functions, * which is OK because at this point we know that the second thread * holds the iothread lock and is synchronously waiting for us to diff --git a/ui/keymaps.h b/ui/keymaps.h index 6473405485..3d52c0882a 100644 --- a/ui/keymaps.h +++ b/ui/keymaps.h @@ -45,5 +45,5 @@ typedef struct { #define SCANCODE_UP 0x80 =20 -/* Additional modifiers to use if not catched another way. */ +/* Additional modifiers to use if not caught another way. */ #define SCANCODE_SHIFT 0x100 #define SCANCODE_CTRL 0x200 diff --git a/ui/sdl2-2d.c b/ui/sdl2-2d.c index bfebbdeaea..06468cd493 100644 --- a/ui/sdl2-2d.c +++ b/ui/sdl2-2d.c @@ -151,5 +151,5 @@ bool sdl2_2d_check_format(DisplayChangeListener *dcl, /* * We let SDL convert for us a few more formats than, - * the native ones. Thes are the ones I have tested. + * the native ones. These are the ones I have tested. */ return (format =3D=3D PIXMAN_x8r8g8b8 || diff --git a/ui/sdl2.c b/ui/sdl2.c index 0d91b555e3..ea4a92cd36 100644 --- a/ui/sdl2.c +++ b/ui/sdl2.c @@ -861,5 +861,5 @@ static void sdl2_display_init(DisplayState *ds, Display= Options *o) #endif #ifndef CONFIG_WIN32 - /* QEMU uses its own low level keyboard hook procecure on Windows */ + /* QEMU uses its own low level keyboard hook procedure on Windows */ SDL_SetHint(SDL_HINT_GRAB_KEYBOARD, "1"); #endif diff --git a/ui/vnc-enc-zrle.c.inc b/ui/vnc-enc-zrle.c.inc index c107d8affc..a8ca37d05e 100644 --- a/ui/vnc-enc-zrle.c.inc +++ b/ui/vnc-enc-zrle.c.inc @@ -111,5 +111,5 @@ static void ZRLE_ENCODE_TILE(VncState *vs, ZRLE_PIXEL *= data, int w, int h, *end =3D ~*(end-1); /* one past the end is different so the while loop= ends */ =20 - /* Real limit is 127 but we wan't a way to know if there is more than = 127 */ + /* Real limit is 127 but we want a way to know if there is more than 1= 27 */ palette_init(palette, 256, ZRLE_BPP); =20 diff --git a/ui/vnc-enc-zywrle.h b/ui/vnc-enc-zywrle.h index e661ec117d..64fbc90ee7 100644 --- a/ui/vnc-enc-zywrle.h +++ b/ui/vnc-enc-zywrle.h @@ -486,5 +486,5 @@ static inline void wavelet(int *buf, int width, int hei= ght, int level) /* RGB <=3D> YUV conversion stuffs. - YUV coversion is explained as following formula in strict meaning: + YUV conversion is explained as following formula in strict meaning: Y =3D 0.299R + 0.587G + 0.114B ( 0<=3DY<=3D255) U =3D -0.169R - 0.331G + 0.500B (-128<=3DU<=3D127) @@ -540,5 +540,5 @@ static inline void wavelet(int *buf, int width, int hei= ght, int level) =20 So, we must transfer each sub images individually in strict meaning. - But at least ZRLE meaning, following one decompositon image is same as + But at least ZRLE meaning, following one decomposition image is same as avobe individual sub image. I use this format. (Strictly saying, transfer order is reverse(Hxy->Hy->Hx->L) --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692769987459260.89499743754357; Tue, 22 Aug 2023 22:53:07 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgnD-0001Ry-H5; Wed, 23 Aug 2023 01:52:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgn7-0001QF-EP for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:30 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgn3-0007KT-5d for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:28 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id E00041C391 for ; Wed, 23 Aug 2023 08:52:19 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 7DD3221239; Wed, 23 Aug 2023 08:52:01 +0300 (MSK) Received: (nullmailer pid 1917465 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 04/24] util: spelling fixes Date: Wed, 23 Aug 2023 08:51:35 +0300 Message-Id: <20230823055155.1917375-5-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692769990970100012 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- util/cpuinfo-aarch64.c | 4 ++-- util/cpuinfo-i386.c | 4 ++-- util/cpuinfo-ppc.c | 2 +- util/main-loop.c | 2 +- util/oslib-posix.c | 2 +- util/qdist.c | 2 +- util/qemu-sockets.c | 2 +- util/rcu.c | 2 +- 8 files changed, 10 insertions(+), 10 deletions(-) diff --git a/util/cpuinfo-aarch64.c b/util/cpuinfo-aarch64.c index ababc39550..7d39f47e3b 100644 --- a/util/cpuinfo-aarch64.c +++ b/util/cpuinfo-aarch64.c @@ -1,5 +1,5 @@ /* * SPDX-License-Identifier: GPL-2.0-or-later - * Host specific cpu indentification for AArch64. + * Host specific cpu identification for AArch64. */ =20 @@ -34,5 +34,5 @@ static bool sysctl_for_bool(const char *name) * We might in the future ask for properties not present in older kern= els, * but we're only asking about static properties, all of which should = be - * 'int'. So we shouln't see ENOMEM (val too small), or any of the ot= her + * 'int'. So we shouldn't see ENOMEM (val too small), or any of the o= ther * more exotic errors. */ diff --git a/util/cpuinfo-i386.c b/util/cpuinfo-i386.c index 3a7b7e0ad1..b2ed65bb10 100644 --- a/util/cpuinfo-i386.c +++ b/util/cpuinfo-i386.c @@ -1,5 +1,5 @@ /* * SPDX-License-Identifier: GPL-2.0-or-later - * Host specific cpu indentification for x86. + * Host specific cpu identification for x86. */ =20 @@ -75,5 +75,5 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) * * AMD has provided an even stronger guarantee that proces= sors - * with AVX provide 16-byte atomicity for all cachable, + * with AVX provide 16-byte atomicity for all cacheable, * naturally aligned single loads and stores, e.g. MOVDQU. * diff --git a/util/cpuinfo-ppc.c b/util/cpuinfo-ppc.c index 7212afa45d..1ea3db0ac8 100644 --- a/util/cpuinfo-ppc.c +++ b/util/cpuinfo-ppc.c @@ -1,5 +1,5 @@ /* * SPDX-License-Identifier: GPL-2.0-or-later - * Host specific cpu indentification for ppc. + * Host specific cpu identification for ppc. */ =20 diff --git a/util/main-loop.c b/util/main-loop.c index 014c795916..797b640c41 100644 --- a/util/main-loop.c +++ b/util/main-loop.c @@ -48,5 +48,5 @@ /* * Disable CFI checks. - * We are going to call a signal hander directly. Such handler may or may = not + * We are going to call a signal handler directly. Such handler may or may= not * have been defined in our binary, so there's no guarantee that the point= er * used to set the handler is a cfi-valid pointer. Since the handlers are diff --git a/util/oslib-posix.c b/util/oslib-posix.c index 760390b31e..4d583da7ce 100644 --- a/util/oslib-posix.c +++ b/util/oslib-posix.c @@ -672,5 +672,5 @@ void qemu_free_stack(void *stack, size_t sz) /* * Disable CFI checks. - * We are going to call a signal hander directly. Such handler may or may = not + * We are going to call a signal handler directly. Such handler may or may= not * have been defined in our binary, so there's no guarantee that the point= er * used to set the handler is a cfi-valid pointer. Since the handlers are diff --git a/util/qdist.c b/util/qdist.c index 5f75e24c29..ef3566b03a 100644 --- a/util/qdist.c +++ b/util/qdist.c @@ -211,5 +211,5 @@ void qdist_bin__internal(struct qdist *to, const struct= qdist *from, size_t n) /* * To avoid double-counting we capture [left, right) ranges, excep= t for - * the righmost bin, which captures a [left, right] range. + * the rightmost bin, which captures a [left, right] range. */ while (j < from->n && (from->entries[j].x < right || i =3D=3D n - = 1)) { diff --git a/util/qemu-sockets.c b/util/qemu-sockets.c index 892d33f5e6..83e84b1186 100644 --- a/util/qemu-sockets.c +++ b/util/qemu-sockets.c @@ -930,5 +930,5 @@ static int unix_listen_saddr(UnixSocketAddress *saddr, if (pathbuf !=3D NULL) { /* - * This dummy fd usage silences the mktemp() unsecure warning. + * This dummy fd usage silences the mktemp() insecure warning. * Using mkstemp() doesn't make things more secure here * though. bind() complains about existing files, so we have diff --git a/util/rcu.c b/util/rcu.c index 30a7e22026..e587bcc483 100644 --- a/util/rcu.c +++ b/util/rcu.c @@ -356,5 +356,5 @@ void drain_call_rcu(void) * Note that since we have only one global queue of the RCU callbacks, * we also end up waiting for most of RCU callbacks that were register= ed - * on the other threads, but this is a side effect that shoudn't be + * on the other threads, but this is a side effect that shouldn't be * assumed. */ --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692769987472751.7602588116855; Tue, 22 Aug 2023 22:53:07 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgnF-0001Sb-Eq; Wed, 23 Aug 2023 01:52:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgn8-0001QU-2Y for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:30 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgn3-0007Kh-Th for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:28 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 1E8EC1C392 for ; Wed, 23 Aug 2023 08:52:20 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id B428F2123A; Wed, 23 Aug 2023 08:52:01 +0300 (MSK) Received: (nullmailer pid 1917468 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 05/24] tcg: spelling fixes Date: Wed, 23 Aug 2023 08:51:36 +0300 Message-Id: <20230823055155.1917375-6-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692769990601100002 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- tcg/aarch64/tcg-target.c.inc | 2 +- tcg/arm/tcg-target.c.inc | 4 ++-- tcg/riscv/tcg-target.c.inc | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 35ca80cd56..5471523f4c 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -3087,5 +3087,5 @@ static void tcg_target_qemu_prologue(TCGContext *s) /* * Note that XZR cannot be encoded in the address base register slot, - * as that actaully encodes SP. Depending on the guest, we may need + * as that actually encodes SP. Depending on the guest, we may need * to zero-extend the guest address via the address index register slo= t, * therefore we need to load even a zero guest base into a register. diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index 83e286088f..3a14f52c51 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -1217,5 +1217,5 @@ static TCGCond tcg_out_cmp2(TCGContext *s, const TCGA= rg *args, case TCG_COND_GTU: case TCG_COND_GEU: - /* We perform a conditional comparision. If the high half is + /* We perform a conditional comparison. If the high half is equal, then overwrite the flags with the comparison of the low half. The resulting flags cover the whole. */ @@ -1251,5 +1251,5 @@ static TCGCond tcg_out_cmp2(TCGContext *s, const TCGA= rg *args, /* * Note that TCGReg references Q-registers. - * Q-regno =3D 2 * D-regno, so shift left by 1 whlie inserting. + * Q-regno =3D 2 * D-regno, so shift left by 1 while inserting. */ static uint32_t encode_vd(TCGReg rd) diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index eeaeb6b6e3..e9e5968823 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -70,5 +70,5 @@ static const char * const tcg_target_reg_names[TCG_TARGET= _NB_REGS] =3D { static const int tcg_target_reg_alloc_order[] =3D { /* Call saved registers */ - /* TCG_REG_S0 reservered for TCG_AREG0 */ + /* TCG_REG_S0 reserved for TCG_AREG0 */ TCG_REG_S1, TCG_REG_S2, @@ -261,5 +261,5 @@ typedef enum { OPC_ADD_UW =3D 0x0800003b, =20 - /* Zbb: Bit manipulation extension, basic bit manipulaton */ + /* Zbb: Bit manipulation extension, basic bit manipulation */ OPC_ANDN =3D 0x40007033, OPC_CLZ =3D 0x60001013, --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770042852631.3113608885291; Tue, 22 Aug 2023 22:54:02 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgnI-0001TD-H5; Wed, 23 Aug 2023 01:52:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgnB-0001Rg-HA for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:33 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgn8-0007LF-Fp for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:32 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 559931C393 for ; Wed, 23 Aug 2023 08:52:20 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id E67FD2123B; Wed, 23 Aug 2023 08:52:01 +0300 (MSK) Received: (nullmailer pid 1917471 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 06/24] docs: spelling fixes Date: Wed, 23 Aug 2023 08:51:37 +0300 Message-Id: <20230823055155.1917375-7-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770043715100009 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- docs/devel/qapi-code-gen.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/devel/qapi-code-gen.rst b/docs/devel/qapi-code-gen.rst index 7f78183cd4..b0852da97b 100644 --- a/docs/devel/qapi-code-gen.rst +++ b/docs/devel/qapi-code-gen.rst @@ -1368,5 +1368,5 @@ anymore, optional return or event data members that c= an't be sent anymore, and return or event data member (enumeration) values that can't be sent anymore makes no difference to clients, except for -introspection. The latter can conceivably confuse clients, so tread +introspection. The latter can conceivably confuse clients, so treat carefully. =20 --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770087007365.95704204986623; Tue, 22 Aug 2023 22:54:47 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgnI-0001TP-O5; Wed, 23 Aug 2023 01:52:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgnD-0001S1-4T for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:35 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgn9-0007LL-9f for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:34 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 7C1F41C394 for ; Wed, 23 Aug 2023 08:52:20 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 2942C2123C; Wed, 23 Aug 2023 08:52:02 +0300 (MSK) Received: (nullmailer pid 1917474 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 07/24] i386: spelling fixes Date: Wed, 23 Aug 2023 08:51:38 +0300 Message-Id: <20230823055155.1917375-8-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770087896100003 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- host/include/i386/host/cpuinfo.h | 2 +- hw/i386/acpi-build.c | 4 ++-- hw/i386/amd_iommu.c | 4 ++-- hw/i386/intel_iommu.c | 4 ++-- hw/i386/kvm/xen_xenstore.c | 2 +- hw/i386/kvm/xenstore_impl.c | 2 +- hw/i386/pc.c | 4 ++-- include/hw/i386/topology.h | 2 +- target/i386/cpu.c | 4 ++-- target/i386/cpu.h | 4 ++-- target/i386/hax/hax-interface.h | 4 ++-- target/i386/hax/hax-windows.c | 2 +- target/i386/kvm/kvm.c | 4 ++-- target/i386/kvm/xen-emu.c | 2 +- target/i386/machine.c | 4 ++-- target/i386/tcg/translate.c | 8 ++++---- tests/tcg/i386/system/boot.S | 2 +- tests/tcg/i386/x86.csv | 2 +- 18 files changed, 30 insertions(+), 30 deletions(-) diff --git a/host/include/i386/host/cpuinfo.h b/host/include/i386/host/cpui= nfo.h index 073d0a426f..6e46939132 100644 --- a/host/include/i386/host/cpuinfo.h +++ b/host/include/i386/host/cpuinfo.h @@ -1,5 +1,5 @@ /* * SPDX-License-Identifier: GPL-2.0-or-later - * Host specific cpu indentification for x86. + * Host specific cpu identification for x86. */ =20 diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index bb12b0ad43..1afcef5937 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -780,5 +780,5 @@ static Aml *initialize_route(Aml *route, const char *li= nk_name, * Returns an array of 128 routes, one for each device, * based on device location. - * The main goal is to equaly distribute the interrupts + * The main goal is to equally distribute the interrupts * over the 4 existing ACPI links (works only for i440fx). * The hash function is (slot + pin) & 3 -> "LNK[D|A|B|C]". @@ -2080,5 +2080,5 @@ build_srat(GArray *table_data, BIOSLinker *linker, Ma= chineState *machine) =20 /* - * Insert DMAR scope for PCI bridges and endpoint devcie + * Insert DMAR scope for PCI bridges and endpoint device */ static void diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 9c77304438..c98a3c6e11 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -260,5 +260,5 @@ static void amdvi_log_command_error(AMDVIState *s, hwad= dr addr) PCI_STATUS_SIG_TARGET_ABORT); } -/* log an illegal comand event +/* log an illegal command event * @addr : address of illegal command */ @@ -768,5 +768,5 @@ static void amdvi_mmio_write(void *opaque, hwaddr addr,= uint64_t val, case AMDVI_MMIO_COMMAND_BASE: amdvi_mmio_reg_write(s, size, val, addr); - /* FIXME - make sure System Software has finished writing incase + /* FIXME - make sure System Software has finished writing in case * it writes in chucks less than 8 bytes in a robust way.As for * now, this hacks works for the linux driver diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 3ca71df369..6b3fe12428 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -53,5 +53,5 @@ /* * PCI bus number (or SID) is not reliable since the device is usaully - * initalized before guest can configure the PCI bridge + * initialized before guest can configure the PCI bridge * (SECONDARY_BUS_NUMBER). */ @@ -1695,5 +1695,5 @@ static bool vtd_switch_address_space(VTDAddressSpace = *as) * * We enable per as memory region (iommu_ir_fault) for catching - * the tranlsation for interrupt range through PASID + PT. + * the translation for interrupt range through PASID + PT. */ if (pt && as->pasid !=3D PCI_NO_PASID) { diff --git a/hw/i386/kvm/xen_xenstore.c b/hw/i386/kvm/xen_xenstore.c index 133d89e953..660d0b72f9 100644 --- a/hw/i386/kvm/xen_xenstore.c +++ b/hw/i386/kvm/xen_xenstore.c @@ -1157,5 +1157,5 @@ static unsigned int copy_to_ring(XenXenstoreState *s,= uint8_t *ptr, /* * This matches the barrier in copy_to_ring() (or the guest's - * equivalent) betweem writing the data to the ring and updating + * equivalent) between writing the data to the ring and updating * rsp_prod. It protects against the pathological case (which * again I think never happened except on Alpha) where our diff --git a/hw/i386/kvm/xenstore_impl.c b/hw/i386/kvm/xenstore_impl.c index d9732b567e..1d134a6866 100644 --- a/hw/i386/kvm/xenstore_impl.c +++ b/hw/i386/kvm/xenstore_impl.c @@ -1437,5 +1437,5 @@ static void save_node(gpointer key, gpointer value, g= pointer opaque) * If we already wrote this node, refer to the previous copy. * There's no rename/move in XenStore, so all we need to find - * it is the tx_id of the transation in which it exists. Which + * it is the tx_id of the transaction in which it exists. Which * may be the root tx. */ diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 3109d5e0e0..405db3aef9 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -434,5 +434,5 @@ static uint64_t ioport80_read(void *opaque, hwaddr addr= , unsigned size) } =20 -/* MSDOS compatibility mode FPU exception support */ +/* MS-DOS compatibility mode FPU exception support */ static void ioportF0_write(void *opaque, hwaddr addr, uint64_t data, unsigned size) @@ -1753,5 +1753,5 @@ static void pc_machine_set_max_fw_size(Object *obj, V= isitor *v, error_setg(errp, "User specified max allowed firmware size %" PRIu64 " i= s " - "greater than 16MiB. If combined firwmare size exceeds " + "greater than 16MiB. If combined firmware size exceeds " "16MiB the system may not boot, or experience intermitt= ent" "stability issues.", diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h index 81573f6cfd..380cb27ded 100644 --- a/include/hw/i386/topology.h +++ b/include/hw/i386/topology.h @@ -32,5 +32,5 @@ * This code should be compatible with AMD's "Extended Method" described a= t: * AMD CPUID Specification (Publication #25481) - * Section 3: Multiple Core Calcuation + * Section 3: Multiple Core Calculation * as long as: * nr_threads is set to 1; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 97ad229d8b..fd2afd4b3c 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5337,5 +5337,5 @@ static const char *x86_cpu_feature_name(FeatureWord w= , int bitnr) } =20 -/* Compatibily hack to maintain legacy +-feat semantic, +/* Compatibility hack to maintain legacy +-feat semantic, * where +-feat overwrites any feature set by * feat=3Don|feat even if the later is parsed after +-feat @@ -6301,5 +6301,5 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, * commit 412a3c41(e.g., CentOS 6), the ebx's value always =3D= =3D 0 * even through guest update xcr0, this will crash some legacy= guest - * (e.g., CentOS 6), So set ebx =3D=3D ecx to workaroud it. + * (e.g., CentOS 6), So set ebx =3D=3D ecx to workaround it. */ *ebx =3D kvm_enabled() ? *ecx : xsave_area_size(env->xcr0, fal= se); diff --git a/target/i386/cpu.h b/target/i386/cpu.h index e0771a1043..b3fbcae52f 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -729,5 +729,5 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord= w, #define CPUID_EXT2_3DNOW (1U << 31) =20 -/* CPUID[8000_0001].EDX bits that are aliase of CPUID[1].EDX bits on AMD C= PUs */ +/* CPUID[8000_0001].EDX bits that are aliases of CPUID[1].EDX bits on AMD = CPUs */ #define CPUID_EXT2_AMD_ALIASES (CPUID_EXT2_FPU | CPUID_EXT2_VME | \ CPUID_EXT2_DE | CPUID_EXT2_PSE | \ @@ -2069,5 +2069,5 @@ hwaddr x86_cpu_get_phys_page_attrs_debug(CPUState *cp= u, vaddr addr, int cpu_get_pic_interrupt(CPUX86State *s); =20 -/* MSDOS compatibility mode FPU exception support */ +/* MS-DOS compatibility mode FPU exception support */ void x86_register_ferr_irq(qemu_irq irq); void fpu_check_raise_ferr_irq(CPUX86State *s); diff --git a/target/i386/hax/hax-interface.h b/target/i386/hax/hax-interfac= e.h index 537ae084e9..edef4fdf5d 100644 --- a/target/i386/hax/hax-interface.h +++ b/target/i386/hax/hax-interface.h @@ -239,5 +239,5 @@ enum exit_status { /* HALT from guest */ HAX_EXIT_HLT, - /* Reboot request, like because of tripple fault in guest */ + /* Reboot request, like because of triple fault in guest */ HAX_EXIT_STATECHANGE, /* the vcpu is now only paused when destroy, so simply return to hax */ @@ -296,5 +296,5 @@ struct hax_qemu_version { } __attribute__ ((__packed__)); =20 -/* The mac specfic interface to qemu, mostly is ioctl related */ +/* The mac specific interface to qemu, mostly is ioctl related */ struct hax_tunnel_info { uint64_t va; diff --git a/target/i386/hax/hax-windows.c b/target/i386/hax/hax-windows.c index 4bf6cc08d2..58cf3f1a9f 100644 --- a/target/i386/hax/hax-windows.c +++ b/target/i386/hax/hax-windows.c @@ -175,5 +175,5 @@ int hax_mod_version(struct hax_state *hax, struct hax_m= odule_version *version) err =3D GetLastError(); if (err =3D=3D ERROR_INSUFFICIENT_BUFFER || err =3D=3D ERROR_MORE_= DATA) { - fprintf(stderr, "hax module verion is too long to hold.\n"); + fprintf(stderr, "hax module version is too long to hold.\n"); } fprintf(stderr, "Failed to get Hax module version:%lu\n", err); diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index ebfaf3d24c..9d18d3336f 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -4725,5 +4725,5 @@ int kvm_arch_put_registers(CPUState *cpu, int level) * Put MSR_IA32_FEATURE_CONTROL first, this ensures the VM gets out of= VMX * root operation upon vCPU reset. kvm_put_msr_feature_control() shoul= d also - * preceed kvm_put_nested_state() when 'real' nested state is set. + * proceed kvm_put_nested_state() when 'real' nested state is set. */ if (level >=3D KVM_PUT_RESET_STATE) { @@ -5651,5 +5651,5 @@ int kvm_arch_fixup_msi_route(struct kvm_irq_routing_e= ntry *route, =20 /* - * Handled untranslated compatibilty format interrupt with + * Handled untranslated compatibility format interrupt with * extended destination ID in the low bits 11-5. */ dst.address =3D kvm_swizzle_msi_ext_dest_id(dst.address); diff --git a/target/i386/kvm/xen-emu.c b/target/i386/kvm/xen-emu.c index a8146115f0..76348f9d5d 100644 --- a/target/i386/kvm/xen-emu.c +++ b/target/i386/kvm/xen-emu.c @@ -1034,5 +1034,5 @@ static int do_set_periodic_timer(CPUState *target, ui= nt64_t period_ns) #define MICROSECS(_us) ((int64_t)((_us) * 1000ULL)) #define STIME_MAX ((time_t)((int64_t)~0ull >> 1)) -/* Chosen so (NOW() + delta) wont overflow without an uptime of 200 years = */ +/* Chosen so (NOW() + delta) won't overflow without an uptime of 200 years= */ #define STIME_DELTA_MAX ((int64_t)((uint64_t)~0ull >> 2)) =20 diff --git a/target/i386/machine.c b/target/i386/machine.c index c7ac8084b2..a1041ef828 100644 --- a/target/i386/machine.c +++ b/target/i386/machine.c @@ -283,10 +283,10 @@ static int cpu_pre_save(void *opaque) * should not be set yet in the respective vCPU register. * Thus, in case an exception is pending, it is - * important to save the exception payload seperately. + * important to save the exception payload separately. * * Therefore, if an exception is not in a pending state * or vCPU is not in guest-mode, it is not important to * distinguish between a pending and injected exception - * and we don't need to store seperately the exception payload. + * and we don't need to store separately the exception payload. * * In order to preserve better backwards-compatible migration, diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 90c7b32f36..c1ab3efba9 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -1070,5 +1070,5 @@ static CCPrepare gen_prepare_eflags_z(DisasContext *s= , TCGv reg) =20 /* perform a conditional store into register 'reg' according to jump opcode - value 'b'. In the fast case, T0 is guaranted not to be used. */ + value 'b'. In the fast case, T0 is guaranteed not to be used. */ static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg) { @@ -1203,5 +1203,5 @@ static inline void gen_compute_eflags_c(DisasContext = *s, TCGv reg) =20 /* generate a conditional jump to label 'l1' according to jump opcode - value 'b'. In the fast case, T0 is guaranted not to be used. */ + value 'b'. In the fast case, T0 is guaranteed not to be used. */ static inline void gen_jcc1_noeob(DisasContext *s, int b, TCGLabel *l1) { @@ -1220,5 +1220,5 @@ static inline void gen_jcc1_noeob(DisasContext *s, in= t b, TCGLabel *l1) =20 /* Generate a conditional jump to label 'l1' according to jump opcode - value 'b'. In the fast case, T0 is guaranted not to be used. + value 'b'. In the fast case, T0 is guaranteed not to be used. A translation block must end soon. */ static inline void gen_jcc1(DisasContext *s, int b, TCGLabel *l1) @@ -5352,5 +5352,5 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) switch (op) { case 0: /* bt */ - /* Needs no atomic ops; we surpressed the normal + /* Needs no atomic ops; we suppressed the normal memory load for LOCK above so do it now. */ gen_op_ld_v(s, ot, s->T0, s->A0); diff --git a/tests/tcg/i386/system/boot.S b/tests/tcg/i386/system/boot.S index 794c2cb0ad..9e8920cbfe 100644 --- a/tests/tcg/i386/system/boot.S +++ b/tests/tcg/i386/system/boot.S @@ -72,5 +72,5 @@ _start: =20 /* - * Don't worry about stack frame, assume everthing + * Don't worry about stack frame, assume everything * is garbage when we return, we won't need it. */ diff --git a/tests/tcg/i386/x86.csv b/tests/tcg/i386/x86.csv index c43bf42dd3..5c0f628e35 100644 --- a/tests/tcg/i386/x86.csv +++ b/tests/tcg/i386/x86.csv @@ -20,5 +20,5 @@ # 4. The instruction encoding. For example, "C1 /4 ib". # -# 5. The validity of the instruction in 32-bit (aka compatiblity, legacy) = mode. +# 5. The validity of the instruction in 32-bit (aka compatibility, legacy)= mode. # # 6. The validity of the instruction in 64-bit mode. --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770140693482.3163414426758; Tue, 22 Aug 2023 22:55:40 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgnL-0001UU-Gh; Wed, 23 Aug 2023 01:52:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgnF-0001Sr-Oe for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:38 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgnC-0007Lu-Rg for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:36 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id A6D741C395 for ; Wed, 23 Aug 2023 08:52:20 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 4FD8B2123D; Wed, 23 Aug 2023 08:52:02 +0300 (MSK) Received: (nullmailer pid 1917477 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 08/24] mips: spelling fixes Date: Wed, 23 Aug 2023 08:51:39 +0300 Message-Id: <20230823055155.1917375-9-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770141940100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- hw/mips/malta.c | 2 +- target/mips/cpu-defs.c.inc | 2 +- target/mips/tcg/msa_helper.c | 12 ++++++------ target/mips/tcg/mxu_translate.c | 6 +++--- 4 files changed, 11 insertions(+), 11 deletions(-) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index f9618fa5f5..16e9c4773f 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -628,5 +628,5 @@ static void bl_setup_gt64120_jump_kernel(void **p, uint= 64_t run_addr, }; =20 - /* Bus endianess is always reversed */ + /* Bus endianness is always reversed */ #if TARGET_BIG_ENDIAN #define cpu_to_gt32(x) (x) diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc index 03185d9aa0..c0c389c59a 100644 --- a/target/mips/cpu-defs.c.inc +++ b/target/mips/cpu-defs.c.inc @@ -1046,5 +1046,5 @@ static void mvp_init(CPUMIPSState *env) } =20 - /* MVPConf1 implemented, TLB sharable, no gating storage support, + /* MVPConf1 implemented, TLB shareable, no gating storage support, programmable cache partitioning implemented, number of allocatable and shareable TLB entries, MVP has allocatable TCs, 2 VPEs diff --git a/target/mips/tcg/msa_helper.c b/target/mips/tcg/msa_helper.c index 29b31d70fe..6e93a19a93 100644 --- a/target/mips/tcg/msa_helper.c +++ b/target/mips/tcg/msa_helper.c @@ -803,7 +803,7 @@ void helper_msa_bset_d(CPUMIPSState *env, uint32_t wd, = uint32_t ws, uint32_t wt) * | HADD_S.W | Vector Signed Horizontal Add (word) = | * | HADD_S.D | Vector Signed Horizontal Add (doubleword) = | - * | HADD_U.H | Vector Unigned Horizontal Add (halfword) = | - * | HADD_U.W | Vector Unigned Horizontal Add (word) = | - * | HADD_U.D | Vector Unigned Horizontal Add (doubleword) = | + * | HADD_U.H | Vector Unsigned Horizontal Add (halfword) = | + * | HADD_U.W | Vector Unsigned Horizontal Add (word) = | + * | HADD_U.D | Vector Unsigned Horizontal Add (doubleword) = | * +---------------+------------------------------------------------------= ----+ */ @@ -3452,7 +3452,7 @@ void helper_msa_mulv_d(CPUMIPSState *env, * | HSUB_S.W | Vector Signed Horizontal Subtract (word) = | * | HSUB_S.D | Vector Signed Horizontal Subtract (doubleword) = | - * | HSUB_U.H | Vector Unigned Horizontal Subtract (halfword) = | - * | HSUB_U.W | Vector Unigned Horizontal Subtract (word) = | - * | HSUB_U.D | Vector Unigned Horizontal Subtract (doubleword) = | + * | HSUB_U.H | Vector Unsigned Horizontal Subtract (halfword) = | + * | HSUB_U.W | Vector Unsigned Horizontal Subtract (word) = | + * | HSUB_U.D | Vector Unsigned Horizontal Subtract (doubleword) = | * | SUBS_S.B | Vector Signed Saturated Subtract (of Signed) (byte) = | * | SUBS_S.H | Vector Signed Saturated Subtract (of Signed) (halfwor= d) | diff --git a/target/mips/tcg/mxu_translate.c b/target/mips/tcg/mxu_translat= e.c index e662acd5df..cfcd8ac9bc 100644 --- a/target/mips/tcg/mxu_translate.c +++ b/target/mips/tcg/mxu_translate.c @@ -2978,5 +2978,5 @@ static void gen_mxu_Q8ADD(DisasContext *ctx) * to 16-bit and put results as packed 16-bit data * into XRa and XRd. - * aptn2 manages action add or subract of pairs of data. + * aptn2 manages action add or subtract of pairs of data. * * Q8ACCE XRa, XRb, XRc, XRd, aptn2 @@ -2985,5 +2985,5 @@ static void gen_mxu_Q8ADD(DisasContext *ctx) * to 16-bit and accumulate results as packed 16-bit data * into XRa and XRd. - * aptn2 manages action add or subract of pairs of data. + * aptn2 manages action add or subtract of pairs of data. */ static void gen_mxu_q8adde(DisasContext *ctx, bool accumulate) @@ -4057,5 +4057,5 @@ static void gen_mxu_s32sfl(DisasContext *ctx) /* * Q8SAD XRa, XRd, XRb, XRc - * Typical SAD opration for motion estimation. + * Typical SAD operation for motion estimation. */ static void gen_mxu_q8sad(DisasContext *ctx) --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Signed-off-by: Michael Tokarev --- host/include/ppc/host/cpuinfo.h | 2 +- hw/ppc/ppc.c | 2 +- hw/ppc/prep_systemio.c | 2 +- hw/ppc/spapr.c | 8 ++++---- hw/ppc/spapr_hcall.c | 2 +- hw/ppc/spapr_nvdimm.c | 4 ++-- hw/ppc/spapr_pci_vfio.c | 2 +- include/hw/ppc/openpic.h | 2 +- include/hw/ppc/spapr.h | 2 +- target/ppc/cpu-models.h | 4 ++-- target/ppc/cpu.h | 2 +- target/ppc/cpu_init.c | 4 ++-- target/ppc/excp_helper.c | 14 +++++++------- target/ppc/power8-pmu-regs.c.inc | 4 ++-- target/ppc/translate/vmx-impl.c.inc | 6 +++--- 15 files changed, 30 insertions(+), 30 deletions(-) diff --git a/host/include/ppc/host/cpuinfo.h b/host/include/ppc/host/cpuinf= o.h index 29ee7f9ef8..38b8eabe2a 100644 --- a/host/include/ppc/host/cpuinfo.h +++ b/host/include/ppc/host/cpuinfo.h @@ -1,5 +1,5 @@ /* * SPDX-License-Identifier: GPL-2.0-or-later - * Host specific cpu indentification for ppc. + * Host specific cpu identification for ppc. */ =20 diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c index 0e0a3d93c3..6c46204428 100644 --- a/hw/ppc/ppc.c +++ b/hw/ppc/ppc.c @@ -714,5 +714,5 @@ target_ulong cpu_ppc_load_decr(CPUPPCState *env) =20 /* - * If large decrementer is enabled then the decrementer is signed exte= ned + * If large decrementer is enabled then the decrementer is signed exte= nded * to 64 bits, otherwise it is a 32 bit value. */ diff --git a/hw/ppc/prep_systemio.c b/hw/ppc/prep_systemio.c index 5a56f155f5..c96cefb13d 100644 --- a/hw/ppc/prep_systemio.c +++ b/hw/ppc/prep_systemio.c @@ -40,5 +40,5 @@ OBJECT_DECLARE_SIMPLE_TYPE(PrepSystemIoState, PREP_SYSTEMIO) =20 -/* Bit as defined in PowerPC Reference Plaform v1.1, sect. 6.1.5, p. 132 */ +/* Bit as defined in PowerPC Reference Platform v1.1, sect. 6.1.5, p. 132 = */ #define PREP_BIT(n) (1 << (7 - (n))) =20 diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 1c8b8d57a7..298b4cebf0 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2552,5 +2552,5 @@ static void spapr_set_vsmt_mode(SpaprMachineState *sp= apr, Error **errp) } =20 - /* Detemine the VSMT mode to use: */ + /* Determine the VSMT mode to use: */ if (vsmt_user) { if (spapr->vsmt < smp_threads) { @@ -3088,5 +3088,5 @@ static int spapr_kvm_type(MachineState *machine, cons= t char *vm_type) /* * The use of g_ascii_strcasecmp() for 'hv' and 'pr' is to - * accomodate the 'HV' and 'PV' formats that exists in the + * accommodate the 'HV' and 'PV' formats that exists in the * wild. The 'auto' mode is being introduced already as * lower-case, thus we don't need to bother checking for @@ -4322,5 +4322,5 @@ spapr_cpu_index_to_props(MachineState *machine, unsig= ned cpu_index) MachineClass *mc =3D MACHINE_GET_CLASS(machine); =20 - /* make sure possible_cpu are intialized */ + /* make sure possible_cpu are initialized */ mc->possible_cpu_arch_ids(machine); /* get CPU core slot containing thread that matches cpu_index */ @@ -5013,5 +5013,5 @@ static void spapr_machine_2_12_class_options(MachineC= lass *mc) /* We depend on kvm_enabled() to choose a default value for the * hpt-max-page-size capability. Of course we can't do it here - * because this is too early and the HW accelerator isn't initialzed + * because this is too early and the HW accelerator isn't initialized * yet. Postpone this to machine init (see default_caps_with_cpu()). */ diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index 9b1f225d4a..d69867583d 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -1559,5 +1559,5 @@ static void hypercall_register_types(void) h_get_cpu_characteristics); =20 - /* "debugger" hcalls (also used by SLOF). Note: We do -not- differenci= ate + /* "debugger" hcalls (also used by SLOF). Note: We do -not- differenti= ate * here between the "CI" and the "CACHE" variants, they will use whate= ver * mapping attributes qemu is using. When using KVM, the kernel will diff --git a/hw/ppc/spapr_nvdimm.c b/hw/ppc/spapr_nvdimm.c index a8688243a6..4e34545dcf 100644 --- a/hw/ppc/spapr_nvdimm.c +++ b/hw/ppc/spapr_nvdimm.c @@ -378,5 +378,5 @@ static target_ulong h_scm_bind_mem(PowerPCCPU *cpu, Spa= prMachineState *spapr, /* * Currently continue token should be zero qemu has already bound - * everything and this hcall doesnt return H_BUSY. + * everything and this hcall doesn't return H_BUSY. */ if (continue_token > 0) { @@ -589,5 +589,5 @@ void spapr_nvdimm_finish_flushes(void) * the pending BHs has gotten out running in the reset path, * finally reaching here. Other code path being guest - * h_client_architecture_support, thats early boot up. + * h_client_architecture_support, that's early boot up. */ nvdimms =3D nvdimm_get_device_list(); diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c index d8aeee0b7e..9016720547 100644 --- a/hw/ppc/spapr_pci_vfio.c +++ b/hw/ppc/spapr_pci_vfio.c @@ -79,5 +79,5 @@ int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, * pass-through devices (vfio-pci) under this sphb bus. * We have already validated that all the devices under this sphb - * are from same iommu group (within same PE) before comming here. + * are from same iommu group (within same PE) before coming here. * * Prior to linux commit 98ba956f6a389 ("powerpc/pseries/eeh: diff --git a/include/hw/ppc/openpic.h b/include/hw/ppc/openpic.h index bae8dafe16..9c6af8e207 100644 --- a/include/hw/ppc/openpic.h +++ b/include/hw/ppc/openpic.h @@ -15,5 +15,5 @@ enum { OPENPIC_OUTPUT_CINT, /* critical IRQ */ OPENPIC_OUTPUT_MCK, /* Machine check event */ - OPENPIC_OUTPUT_DEBUG, /* Inconditional debug event */ + OPENPIC_OUTPUT_DEBUG, /* Unconditional debug event */ OPENPIC_OUTPUT_RESET, /* Core reset event */ OPENPIC_OUTPUT_NB, diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 538b2dfb89..658f9daaa1 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -198,5 +198,5 @@ struct SpaprMachineState { void *htab; uint32_t htab_shift; - uint64_t patb_entry; /* Process tbl registed in H_REGISTER_PROC_TBL */ + uint64_t patb_entry; /* Process tbl registered in H_REGISTER_PROC_TBL = */ SpaprPendingHpt *pending_hpt; /* in-progress resize */ =20 diff --git a/target/ppc/cpu-models.h b/target/ppc/cpu-models.h index 572b5e553a..0229ef3a9a 100644 --- a/target/ppc/cpu-models.h +++ b/target/ppc/cpu-models.h @@ -45,5 +45,5 @@ enum { CPU_POWERPC_405D2 =3D 0x20010000, CPU_POWERPC_405D4 =3D 0x41810000, - /* PowerPC 405 microcontrolers */ + /* PowerPC 405 microcontrollers */ /* XXX: missing 0x200108a0 */ CPU_POWERPC_405CRa =3D 0x40110041, @@ -75,5 +75,5 @@ enum { /* PowerPC 440 cores */ CPU_POWERPC_440_XILINX =3D 0x7ff21910, - /* PowerPC 440 microcontrolers */ + /* PowerPC 440 microcontrollers */ CPU_POWERPC_440EPa =3D 0x42221850, CPU_POWERPC_440EPb =3D 0x422218D3, diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 25fac9577a..fbaf41828a 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -429,5 +429,5 @@ FIELD(MSR, LE, MSR_LE, 1) /* PMU bits */ #define MMCR0_FC PPC_BIT(32) /* Freeze Counters */ -#define MMCR0_PMAO PPC_BIT(56) /* Perf Monitor Alert Ocurred */ +#define MMCR0_PMAO PPC_BIT(56) /* Perf Monitor Alert Occurred */ #define MMCR0_PMAE PPC_BIT(37) /* Perf Monitor Alert Enable */ #define MMCR0_EBE PPC_BIT(43) /* Perf Monitor EBB Enable */ diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 02b7aad9b0..22355f862d 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -5348,5 +5348,5 @@ static void register_power5p_lpar_sprs(CPUPPCState *e= nv) { #if !defined(CONFIG_USER_ONLY) - /* Logical partitionning */ + /* Logical partitioning */ spr_register_kvm_hv(env, SPR_LPCR, "LPCR", SPR_NOACCESS, SPR_NOACCESS, @@ -5751,5 +5751,5 @@ static void register_power10_hash_sprs(CPUPPCState *e= nv) { /* - * it's the OS responsability to generate a random value for the regis= ters + * it's the OS responsibility to generate a random value for the regis= ters * in each process' context. So, initialize it with 0 here. */ diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 9aa8e46566..0373839c1d 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -456,5 +456,5 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp) /* * new interrupt handler msr preserves existing ME unless - * explicitly overriden. + * explicitly overridden. */ new_msr =3D env->msr & (((target_ulong)1 << MSR_ME)); @@ -579,5 +579,5 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp) /* * new interrupt handler msr preserves existing ME unless - * explicitly overriden + * explicitly overridden */ new_msr =3D env->msr & ((target_ulong)1 << MSR_ME); @@ -740,5 +740,5 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) /* * new interrupt handler msr preserves existing ME unless - * explicitly overriden + * explicitly overridden */ new_msr =3D env->msr & ((target_ulong)1 << MSR_ME); @@ -911,5 +911,5 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp) /* * new interrupt handler msr preserves existing ME unless - * explicitly overriden + * explicitly overridden */ new_msr =3D env->msr & ((target_ulong)1 << MSR_ME); @@ -1074,5 +1074,5 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int e= xcp) /* * new interrupt handler msr preserves existing ME unless - * explicitly overriden + * explicitly overridden */ new_msr =3D env->msr & ((target_ulong)1 << MSR_ME); @@ -1287,5 +1287,5 @@ static bool books_vhyp_handles_hcall(PowerPCCPU *cpu) * When running a nested KVM HV guest under vhyp, HV exceptions are not * delivered to the guest (because there is no concept of HV support), but - * rather they are sent tothe vhyp to exit from the L2 back to the L1 and + * rather they are sent to the vhyp to exit from the L2 back to the L1 and * return from the H_ENTER_NESTED hypercall. */ @@ -1376,5 +1376,5 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int e= xcp) /* * new interrupt handler msr preserves existing HV and ME unless - * explicitly overriden + * explicitly overridden */ new_msr =3D env->msr & (((target_ulong)1 << MSR_ME) | MSR_HVB); diff --git a/target/ppc/power8-pmu-regs.c.inc b/target/ppc/power8-pmu-regs.= c.inc index c82feedaff..75513db894 100644 --- a/target/ppc/power8-pmu-regs.c.inc +++ b/target/ppc/power8-pmu-regs.c.inc @@ -17,5 +17,5 @@ * PMCs) has problem state read access. * - * Read acccess is granted for all PMCC values but 0b01, where a + * Read access is granted for all PMCC values but 0b01, where a * Facility Unavailable Interrupt will occur. */ @@ -34,5 +34,5 @@ static bool spr_groupA_read_allowed(DisasContext *ctx) * PMCs) has problem state write access. * - * Write acccess is granted for PMCC values 0b10 and 0b11. Userspace + * Write access is granted for PMCC values 0b10 and 0b11. Userspace * writing with PMCC 0b00 will generate a Hypervisor Emulation * Assistance Interrupt. Userspace writing with PMCC 0b01 will diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx= -impl.c.inc index c8712dd7d8..28b31298f1 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -120,5 +120,5 @@ static void gen_stve##name(DisasContext *ctx) = \ =20 GEN_VR_LDX(lvx, 0x07, 0x03); -/* As we don't emulate the cache, lvxl is stricly equivalent to lvx */ +/* As we don't emulate the cache, lvxl is strictly equivalent to lvx */ GEN_VR_LDX(lvxl, 0x07, 0x0B); =20 @@ -128,5 +128,5 @@ GEN_VR_LVE(wx, 0x07, 0x02, 4); =20 GEN_VR_STX(svx, 0x07, 0x07); -/* As we don't emulate the cache, stvxl is stricly equivalent to stvx */ +/* As we don't emulate the cache, stvxl is strictly equivalent to stvx */ GEN_VR_STX(svxl, 0x07, 0x0F); =20 @@ -1529,5 +1529,5 @@ static void gen_vprtyb_vec(unsigned vece, TCGv_vec t,= TCGv_vec b) int i; TCGv_vec tmp =3D tcg_temp_new_vec_matching(b); - /* MO_32 is 2, so 2 iteractions for MO_32 and 3 for MO_64 */ + /* MO_32 is 2, so 2 iterations for MO_32 and 3 for MO_64 */ for (i =3D 0; i < vece; i++) { tcg_gen_shri_vec(vece, tmp, b, (4 << (vece - i))); --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770062368440.4977333374093; Tue, 22 Aug 2023 22:54:22 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgnV-0001VR-7m; Wed, 23 Aug 2023 01:52:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgnT-0001V8-G5 for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:51 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgnQ-0007Me-SN for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:51 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 1133E1C397 for ; Wed, 23 Aug 2023 08:52:21 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id B26432123F; Wed, 23 Aug 2023 08:52:02 +0300 (MSK) Received: (nullmailer pid 1917483 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 10/24] riscv: spelling fixes Date: Wed, 23 Aug 2023 08:51:41 +0300 Message-Id: <20230823055155.1917375-11-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770063675100008 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev Acked-by: Alistair Francis --- hw/riscv/microchip_pfsoc.c | 2 +- hw/riscv/virt.c | 4 ++-- include/hw/riscv/riscv_hart.h | 2 +- target/riscv/cpu.h | 2 +- target/riscv/cpu_bits.h | 4 ++-- target/riscv/csr.c | 4 ++-- target/riscv/debug.c | 10 +++++----- target/riscv/insn_trans/trans_rvf.c.inc | 4 ++-- target/riscv/insn_trans/trans_rvv.c.inc | 4 ++-- target/riscv/insn_trans/trans_rvzfh.c.inc | 4 ++-- target/riscv/monitor.c | 2 +- 11 files changed, 21 insertions(+), 21 deletions(-) diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c index e81bbd12df..b775aa8946 100644 --- a/hw/riscv/microchip_pfsoc.c +++ b/hw/riscv/microchip_pfsoc.c @@ -660,5 +660,5 @@ static void microchip_icicle_kit_machine_class_init(Obj= ectClass *oc, void *data) =20 /* - * Map 513 MiB high memory, the mimimum required high memory size, bec= ause + * Map 513 MiB high memory, the minimum required high memory size, bec= ause * HSS will do memory test against the high memory address range regar= dless * of physical memory installed. diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 99c4e6314b..a5ac3ab777 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -67,5 +67,5 @@ #if VIRT_IMSIC_GROUP_MAX_SIZE < \ IMSIC_GROUP_SIZE(VIRT_CPUS_MAX_BITS, VIRT_IRQCHIP_MAX_GUESTS_BITS) -#error "Can't accomodate single IMSIC group in address space" +#error "Can't accommodate single IMSIC group in address space" #endif =20 @@ -73,5 +73,5 @@ VIRT_IMSIC_GROUP_MAX_SIZE) #if 0x4000000 < VIRT_IMSIC_MAX_SIZE -#error "Can't accomodate all IMSIC groups in address space" +#error "Can't accommodate all IMSIC groups in address space" #endif =20 diff --git a/include/hw/riscv/riscv_hart.h b/include/hw/riscv/riscv_hart.h index bbc21cdc9a..912b4a2682 100644 --- a/include/hw/riscv/riscv_hart.h +++ b/include/hw/riscv/riscv_hart.h @@ -4,5 +4,5 @@ * Copyright (c) 2017 SiFive, Inc. * - * Holds the state of a heterogenous array of RISC-V harts + * Holds the state of a heterogeneous array of RISC-V harts * * This program is free software; you can redistribute it and/or modify it diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 6ea22e0eea..6316cbcc23 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -350,5 +350,5 @@ struct CPUArchState { target_ulong upmbase; =20 - /* CSRs for execution enviornment configuration */ + /* CSRs for execution environment configuration */ uint64_t menvcfg; uint64_t mstateen[SMSTATEEN_MAX_COUNT]; diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h index 59f0ffd9e1..31a8d80990 100644 --- a/target/riscv/cpu_bits.h +++ b/target/riscv/cpu_bits.h @@ -657,5 +657,5 @@ typedef enum { #define PGSHIFT 12 =20 -/* Default Reset Vector adress */ +/* Default Reset Vector address */ #define DEFAULT_RSTVEC 0x1000 =20 @@ -741,5 +741,5 @@ typedef enum RISCVException { #define PM_INSN 0x00000004ULL =20 -/* Execution enviornment configuration bits */ +/* Execution environment configuration bits */ #define MENVCFG_FIOM BIT(0) #define MENVCFG_CBIE (3UL << 4) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index ea7585329e..26bc1f0ff1 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -3217,5 +3217,5 @@ static int write_hvipriox(CPURISCVState *env, int fir= st_index, } =20 - /* Fill-up priority arrary */ + /* Fill-up priority array */ for (i =3D 0; i < num_irqs; i++) { if (riscv_cpu_hviprio_index2irq(first_index + i, &irq, &rdzero)) { @@ -3886,5 +3886,5 @@ static inline RISCVException riscv_csrrw_check(CPURIS= CVState *env, !env->virt_enabled) { /* - * We are in HS mode. Add 1 to the effective privledge level to + * We are in HS mode. Add 1 to the effective privilege level to * allow us to access the Hypervisor CSRs. */ diff --git a/target/riscv/debug.c b/target/riscv/debug.c index 75ee1c4971..211f5921b6 100644 --- a/target/riscv/debug.c +++ b/target/riscv/debug.c @@ -575,5 +575,5 @@ static void riscv_itrigger_update_count(CPURISCVState *= env) /* * Record last icount, so that we can evaluate the executed instructio= ns - * since last priviledge mode change or timer expire. + * since last privilege mode change or timer expire. */ int64_t last_icount =3D env->last_icount, current_icount; @@ -589,5 +589,5 @@ static void riscv_itrigger_update_count(CPURISCVState *= env) } /* - * Only when priviledge is changed or itrigger timer expires, + * Only when privilege is changed or itrigger timer expires, * the count field in itrigger tdata1 register is updated. * And the count field in itrigger only contains remaining value. @@ -595,6 +595,6 @@ static void riscv_itrigger_update_count(CPURISCVState *= env) if (check_itrigger_priv(env, i)) { /* - * If itrigger enabled in this priviledge mode, the number of - * executed instructions since last priviledge change + * If itrigger enabled in this privilege mode, the number of + * executed instructions since last privilege change * should be reduced from current itrigger count. */ @@ -606,5 +606,5 @@ static void riscv_itrigger_update_count(CPURISCVState *= env) } else { /* - * If itrigger is not enabled in this priviledge mode, + * If itrigger is not enabled in this privilege mode, * the number of executed instructions will be discard and * the count field in itrigger will not change. diff --git a/target/riscv/insn_trans/trans_rvf.c.inc b/target/riscv/insn_tr= ans/trans_rvf.c.inc index a0da7391c7..e7ab84cd9a 100644 --- a/target/riscv/insn_trans/trans_rvf.c.inc +++ b/target/riscv/insn_trans/trans_rvf.c.inc @@ -301,5 +301,5 @@ static bool trans_fsgnjn_s(DisasContext *ctx, arg_fsgnj= n_s *a) tcg_gen_or_i64(dest, dest, rs2); } - /* signed-extended intead of nanboxing for result if enable zfinx */ + /* signed-extended instead of nanboxing for result if enable zfinx */ if (ctx->cfg_ptr->ext_zfinx) { tcg_gen_ext32s_i64(dest, dest); @@ -346,5 +346,5 @@ static bool trans_fsgnjx_s(DisasContext *ctx, arg_fsgnj= x_s *a) tcg_gen_xor_i64(dest, rs1, dest); } - /* signed-extended intead of nanboxing for result if enable zfinx */ + /* signed-extended instead of nanboxing for result if enable zfinx */ if (ctx->cfg_ptr->ext_zfinx) { tcg_gen_ext32s_i64(dest, dest); diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_tr= ans/trans_rvv.c.inc index c2f7527f53..6ab63f4442 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -2241,5 +2241,5 @@ GEN_OPIWI_NARROW_TRANS(vnclip_wi, IMM_ZX, vnclip_wx) * If SEW < FLEN, check whether input fp register is a valid * NaN-boxed value, in which case the least-significant SEW bits - * of the f regsiter are used, else the canonical NaN value is used. + * of the f register are used, else the canonical NaN value is used. */ static void do_nanbox(DisasContext *s, TCGv_i64 out, TCGv_i64 in) @@ -3283,5 +3283,5 @@ static void load_element(TCGv_i64 dest, TCGv_ptr base, } =20 -/* offset of the idx element with base regsiter r */ +/* offset of the idx element with base register r */ static uint32_t endian_ofs(DisasContext *s, int r, int idx) { diff --git a/target/riscv/insn_trans/trans_rvzfh.c.inc b/target/riscv/insn_= trans/trans_rvzfh.c.inc index 8b1e2519bb..4b01812fd8 100644 --- a/target/riscv/insn_trans/trans_rvzfh.c.inc +++ b/target/riscv/insn_trans/trans_rvzfh.c.inc @@ -306,5 +306,5 @@ static bool trans_fsgnjn_h(DisasContext *ctx, arg_fsgnj= n_h *a) tcg_gen_or_i64(dest, dest, rs2); } - /* signed-extended intead of nanboxing for result if enable zfinx */ + /* signed-extended instead of nanboxing for result if enable zfinx */ if (ctx->cfg_ptr->ext_zfinx) { tcg_gen_ext16s_i64(dest, dest); @@ -350,5 +350,5 @@ static bool trans_fsgnjx_h(DisasContext *ctx, arg_fsgnj= x_h *a) tcg_gen_xor_i64(dest, rs1, dest); } - /* signed-extended intead of nanboxing for result if enable zfinx */ + /* signed-extended instead of nanboxing for result if enable zfinx */ if (ctx->cfg_ptr->ext_zfinx) { tcg_gen_ext16s_i64(dest, dest); diff --git a/target/riscv/monitor.c b/target/riscv/monitor.c index f36ddfa967..f5b1ffe6c3 100644 --- a/target/riscv/monitor.c +++ b/target/riscv/monitor.c @@ -56,5 +56,5 @@ static void print_pte(Monitor *mon, int va_bits, target_u= long vaddr, hwaddr paddr, target_ulong size, int attr) { - /* santity check on vaddr */ + /* sanity check on vaddr */ if (vaddr >=3D (1UL << va_bits)) { return; --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770151046593.0270297461349; Tue, 22 Aug 2023 22:55:51 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgnW-0001Va-Kx; Wed, 23 Aug 2023 01:52:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgnU-0001VQ-VY for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:52 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgnS-0007Ny-AJ for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:52:52 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 47B1D1C398 for ; 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charset="utf-8" Signed-off-by: Michael Tokarev --- target/hexagon/README | 2 +- target/hexagon/fma_emu.c | 2 +- target/hexagon/idef-parser/README.rst | 2 +- target/hexagon/idef-parser/idef-parser.h | 2 +- target/hexagon/idef-parser/parser-helpers.c | 6 +++--- target/hexagon/imported/alu.idef | 8 ++++---- target/hexagon/imported/macros.def | 2 +- target/hexagon/imported/mmvec/ext.idef | 10 +++++----- tests/tcg/hexagon/fpstuff.c | 2 +- tests/tcg/hexagon/test_clobber.S | 2 +- 10 files changed, 19 insertions(+), 19 deletions(-) diff --git a/target/hexagon/README b/target/hexagon/README index 43811178e9..e757bcb64a 100644 --- a/target/hexagon/README +++ b/target/hexagon/README @@ -240,5 +240,5 @@ helper_funcs_generated.c.inc. There are also several h= elpers used for debugging VLIW packet semantics differ from serial semantics in that all input opera= nds are read, then the operations are performed, then all the results are writ= ten. -For exmaple, this packet performs a swap of registers r0 and r1 +For example, this packet performs a swap of registers r0 and r1 { r0 =3D r1; r1 =3D r0 } Note that the result is different if the instructions are executed seriall= y. diff --git a/target/hexagon/fma_emu.c b/target/hexagon/fma_emu.c index d3b45d494f..05a56d8c10 100644 --- a/target/hexagon/fma_emu.c +++ b/target/hexagon/fma_emu.c @@ -416,5 +416,5 @@ static SUFFIX accum_round_##SUFFIX(Accum a, float_statu= s * fp_status) \ * Theoretically, we only need to shift a maximum of one to the left i= f we \ * shifted out lots of bits from B, or if we had no shift / 1 shift st= icky \ - * shoudl be 0 \ + * should be 0 \ */ \ while ((int128_getlo(a.mant) & (1ULL << MANTBITS)) =3D=3D 0) { \ diff --git a/target/hexagon/idef-parser/README.rst b/target/hexagon/idef-pa= rser/README.rst index debeddfde5..d0aa34309b 100644 --- a/target/hexagon/idef-parser/README.rst +++ b/target/hexagon/idef-parser/README.rst @@ -441,5 +441,5 @@ interested part of the grammar. Run-time errors can be divided between lexing and parsing errors, lexing e= rrors are hard to detect, since the ``var`` token will catch everything which is= not -catched by other tokens, but easy to fix, because most of the time a simple +caught by other tokens, but easy to fix, because most of the time a simple regex editing will be enough. =20 diff --git a/target/hexagon/idef-parser/idef-parser.h b/target/hexagon/idef= -parser/idef-parser.h index d23e71f13b..3faa1deecd 100644 --- a/target/hexagon/idef-parser/idef-parser.h +++ b/target/hexagon/idef-parser/idef-parser.h @@ -74,5 +74,5 @@ typedef struct HexTmp { =20 /** - * Enum of the possible immediated, an immediate is a value which is known + * Enum of the possible immediate, an immediate is a value which is known * at tinycode generation time, e.g. an integer value, not a TCGv */ diff --git a/target/hexagon/idef-parser/parser-helpers.c b/target/hexagon/i= def-parser/parser-helpers.c index 7b5ebafec2..ec43343801 100644 --- a/target/hexagon/idef-parser/parser-helpers.c +++ b/target/hexagon/idef-parser/parser-helpers.c @@ -460,5 +460,5 @@ static bool try_find_variable(Context *c, YYLTYPE *locp, } =20 -/* Calls `try_find_variable` and asserts succcess. */ +/* Calls `try_find_variable` and asserts success. */ static void find_variable(Context *c, YYLTYPE *locp, HexValue *dst, @@ -550,5 +550,5 @@ HexValue gen_bin_cmp(Context *c, break; default: - fprintf(stderr, "Error in evalutating immediateness!"); + fprintf(stderr, "Error in evaluating immediateness!"); abort(); } @@ -1165,5 +1165,5 @@ void gen_rdeposit_op(Context *c, /* * Otherwise if the width is not known, we fallback on reimplementing - * desposit in TCG. + * deposit in TCG. */ HexValue begin_m =3D *begin; diff --git a/target/hexagon/imported/alu.idef b/target/hexagon/imported/alu= .idef index 58477ae40a..12d2aac5d4 100644 --- a/target/hexagon/imported/alu.idef +++ b/target/hexagon/imported/alu.idef @@ -293,14 +293,14 @@ Q6INSN(A4_combineii,"Rdd32=3Dcombine(#s8,#U6)",ATTRIB= S(),"Set two small immediates =20 Q6INSN(A2_combine_hh,"Rd32=3Dcombine(Rt.H32,Rs.H32)",ATTRIBS(), -"Combine two halfs into a register", {RdV =3D (fGETUHALF(1,RtV)<<16) | fGE= TUHALF(1,RsV);}) +"Combine two halves into a register", {RdV =3D (fGETUHALF(1,RtV)<<16) | fG= ETUHALF(1,RsV);}) =20 Q6INSN(A2_combine_hl,"Rd32=3Dcombine(Rt.H32,Rs.L32)",ATTRIBS(), -"Combine two halfs into a register", {RdV =3D (fGETUHALF(1,RtV)<<16) | fGE= TUHALF(0,RsV);}) +"Combine two halves into a register", {RdV =3D (fGETUHALF(1,RtV)<<16) | fG= ETUHALF(0,RsV);}) =20 Q6INSN(A2_combine_lh,"Rd32=3Dcombine(Rt.L32,Rs.H32)",ATTRIBS(), -"Combine two halfs into a register", {RdV =3D (fGETUHALF(0,RtV)<<16) | fGE= TUHALF(1,RsV);}) +"Combine two halves into a register", {RdV =3D (fGETUHALF(0,RtV)<<16) | fG= ETUHALF(1,RsV);}) =20 Q6INSN(A2_combine_ll,"Rd32=3Dcombine(Rt.L32,Rs.L32)",ATTRIBS(), -"Combine two halfs into a register", {RdV =3D (fGETUHALF(0,RtV)<<16) | fGE= TUHALF(0,RsV);}) +"Combine two halves into a register", {RdV =3D (fGETUHALF(0,RtV)<<16) | fG= ETUHALF(0,RsV);}) =20 Q6INSN(A2_tfril,"Rx.L32=3D#u16",ATTRIBS(), diff --git a/target/hexagon/imported/macros.def b/target/hexagon/imported/m= acros.def index e23f91562e..4bbcfdd5e1 100755 --- a/target/hexagon/imported/macros.def +++ b/target/hexagon/imported/macros.def @@ -903,5 +903,5 @@ DEF_MACRO( =20 DEF_MACRO( - fEA_GPI, /* Calculate EA with Global Poitner + Immediate */ + fEA_GPI, /* Calculate EA with Global Pointer + Immediate */ do { EA=3DfREAD_GP()+IMM; fGP_DOCHKPAGECROSS(fREAD_GP(),EA); } while (= 0), () diff --git a/target/hexagon/imported/mmvec/ext.idef b/target/hexagon/import= ed/mmvec/ext.idef index ead32c243b..98daabfb07 100644 --- a/target/hexagon/imported/mmvec/ext.idef +++ b/target/hexagon/imported/mmvec/ext.idef @@ -18,5 +18,5 @@ /*************************************************************************= ***** * - * HOYA: MULTI MEDIA INSTRUCITONS + * HOYA: MULTI MEDIA INSTRUCTIONS * *************************************************************************= *****/ @@ -296,5 +296,5 @@ MMVEC_COND_EACH_EA(vS32Ub,"Unaligned Vector Store",ATTR= IBS(ATTR_VMEMU,A_STORE,A_ MMVEC_EACH_EA(vS32b_new,"Aligned Vector Store New",ATTRIBS(ATTR_VMEM,A_STO= RE,A_CVI_NEW,A_DOTNEWVALUE,A_RESTRICT_SLOT0ONLY),,"vmem","=3DOs8.new",fSTOR= EMMV(EA,fNEWVREG(OsN))) =20 -// V65 store relase, zero byte store +// V65 store release, zero byte store MMVEC_EACH_EA(vS32b_srls,"Aligned Vector Scatter Release",ATTRIBS(ATTR_VME= M,A_STORE,A_CVI_SCATTER_RELEASE,A_CVI_NEW,A_RESTRICT_SLOT0ONLY),,"vmem",":s= catter_release",fSTORERELEASE(EA,0)) =20 @@ -2046,9 +2046,9 @@ VxV.uw[0] =3D RtV;) =20 =20 -ITERATOR_INSN_MPY_SLOT_LATE(32,lvsplatw, "Vd32=3Dvsplat(Rt32)", "Replicate= s scalar accross words in vector", VdV.uw[i] =3D RtV) +ITERATOR_INSN_MPY_SLOT_LATE(32,lvsplatw, "Vd32=3Dvsplat(Rt32)", "Replicate= s scalar across words in vector", VdV.uw[i] =3D RtV) =20 -ITERATOR_INSN_MPY_SLOT_LATE(16,lvsplath, "Vd32.h=3Dvsplat(Rt32)", "Replica= tes scalar accross halves in vector", VdV.uh[i] =3D RtV) +ITERATOR_INSN_MPY_SLOT_LATE(16,lvsplath, "Vd32.h=3Dvsplat(Rt32)", "Replica= tes scalar across halves in vector", VdV.uh[i] =3D RtV) =20 -ITERATOR_INSN_MPY_SLOT_LATE(8,lvsplatb, "Vd32.b=3Dvsplat(Rt32)", "Replicat= es scalar accross bytes in vector", VdV.ub[i] =3D RtV) +ITERATOR_INSN_MPY_SLOT_LATE(8,lvsplatb, "Vd32.b=3Dvsplat(Rt32)", "Replicat= es scalar across bytes in vector", VdV.ub[i] =3D RtV) =20 =20 diff --git a/tests/tcg/hexagon/fpstuff.c b/tests/tcg/hexagon/fpstuff.c index 344b9f7772..6aadaccabd 100644 --- a/tests/tcg/hexagon/fpstuff.c +++ b/tests/tcg/hexagon/fpstuff.c @@ -53,5 +53,5 @@ static void check_compare_exception(void) uint32_t usr; =20 - /* Check that FP compares are quiet (don't raise any execptions) */ + /* Check that FP compares are quiet (don't raise any exceptions) */ asm (CLEAR_FPSTATUS "p0 =3D sfcmp.eq(%2, %3)\n\t" diff --git a/tests/tcg/hexagon/test_clobber.S b/tests/tcg/hexagon/test_clob= ber.S index a7aeb2b60c..10046c30d2 100644 --- a/tests/tcg/hexagon/test_clobber.S +++ b/tests/tcg/hexagon/test_clobber.S @@ -1,4 +1,4 @@ /* - * Purpose: demonstrate the succesful operation of the register save mecha= nism, + * Purpose: demonstrate the successful operation of the register save mech= anism, * in which the caller saves the registers that will be clobbered, and res= tores * them after the call. --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770040317383.0096630049054; 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Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 12/24] hw/net: spelling fixes Date: Wed, 23 Aug 2023 08:51:43 +0300 Message-Id: <20230823055155.1917375-13-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770041751100005 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- hw/net/cadence_gem.c | 10 +++++----- hw/net/dp8393x.c | 2 +- hw/net/e1000_regs.h | 2 +- hw/net/e1000x_regs.h | 2 +- hw/net/fsl_etsec/rings.c | 2 +- hw/net/igb_regs.h | 4 ++-- hw/net/mcf_fec.c | 2 +- hw/net/rocker/rocker_fp.c | 2 +- hw/net/rtl8139.c | 2 +- hw/net/smc91c111.c | 2 +- hw/net/sungem.c | 2 +- hw/net/sunhme.c | 2 +- hw/net/virtio-net.c | 6 +++--- hw/net/vmxnet3.c | 2 +- hw/net/vmxnet3.h | 2 +- 15 files changed, 22 insertions(+), 22 deletions(-) diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 42ea2411a2..f445d8bb5e 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c @@ -82,6 +82,6 @@ #define GEM_SVLAN (0x000000C0 / 4) /* Stacked VLAN reg */ #define GEM_MODID (0x000000FC / 4) /* Module ID reg */ -#define GEM_OCTTXLO (0x00000100 / 4) /* Octects transmitted Low reg = */ -#define GEM_OCTTXHI (0x00000104 / 4) /* Octects transmitted High reg= */ +#define GEM_OCTTXLO (0x00000100 / 4) /* Octets transmitted Low reg */ +#define GEM_OCTTXHI (0x00000104 / 4) /* Octets transmitted High reg = */ #define GEM_TXCNT (0x00000108 / 4) /* Error-free Frames transmitte= d */ #define GEM_TXBCNT (0x0000010C / 4) /* Error-free Broadcast Frames = */ @@ -102,6 +102,6 @@ #define GEM_DEFERTXCNT (0x00000148 / 4) /* Deferred Transmission Frames= */ #define GEM_CSENSECNT (0x0000014C / 4) /* Carrier Sense Error Counter = */ -#define GEM_OCTRXLO (0x00000150 / 4) /* Octects Received register Lo= w */ -#define GEM_OCTRXHI (0x00000154 / 4) /* Octects Received register Hi= gh */ +#define GEM_OCTRXLO (0x00000150 / 4) /* Octets Received register Low= */ +#define GEM_OCTRXHI (0x00000154 / 4) /* Octets Received register Hig= h */ #define GEM_RXCNT (0x00000158 / 4) /* Error-free Frames Received */ #define GEM_RXBROADCNT (0x0000015C / 4) /* Error-free Broadcast Frames = RX */ @@ -955,5 +955,5 @@ static ssize_t gem_receive(NetClientState *nc, const ui= nt8_t *buf, size_t size) maf =3D gem_mac_address_filter(s, buf); if (maf =3D=3D GEM_RX_REJECT) { - return size; /* no, drop siliently b/c it's not an error */ + return size; /* no, drop silently b/c it's not an error */ } =20 diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index a596f7fbc6..c6f5fb7dce 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -552,5 +552,5 @@ static uint64_t dp8393x_read(void *opaque, hwaddr addr,= unsigned int size) } break; - /* All other registers have no special contraints */ + /* All other registers have no special constraints */ default: val =3D s->regs[reg]; diff --git a/hw/net/e1000_regs.h b/hw/net/e1000_regs.h index 8a4ce82034..39f4882510 100644 --- a/hw/net/e1000_regs.h +++ b/hw/net/e1000_regs.h @@ -131,5 +131,5 @@ #define E1000_GCR2 0x05B64 /* 3GIO Control Register 2 */ #define E1000_FFLT_DBG 0x05F04 /* Debug Register */ -#define E1000_HICR 0x08F00 /* Host Inteface Control */ +#define E1000_HICR 0x08F00 /* Host Interface Control */ =20 #define E1000_RXMTRL 0x0B634 /* Time sync Rx EtherType and Msg Type - = RW */ diff --git a/hw/net/e1000x_regs.h b/hw/net/e1000x_regs.h index 13760c66d3..cd896fc0ca 100644 --- a/hw/net/e1000x_regs.h +++ b/hw/net/e1000x_regs.h @@ -840,5 +840,5 @@ union e1000_rx_desc_packet_split { #define E1000_RXD_STAT_IXSM 0x04 /* Ignore checksum */ #define E1000_RXD_STAT_VP 0x08 /* IEEE VLAN Packet */ -#define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum caculated */ +#define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum calculated */ #define E1000_RXD_STAT_TCPCS 0x20 /* TCP xsum calculated */ #define E1000_RXD_STAT_IPCS 0x40 /* IP xsum calculated */ diff --git a/hw/net/fsl_etsec/rings.c b/hw/net/fsl_etsec/rings.c index 788463f1b6..e6c3bf5361 100644 --- a/hw/net/fsl_etsec/rings.c +++ b/hw/net/fsl_etsec/rings.c @@ -366,5 +366,5 @@ void etsec_walk_tx_ring(eTSEC *etsec, int ring_nbr) =20 /* Save the Buffer Descriptor Pointers to last bd that was not - * succesfully closed */ + * successfully closed */ etsec->regs[TBPTR0 + ring_nbr].value =3D bd_addr; =20 diff --git a/hw/net/igb_regs.h b/hw/net/igb_regs.h index 82ff195dfc..d6e0405d0a 100644 --- a/hw/net/igb_regs.h +++ b/hw/net/igb_regs.h @@ -365,5 +365,5 @@ union e1000_adv_rx_desc { #define E1000_VT_MSGTYPE_CTS 0x20000000 #define E1000_VT_MSGINFO_SHIFT 16 -/* bits 23:16 are used for exra info for certain messages */ +/* bits 23:16 are used for extra info for certain messages */ #define E1000_VT_MSGINFO_MASK (0xFF << E1000_VT_MSGINFO_SHIFT) =20 @@ -491,5 +491,5 @@ union e1000_adv_rx_desc { =20 #define E1000_VT_MSGINFO_SHIFT 16 -/* bits 23:16 are used for exra info for certain messages */ +/* bits 23:16 are used for extra info for certain messages */ #define E1000_VT_MSGINFO_MASK (0xFF << E1000_VT_MSGINFO_SHIFT) =20 diff --git a/hw/net/mcf_fec.c b/hw/net/mcf_fec.c index 8aa27bd322..ec3ddf520a 100644 --- a/hw/net/mcf_fec.c +++ b/hw/net/mcf_fec.c @@ -572,5 +572,5 @@ static ssize_t mcf_fec_receive(NetClientState *nc, cons= t uint8_t *buf, size_t si crc =3D cpu_to_be32(crc32(~0, buf, size)); crc_ptr =3D (uint8_t *)&crc; - /* Huge frames are truncted. */ + /* Huge frames are truncated. */ if (size > FEC_MAX_FRAME_SIZE) { size =3D FEC_MAX_FRAME_SIZE; diff --git a/hw/net/rocker/rocker_fp.c b/hw/net/rocker/rocker_fp.c index cbeed65bd5..9afd0c5e3f 100644 --- a/hw/net/rocker/rocker_fp.c +++ b/hw/net/rocker/rocker_fp.c @@ -135,5 +135,5 @@ static ssize_t fp_port_receive_iov(NetClientState *nc, = const struct iovec *iov, =20 /* If the port is disabled, we want to drop this pkt - * now rather than queing it for later. We don't want + * now rather than queueing it for later. We don't want * any stale pkts getting into the device when the port * transitions to enabled. diff --git a/hw/net/rtl8139.c b/hw/net/rtl8139.c index b4df75b2c9..4525fda383 100644 --- a/hw/net/rtl8139.c +++ b/hw/net/rtl8139.c @@ -101,5 +101,5 @@ enum RTL8139_registers { MAR0 =3D 8, /* Multicast filter. */ TxStatus0 =3D 0x10,/* Transmit status (Four 32bit registers). C mode o= nly */ - /* Dump Tally Conter control register(64bit). C+ mode= only */ + /* Dump Tally Counter control register(64bit). C+ mod= e only */ TxAddr0 =3D 0x20, /* Tx descriptors (also four 32bit). */ RxBuf =3D 0x30, diff --git a/hw/net/smc91c111.c b/hw/net/smc91c111.c index ad778cd8fc..ddbceda967 100644 --- a/hw/net/smc91c111.c +++ b/hw/net/smc91c111.c @@ -362,5 +362,5 @@ static void smc91c111_writeb(void *opaque, hwaddr offse= t, /* Not implemented. */ return; - case 10: /* Genral Purpose */ + case 10: /* General Purpose */ SET_LOW(gpr, value); return; diff --git a/hw/net/sungem.c b/hw/net/sungem.c index 510b370e5f..c2e2c90668 100644 --- a/hw/net/sungem.c +++ b/hw/net/sungem.c @@ -1229,5 +1229,5 @@ static void sungem_mmio_mif_write(void *opaque, hwadd= r addr, uint64_t val, return; /* No actual write */ case MIF_CFG: - /* Maintain the RO MDI bits to advertize an MDIO PHY on MDI0 */ + /* Maintain the RO MDI bits to advertise an MDIO PHY on MDI0 */ val &=3D ~MIF_CFG_MDI1; val |=3D MIF_CFG_MDI0; diff --git a/hw/net/sunhme.c b/hw/net/sunhme.c index 391d26fb82..64d4ea5850 100644 --- a/hw/net/sunhme.c +++ b/hw/net/sunhme.c @@ -902,5 +902,5 @@ static void sunhme_reset(DeviceState *ds) s->mifregs[HME_MIFI_CFG >> 2] |=3D HME_MIF_CFG_MDI0; =20 - /* Advetise auto, 100Mbps FD */ + /* Advertise auto, 100Mbps FD */ s->miiregs[MII_ANAR] =3D MII_ANAR_TXFD; s->miiregs[MII_BMSR] =3D MII_BMSR_AUTONEG | MII_BMSR_100TX_FD | diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c index 7102ec4817..57a359b7a5 100644 --- a/hw/net/virtio-net.c +++ b/hw/net/virtio-net.c @@ -1308,5 +1308,5 @@ static bool virtio_net_load_ebpf(VirtIONet *n) { if (!virtio_net_attach_ebpf_to_backend(n->nic, -1)) { - /* backend does't support steering ebpf */ + /* backend doesn't support steering ebpf */ return false; } @@ -2047,5 +2047,5 @@ static void virtio_net_rsc_extract_unit6(VirtioNetRsc= Chain *chain, unit->tcp_hdrlen =3D (htons(unit->tcp->th_offset_flags) & 0xF000) >> 1= 0; =20 - /* There is a difference between payload lenght in ipv4 and v6, + /* There is a difference between payload length in ipv4 and v6, ip header is excluded in ipv6 */ unit->payload =3D htons(*unit->ip_plen) - unit->tcp_hdrlen; @@ -3796,5 +3796,5 @@ static void virtio_net_instance_init(Object *obj) /* * The default config_size is sizeof(struct virtio_net_config). - * Can be overriden with virtio_net_set_config_size. + * Can be overridden with virtio_net_set_config_size. */ n->config_size =3D sizeof(struct virtio_net_config); diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c index 5dfacb1098..ea9e86476e 100644 --- a/hw/net/vmxnet3.c +++ b/hw/net/vmxnet3.c @@ -1885,5 +1885,5 @@ vmxnet3_io_bar1_read(void *opaque, hwaddr addr, unsig= ned size) =20 default: - VMW_CBPRN("Unknow read BAR1[%" PRIx64 "], %d bytes", addr, siz= e); + VMW_CBPRN("Unknown read BAR1[%" PRIx64 "], %d bytes", addr, si= ze); break; } diff --git a/hw/net/vmxnet3.h b/hw/net/vmxnet3.h index bf4f6de74a..f9283f9e7b 100644 --- a/hw/net/vmxnet3.h +++ b/hw/net/vmxnet3.h @@ -734,5 +734,5 @@ struct Vmxnet3_RxQueueDesc { struct Vmxnet3_RxQueueCtrl ctrl; struct Vmxnet3_RxQueueConf conf; - /* Driver read after a GET commad */ + /* Driver read after a GET command */ struct Vmxnet3_QueueStatus status; struct UPT1_RxStats stats; --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770062051388.95961817421323; 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Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 13/24] hw/pci: spelling fixes Date: Wed, 23 Aug 2023 08:51:44 +0300 Message-Id: <20230823055155.1917375-14-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770063643100005 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- hw/pci-bridge/cxl_downstream.c | 2 +- hw/pci-bridge/pci_expander_bridge.c | 2 +- hw/pci-host/bonito.c | 2 +- hw/pci-host/designware.c | 4 ++-- hw/pci-host/dino.c | 2 +- hw/pci-host/gpex-acpi.c | 2 +- hw/pci-host/gt64120.c | 4 ++-- hw/pci-host/pnv_phb.c | 2 +- hw/pci-host/pnv_phb3.c | 2 +- hw/pci-host/pnv_phb3_msi.c | 2 +- hw/pci-host/pnv_phb4.c | 6 +++--- hw/pci/pcie_aer.c | 2 +- hw/pci/shpc.c | 2 +- 13 files changed, 17 insertions(+), 17 deletions(-) diff --git a/hw/pci-bridge/cxl_downstream.c b/hw/pci-bridge/cxl_downstream.c index 54f507318f..5a2b749c8e 100644 --- a/hw/pci-bridge/cxl_downstream.c +++ b/hw/pci-bridge/cxl_downstream.c @@ -43,5 +43,5 @@ static void latch_registers(CXLDownstreamPort *dsp) } =20 -/* TODO: Look at sharing this code acorss all CXL port types */ +/* TODO: Look at sharing this code across all CXL port types */ static void cxl_dsp_dvsec_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, int len) diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expand= er_bridge.c index 613857b601..535889f7c2 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -264,5 +264,5 @@ static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin) /* * First carry out normal swizzle to handle - * multple root ports on a pxb instance. + * multiple root ports on a pxb instance. */ pin =3D pci_swizzle_map_irq_fn(pci_dev, pin); diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index 4701481b9b..ee6cb85e97 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -63,5 +63,5 @@ #endif =20 -/* from linux soure code. include/asm-mips/mips-boards/bonito64.h*/ +/* from linux source code. include/asm-mips/mips-boards/bonito64.h*/ #define BONITO_BOOT_BASE 0x1fc00000 #define BONITO_BOOT_SIZE 0x00100000 diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index 388d252ee2..e325514372 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -489,5 +489,5 @@ static void designware_pcie_root_realize(PCIDevice *dev= , Error **errp) /* * If no inbound iATU windows are configured, HW defaults to - * letting inbound TLPs to pass in. We emulate that by exlicitly + * letting inbound TLPs to pass in. We emulate that by explicitly * configuring first inbound window to cover all of target's * address space. @@ -504,5 +504,5 @@ static void designware_pcie_root_realize(PCIDevice *dev= , Error **errp) root, "pcie-msi", 0x4); /* - * We initially place MSI interrupt I/O region a adress 0 and + * We initially place MSI interrupt I/O region a address 0 and * disable it. It'll be later moved to correct offset and enabled * in designware_pcie_root_update_msi_mapping() as a part of diff --git a/hw/pci-host/dino.c b/hw/pci-host/dino.c index e8eaebca54..82503229fa 100644 --- a/hw/pci-host/dino.c +++ b/hw/pci-host/dino.c @@ -1,4 +1,4 @@ /* - * HP-PARISC Dino PCI chipset emulation, as in B160L and similiar machines + * HP-PARISC Dino PCI chipset emulation, as in B160L and similar machines * * (C) 2017-2019 by Helge Deller diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c index 7c7316bc96..87ba074254 100644 --- a/hw/pci-host/gpex-acpi.c +++ b/hw/pci-host/gpex-acpi.c @@ -178,5 +178,5 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *= cfg) =20 /* - * Resources defined for PXBs are composed by the folling part= s: + * Resources defined for PXBs are composed by the following pa= rts: * 1. The resources the pci-brige/pcie-root-port need. * 2. The resources the devices behind pxb need. diff --git a/hw/pci-host/gt64120.c b/hw/pci-host/gt64120.c index 82c15edb46..143bf053d7 100644 --- a/hw/pci-host/gt64120.c +++ b/hw/pci-host/gt64120.c @@ -332,7 +332,7 @@ static void gt64120_update_pci_cfgdata_mapping(GT64120S= tate *s) * The setting of the MByteSwap bit and MWordSwap bit in the PCI Inter= nal * Command Register determines how data transactions from the CPU to/f= rom - * PCI are handled along with the setting of the Endianess bit in the = CPU + * PCI are handled along with the setting of the Endianness bit in the= CPU * Configuration Register. See: - * - Table 16: 32-bit PCI Transaction Endianess + * - Table 16: 32-bit PCI Transaction Endianness * - Table 158: PCI_0 Command, Offset: 0xc00 */ diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c index 82332d7a05..157c00782c 100644 --- a/hw/pci-host/pnv_phb.c +++ b/hw/pci-host/pnv_phb.c @@ -26,5 +26,5 @@ * Otherwise use object_typename[index] as QOM id. * - * This helper does both operations at the same time because seting + * This helper does both operations at the same time because setting * a new QOM child will erase the bus parent of the device. This happens * because object_unparent() will call object_property_del_child(), diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 7a21497cf8..c5e58f4086 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -758,5 +758,5 @@ static void pnv_phb3_translate_tve(PnvPhb3DMASpace *ds,= hwaddr addr, * * TODO: Venice/Murano support it on bottom window above 4G and - * Naples suports it on everything + * Naples supports it on everything */ if (!(tve & PPC_BIT(51))) { diff --git a/hw/pci-host/pnv_phb3_msi.c b/hw/pci-host/pnv_phb3_msi.c index 41e63b066f..dc8d8637f2 100644 --- a/hw/pci-host/pnv_phb3_msi.c +++ b/hw/pci-host/pnv_phb3_msi.c @@ -282,5 +282,5 @@ static void phb3_msi_instance_init(Object *obj) OBJ_PROP_LINK_STRONG); =20 - /* Will be overriden later */ + /* Will be overridden later */ ics->offset =3D 0; } diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 6232cbeee1..29cb11a5d9 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -208,5 +208,5 @@ static void pnv_phb4_check_mbt(PnvPHB4 *phb, uint32_t i= ndex) } =20 - /* TODO: Figure out how to implemet/decode AOMASK */ + /* TODO: Figure out how to implement/decode AOMASK */ =20 /* Check if it matches an enabled MMIO region in the PEC stack */ @@ -392,5 +392,5 @@ static void pnv_phb4_ioda_write(PnvPHB4 *phb, uint64_t = val) *tptr =3D val; =20 - /* Copy accross the valid bit to the other half */ + /* Copy across the valid bit to the other half */ phb->ioda_MBT[idx ^ 1] &=3D 0x7fffffffffffffffull; phb->ioda_MBT[idx ^ 1] |=3D 0x8000000000000000ull & val; @@ -1409,5 +1409,5 @@ static void pnv_phb4_msi_write(void *opaque, hwaddr a= ddr, } =20 - /* TODO: check PE/MSI assignement */ + /* TODO: check PE/MSI assignment */ =20 qemu_irq_pulse(phb->qirqs[src]); diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c index 374d593ead..b68c7ecb49 100644 --- a/hw/pci/pcie_aer.c +++ b/hw/pci/pcie_aer.c @@ -325,5 +325,5 @@ static void pcie_aer_msg_root_port(PCIDevice *dev, cons= t PCIEAERMsg *msg) * So just discard the error for now. * OS which cares of aer would receive errors via - * native aer mechanims, so this wouldn't matter. + * native aer mechanisms, so this wouldn't matter. */ } diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c index e7bc7192f1..df7f370111 100644 --- a/hw/pci/shpc.c +++ b/hw/pci/shpc.c @@ -616,5 +616,5 @@ int shpc_init(PCIDevice *d, PCIBus *sec_bus, MemoryRegi= on *bar, if (nslots > SHPC_MAX_SLOTS || SHPC_IDX_TO_PCI(nslots) > PCI_SLOT_MAX) { - /* TODO: report an error mesage that makes sense. */ + /* TODO: report an error message that makes sense. */ return -EINVAL; } --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770150859500.5091786764815; Tue, 22 Aug 2023 22:55:50 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgnn-0001lE-OM; Wed, 23 Aug 2023 01:53:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgnl-0001k6-4d for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:09 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgni-0007Qo-PQ for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:08 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id B5EC01C39B for ; Wed, 23 Aug 2023 08:52:21 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 60A0A21243; Wed, 23 Aug 2023 08:52:03 +0300 (MSK) Received: (nullmailer pid 1917495 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 14/24] hw/tpm: spelling fixes Date: Wed, 23 Aug 2023 08:51:45 +0300 Message-Id: <20230823055155.1917375-15-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770152753100003 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- hw/tpm/tpm_tis.h | 2 +- hw/tpm/tpm_tis_common.c | 2 +- hw/tpm/tpm_tis_i2c.c | 4 ++-- hw/tpm/tpm_tis_isa.c | 2 +- hw/tpm/tpm_tis_sysbus.c | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/tpm/tpm_tis.h b/hw/tpm/tpm_tis.h index 6f29a508dd..6f14896b97 100644 --- a/hw/tpm/tpm_tis.h +++ b/hw/tpm/tpm_tis.h @@ -20,5 +20,5 @@ * * TPM TIS for TPM 2 implementation following TCG PC Client Platform - * TPM Profile (PTP) Specification, Familiy 2.0, Revision 00.43 + * TPM Profile (PTP) Specification, Family 2.0, Revision 00.43 */ #ifndef TPM_TPM_TIS_H diff --git a/hw/tpm/tpm_tis_common.c b/hw/tpm/tpm_tis_common.c index c07c179dbc..279ce436b5 100644 --- a/hw/tpm/tpm_tis_common.c +++ b/hw/tpm/tpm_tis_common.c @@ -21,5 +21,5 @@ * * TPM TIS for TPM 2 implementation following TCG PC Client Platform - * TPM Profile (PTP) Specification, Familiy 2.0, Revision 00.43 + * TPM Profile (PTP) Specification, Family 2.0, Revision 00.43 */ #include "qemu/osdep.h" diff --git a/hw/tpm/tpm_tis_i2c.c b/hw/tpm/tpm_tis_i2c.c index b695fd3a46..4ecea7fa3e 100644 --- a/hw/tpm/tpm_tis_i2c.c +++ b/hw/tpm/tpm_tis_i2c.c @@ -14,5 +14,5 @@ * * TPM TIS for TPM 2 implementation following TCG PC Client Platform - * TPM Profile (PTP) Specification, Familiy 2.0, Revision 00.43 + * TPM Profile (PTP) Specification, Family 2.0, Revision 00.43 * */ @@ -508,5 +508,5 @@ static void tpm_tis_i2c_realizefn(DeviceState *dev, Err= or **errp) =20 /* - * Get the backend pointer. It is not initialized propery during + * Get the backend pointer. It is not initialized properly during * device_class_set_props */ diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c index 91e3792248..0367401586 100644 --- a/hw/tpm/tpm_tis_isa.c +++ b/hw/tpm/tpm_tis_isa.c @@ -20,5 +20,5 @@ * * TPM TIS for TPM 2 implementation following TCG PC Client Platform - * TPM Profile (PTP) Specification, Familiy 2.0, Revision 00.43 + * TPM Profile (PTP) Specification, Family 2.0, Revision 00.43 */ =20 diff --git a/hw/tpm/tpm_tis_sysbus.c b/hw/tpm/tpm_tis_sysbus.c index 6724b3d4f6..2fc550f119 100644 --- a/hw/tpm/tpm_tis_sysbus.c +++ b/hw/tpm/tpm_tis_sysbus.c @@ -20,5 +20,5 @@ * * TPM TIS for TPM 2 implementation following TCG PC Client Platform - * TPM Profile (PTP) Specification, Familiy 2.0, Revision 00.43 + * TPM Profile (PTP) Specification, Family 2.0, Revision 00.43 */ =20 --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 169277002643360.56600553790872; Tue, 22 Aug 2023 22:53:46 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgnz-0002LV-Vg; Wed, 23 Aug 2023 01:53:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgnx-00025M-Lf for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:21 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgnu-0007RN-U2 for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:21 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id DDD811C39C for ; Wed, 23 Aug 2023 08:52:21 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 89B2721244; Wed, 23 Aug 2023 08:52:03 +0300 (MSK) Received: (nullmailer pid 1917498 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 15/24] hw/usb hw/ide hw/i2c: spelling fixes Date: Wed, 23 Aug 2023 08:51:46 +0300 Message-Id: <20230823055155.1917375-16-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770027440100008 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- hw/i2c/pm_smbus.c | 2 +- hw/i2c/pmbus_device.c | 2 +- hw/i2c/smbus_slave.c | 2 +- hw/ide/ahci_internal.h | 4 ++-- hw/ide/cmd646.c | 2 +- hw/ide/core.c | 2 +- hw/usb/ccid-card-emulated.c | 2 +- hw/usb/hcd-ehci.c | 6 +++--- hw/usb/hcd-ohci.c | 2 +- hw/usb/quirks.h | 2 +- hw/usb/redirect.c | 2 +- hw/usb/trace-events | 2 +- hw/usb/xen-usb.c | 2 +- 13 files changed, 16 insertions(+), 16 deletions(-) diff --git a/hw/i2c/pm_smbus.c b/hw/i2c/pm_smbus.c index d7eae548cb..9ad6a47739 100644 --- a/hw/i2c/pm_smbus.c +++ b/hw/i2c/pm_smbus.c @@ -1,5 +1,5 @@ /* * PC SMBus implementation - * splitted from acpi.c + * split from acpi.c * * Copyright (c) 2006 Fabrice Bellard diff --git a/hw/i2c/pmbus_device.c b/hw/i2c/pmbus_device.c index 44fe4eddbb..426f72ac60 100644 --- a/hw/i2c/pmbus_device.c +++ b/hw/i2c/pmbus_device.c @@ -1624,5 +1624,5 @@ static int pmbus_write_data(SMBusDevice *smd, uint8_t= *buf, uint8_t len) =20 passthrough: - /* Unimplimented registers get passed to the device */ + /* Unimplemented registers get passed to the device */ default: if (pmdc->write_data) { diff --git a/hw/i2c/smbus_slave.c b/hw/i2c/smbus_slave.c index feb3ec6333..2ef2c7c5f6 100644 --- a/hw/i2c/smbus_slave.c +++ b/hw/i2c/smbus_slave.c @@ -3,5 +3,5 @@ * * This code is a helper for SMBus device emulation. It implements an - * I2C device inteface and runs the SMBus protocol from the device + * I2C device interface and runs the SMBus protocol from the device * point of view and maps those to simple calls to emulate. * diff --git a/hw/ide/ahci_internal.h b/hw/ide/ahci_internal.h index 2480455372..c244bbd8be 100644 --- a/hw/ide/ahci_internal.h +++ b/hw/ide/ahci_internal.h @@ -62,5 +62,5 @@ enum AHCIHostReg { AHCI_HOST_REG_IRQ_STAT =3D 2, /* IS: interrupt status */ AHCI_HOST_REG_PORTS_IMPL =3D 3, /* PI: bitmap of implemented ports */ - AHCI_HOST_REG_VERSION =3D 4, /* VS: AHCI spec. version compliancy = */ + AHCI_HOST_REG_VERSION =3D 4, /* VS: AHCI spec. version compliance = */ AHCI_HOST_REG_CCC_CTL =3D 5, /* CCC_CTL: CCC Control */ AHCI_HOST_REG_CCC_PORTS =3D 6, /* CCC_PORTS: CCC Ports */ @@ -68,5 +68,5 @@ enum AHCIHostReg { AHCI_HOST_REG_EM_CTL =3D 8, /* EM_CTL: Enclosure Mgmt Control */ AHCI_HOST_REG_CAP2 =3D 9, /* CAP2: host capabilities, extended = */ - AHCI_HOST_REG_BOHC =3D 10, /* BOHC: firmare/os handoff ctrl & st= atus */ + AHCI_HOST_REG_BOHC =3D 10, /* BOHC: firmware/os handoff ctrl & s= tatus */ AHCI_HOST_REG__COUNT =3D 11 }; diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c index cabe9048b1..c0bcfa4414 100644 --- a/hw/ide/cmd646.c +++ b/hw/ide/cmd646.c @@ -258,5 +258,5 @@ static void pci_cmd646_ide_realize(PCIDevice *dev, Erro= r **errp) pci_conf[CNTRL] =3D CNTRL_EN_CH0; // enable IDE0 if (d->secondary) { - /* XXX: if not enabled, really disable the seconday IDE controller= */ + /* XXX: if not enabled, really disable the secondary IDE controlle= r */ pci_conf[CNTRL] |=3D CNTRL_EN_CH1; /* enable IDE1 */ } diff --git a/hw/ide/core.c b/hw/ide/core.c index de48ff9f86..ee116891ed 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -1699,5 +1699,5 @@ static bool cmd_set_features(IDEState *s, uint8_t cmd) put_le16(identify_data + 88, 0x3f); break; - case 0x02: /* sigle word dma mode*/ + case 0x02: /* single word dma mode */ put_le16(identify_data + 62, 0x07 | (1 << (val + 8))); put_le16(identify_data + 63, 0x07); diff --git a/hw/usb/ccid-card-emulated.c b/hw/usb/ccid-card-emulated.c index c328660075..3ee9c73b87 100644 --- a/hw/usb/ccid-card-emulated.c +++ b/hw/usb/ccid-card-emulated.c @@ -519,5 +519,5 @@ static void emulated_realize(CCIDCardState *base, Error= **errp) } =20 - /* TODO: a passthru backened that works on local machine. third card t= ype?*/ + /* TODO: a passthru backend that works on local machine. third card ty= pe?*/ if (card->backend =3D=3D BACKEND_CERTIFICATES) { if (card->cert1 !=3D NULL && card->cert2 !=3D NULL && card->cert3 = !=3D NULL) { diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index c930c60921..19b4534c20 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -1465,5 +1465,5 @@ static int ehci_process_itd(EHCIState *ehci, usb_packet_unmap(&ehci->ipacket, &ehci->isgl); } else { - DPRINTF("ISOCH: attempt to addess non-iso endpoint\n"); + DPRINTF("ISOCH: attempt to address non-iso endpoint\n"= ); ehci->ipacket.status =3D USB_RET_NAK; ehci->ipacket.actual_length =3D 0; @@ -1514,5 +1514,5 @@ static int ehci_process_itd(EHCIState *ehci, =20 /* This state is the entry point for asynchronous schedule - * processing. Entry here consitutes a EHCI start event state (4.8.5) + * processing. Entry here constitutes a EHCI start event state (4.8.5) */ static int ehci_state_waitlisthead(EHCIState *ehci, int async) @@ -2459,5 +2459,5 @@ static void usb_ehci_vm_state_change(void *opaque, bo= ol running, RunState state) * The schedule rebuilt from guest memory could cause the migration de= st * to miss a QH unlink, and fail to cancel packets, since the unlinked= QH - * will never have existed on the destination. Therefor we must flush = the + * will never have existed on the destination. Therefore we must flush= the * async schedule on savevm to catch any not yet noticed unlinks. */ diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index cc5cde6983..7ff1b65ced 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -1356,5 +1356,5 @@ static uint32_t ohci_get_frame_remaining(OHCIState *o= hci) return ohci->frt << 31; } - /* Being in USB operational state guarnatees sof_time was set already.= */ + /* Being in USB operational state guarantees sof_time was set already.= */ tks =3D qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - ohci->sof_time; if (tks < 0) { diff --git a/hw/usb/quirks.h b/hw/usb/quirks.h index c3e595f40b..94b2c95341 100644 --- a/hw/usb/quirks.h +++ b/hw/usb/quirks.h @@ -68,5 +68,5 @@ static const struct usb_device_id usbredir_raw_serial_ids= [] =3D { { USB_DEVICE(0x10C4, 0x803B) }, /* Pololu USB-serial converter */ { USB_DEVICE(0x10C4, 0x8044) }, /* Cygnal Debug Adapter */ - { USB_DEVICE(0x10C4, 0x804E) }, /* Software Bisque Paramount ME build-= in converter */ + { USB_DEVICE(0x10C4, 0x804E) }, /* Software Bisque Paramount ME built-= in converter */ { USB_DEVICE(0x10C4, 0x8053) }, /* Enfora EDG1228 */ { USB_DEVICE(0x10C4, 0x8054) }, /* Enfora GSM2228 */ diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c index 39fbaaab16..0e256c1eca 100644 --- a/hw/usb/redirect.c +++ b/hw/usb/redirect.c @@ -472,5 +472,5 @@ static int bufp_alloc(USBRedirDevice *dev, uint8_t *dat= a, uint16_t len, dev->endpoint[EP2I(ep)].bufpq_dropping_packets =3D 1; } - /* Since we're interupting the stream anyways, drop enough packets to = get + /* Since we're interrupting the stream anyways, drop enough packets to= get back to our target buffer size */ if (dev->endpoint[EP2I(ep)].bufpq_dropping_packets) { diff --git a/hw/usb/trace-events b/hw/usb/trace-events index 6bb9655c8d..ed7dc210d3 100644 --- a/hw/usb/trace-events +++ b/hw/usb/trace-events @@ -249,5 +249,5 @@ usb_set_device_feature(int addr, int feature, int ret) = "dev %d, feature %d, ret # dev-hub.c usb_hub_reset(int addr) "dev %d" -usb_hub_control(int addr, int request, int value, int index, int length) "= dev %d, req 0x%x, value %d, index %d, langth %d" +usb_hub_control(int addr, int request, int value, int index, int length) "= dev %d, req 0x%x, value %d, index %d, length %d" usb_hub_get_port_status(int addr, int nr, int status, int changed) "dev %d= , port %d, status 0x%x, changed 0x%x" usb_hub_set_port_feature(int addr, int nr, const char *f) "dev %d, port %d= , feature %s" diff --git a/hw/usb/xen-usb.c b/hw/usb/xen-usb.c index 38ee660a30..09ec326aea 100644 --- a/hw/usb/xen-usb.c +++ b/hw/usb/xen-usb.c @@ -452,5 +452,5 @@ static int usbback_check_and_submit(struct usbback_req = *usbback_req) =20 /* - * When the device is first connected or resetted, USB device has no + * When the device is first connected or reset, USB device has no * address. In this initial state, following requests are sent to devi= ce * address (#0), --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770069284832.1560441307342; Tue, 22 Aug 2023 22:54:29 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgo2-0002Z5-F8; Wed, 23 Aug 2023 01:53:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgny-0002EQ-HL for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:22 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgnw-0007RX-6C for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:22 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 0419C1C39D for ; Wed, 23 Aug 2023 08:52:22 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id B14C721245; Wed, 23 Aug 2023 08:52:03 +0300 (MSK) Received: (nullmailer pid 1917501 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 16/24] hw/display: spelling fixes Date: Wed, 23 Aug 2023 08:51:47 +0300 Message-Id: <20230823055155.1917375-17-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770069813100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- hw/display/bochs-display.c | 2 +- hw/display/qxl.c | 2 +- hw/display/ssd0303.c | 2 +- hw/display/ssd0323.c | 2 +- hw/display/xlnx_dp.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c index e7ec268184..9138e98c3b 100644 --- a/hw/display/bochs-display.c +++ b/hw/display/bochs-display.c @@ -165,5 +165,5 @@ static int bochs_display_get_mode(BochsDisplayState *s, switch (vbe[VBE_DISPI_INDEX_BPP]) { case 16: - /* best effort: support native endianess only */ + /* best effort: support native endianness only */ mode->format =3D PIXMAN_r5g6b5; mode->bytepp =3D 2; diff --git a/hw/display/qxl.c b/hw/display/qxl.c index f1c0eb7dfc..af941fb0c2 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -1545,5 +1545,5 @@ static void qxl_create_guest_primary(PCIQXLDevice *qx= l, int loadvm, } =20 -/* return 1 if surface destoy was initiated (in QXL_ASYNC case) or +/* return 1 if surface destroy was initiated (in QXL_ASYNC case) or * done (in QXL_SYNC case), 0 otherwise. */ static int qxl_destroy_primary(PCIQXLDevice *d, qxl_async_io async) diff --git a/hw/display/ssd0303.c b/hw/display/ssd0303.c index d67b0ad7b5..32b32a3044 100644 --- a/hw/display/ssd0303.c +++ b/hw/display/ssd0303.c @@ -9,5 +9,5 @@ =20 /* The controller can support a variety of different displays, but we only - implement one. Most of the commends relating to brightness and geometry + implement one. Most of the commands relating to brightness and geometry setup are ignored. */ =20 diff --git a/hw/display/ssd0323.c b/hw/display/ssd0323.c index ab229d32b7..09b1bbed0a 100644 --- a/hw/display/ssd0323.c +++ b/hw/display/ssd0323.c @@ -9,5 +9,5 @@ =20 /* The controller can support a variety of different displays, but we only - implement one. Most of the commends relating to brightness and geometry + implement one. Most of the commands relating to brightness and geometry setup are ignored. */ =20 diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index b0828d65aa..822355ecc6 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -381,5 +381,5 @@ static void xlnx_dp_audio_callback(void *opaque, int av= ail) { /* - * Get some data from the DPDMA and compute these datas. + * Get some data from the DPDMA and compute these data. * Then wait for QEMU's audio subsystem to call this callback. */ --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770099953854.2356683467632; Tue, 22 Aug 2023 22:54:59 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgoI-0003g9-PY; Wed, 23 Aug 2023 01:53:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgoB-0003MP-FF for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:35 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgo8-0007Rs-P7 for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:35 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 20B0F1C39E for ; Wed, 23 Aug 2023 08:52:22 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id CBC7421246; Wed, 23 Aug 2023 08:52:03 +0300 (MSK) Received: (nullmailer pid 1917504 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 17/24] xen: spelling fixes Date: Wed, 23 Aug 2023 08:51:48 +0300 Message-Id: <20230823055155.1917375-18-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770102052100007 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- hw/xen/xen_pvdev.c | 2 +- include/hw/xen/interface/arch-x86/xen-x86_64.h | 2 +- include/hw/xen/interface/arch-x86/xen.h | 2 +- include/hw/xen/interface/event_channel.h | 2 +- include/hw/xen/interface/grant_table.h | 2 +- include/hw/xen/interface/hvm/hvm_op.h | 2 +- include/hw/xen/interface/io/blkif.h | 6 +++--- include/hw/xen/interface/io/fbif.h | 2 +- include/hw/xen/interface/io/kbdif.h | 2 +- include/hw/xen/interface/memory.h | 2 +- include/hw/xen/interface/physdev.h | 4 ++-- include/hw/xen/interface/xen.h | 4 ++-- 12 files changed, 16 insertions(+), 16 deletions(-) diff --git a/hw/xen/xen_pvdev.c b/hw/xen/xen_pvdev.c index be1504b82c..c5ad71e8dc 100644 --- a/hw/xen/xen_pvdev.c +++ b/hw/xen/xen_pvdev.c @@ -90,5 +90,5 @@ char *xenstore_read_str(const char *base, const char *nod= e) if (str !=3D NULL) { /* move to qemu-allocated memory to make sure - * callers can savely g_free() stuff. */ + * callers can safely g_free() stuff. */ ret =3D g_strdup(str); free(str); diff --git a/include/hw/xen/interface/arch-x86/xen-x86_64.h b/include/hw/xe= n/interface/arch-x86/xen-x86_64.h index 40aed14366..eae96f4f67 100644 --- a/include/hw/xen/interface/arch-x86/xen-x86_64.h +++ b/include/hw/xen/interface/arch-x86/xen-x86_64.h @@ -107,5 +107,5 @@ * RING2 -> RING3 kernel mode. * RING3 -> RING3 user mode. - * However RING0 indicates that the guest kernel should return to iteself + * However RING0 indicates that the guest kernel should return to itself * directly with * orb $3,1*8(%rsp) diff --git a/include/hw/xen/interface/arch-x86/xen.h b/include/hw/xen/inter= face/arch-x86/xen.h index 7acd94c8eb..efa67d1499 100644 --- a/include/hw/xen/interface/arch-x86/xen.h +++ b/include/hw/xen/interface/arch-x86/xen.h @@ -140,5 +140,5 @@ typedef unsigned long xen_ulong_t; * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate * privilege levels as follows: - * Level =3D=3D 0: Noone may enter + * Level =3D=3D 0: No one may enter * Level =3D=3D 1: Kernel may enter * Level =3D=3D 2: Kernel may enter diff --git a/include/hw/xen/interface/event_channel.h b/include/hw/xen/inte= rface/event_channel.h index 73c9f38ce1..9073d3852f 100644 --- a/include/hw/xen/interface/event_channel.h +++ b/include/hw/xen/interface/event_channel.h @@ -320,5 +320,5 @@ typedef struct evtchn_set_priority evtchn_set_priority_= t; * ` HYPERVISOR_event_channel_op_compat(struct evtchn_op *op) * ` - * Superceded by new event_channel_op() hypercall since 0x00030202. + * Superseded by new event_channel_op() hypercall since 0x00030202. */ struct evtchn_op { diff --git a/include/hw/xen/interface/grant_table.h b/include/hw/xen/interf= ace/grant_table.h index 7934d7b718..f8e4398ecd 100644 --- a/include/hw/xen/interface/grant_table.h +++ b/include/hw/xen/interface/grant_table.h @@ -625,5 +625,5 @@ DEFINE_XEN_GUEST_HANDLE(gnttab_cache_flush_t); * GNTMAP_contains_pte subflag: * 0 =3D> This map request contains a host virtual address. - * 1 =3D> This map request contains the machine addess of the PTE to upd= ate. + * 1 =3D> This map request contains the machine address of the PTE to up= date. */ #define _GNTMAP_contains_pte (4) diff --git a/include/hw/xen/interface/hvm/hvm_op.h b/include/hw/xen/interfa= ce/hvm/hvm_op.h index 870ec52060..188960da7e 100644 --- a/include/hw/xen/interface/hvm/hvm_op.h +++ b/include/hw/xen/interface/hvm/hvm_op.h @@ -355,5 +355,5 @@ struct xen_hvm_altp2m_op { /* Get the active vcpu p2m index */ #define HVMOP_altp2m_get_p2m_idx 14 -/* Set the "Supress #VE" bit for a range of pages */ +/* Set the "Suppress #VE" bit for a range of pages */ #define HVMOP_altp2m_set_suppress_ve_multi 15 /* Set visibility for a given altp2m view */ diff --git a/include/hw/xen/interface/io/blkif.h b/include/hw/xen/interface= /io/blkif.h index 4cdba79aba..507d5170db 100644 --- a/include/hw/xen/interface/io/blkif.h +++ b/include/hw/xen/interface/io/blkif.h @@ -60,5 +60,5 @@ * values are encoded in decimal. Integer value ranges listed below are * expressed as fixed sized integer types capable of storing the conversion - * of a properly formated node string, without loss of information. + * of a properly formatted node string, without loss of information. * * Any specified default value is in effect if the corresponding XenBus no= de @@ -259,5 +259,5 @@ * * NOTE: Because of implementation bugs in some frontends this must be - * set to 512, unless the frontend advertizes a non-zero value + * set to 512, unless the frontend advertises a non-zero value * in its "feature-large-sector-size" xenbus node. (See below). * @@ -416,5 +416,5 @@ * (9) Linux implementation doesn't have a limit on the maximum number of * grants that can be persistently mapped in the frontend driver, but - * due to the frontent driver implementation it should never be bigger + * due to the frontend driver implementation it should never be bigger * than RING_SIZE * BLKIF_MAX_SEGMENTS_PER_REQUEST. *(10) The discard-secure property may be present and will be set to 1 if = the diff --git a/include/hw/xen/interface/io/fbif.h b/include/hw/xen/interface/= io/fbif.h index cc25aab32e..098561c55a 100644 --- a/include/hw/xen/interface/io/fbif.h +++ b/include/hw/xen/interface/io/fbif.h @@ -90,5 +90,5 @@ union xenfb_out_event * refresh the framebuffer (and send an update notification event if * those have been requested), then use the update frequency to guide - * their periodical refreshs. + * their periodical refreshes. */ #define XENFB_TYPE_REFRESH_PERIOD 1 diff --git a/include/hw/xen/interface/io/kbdif.h b/include/hw/xen/interface= /io/kbdif.h index a6b01c52c7..6fb73c8004 100644 --- a/include/hw/xen/interface/io/kbdif.h +++ b/include/hw/xen/interface/io/kbdif.h @@ -40,5 +40,5 @@ * values are encoded in decimal. Integer value ranges listed below are * expressed as fixed sized integer types capable of storing the conversion - * of a properly formated node string, without loss of information. + * of a properly formatted node string, without loss of information. * *************************************************************************= **** diff --git a/include/hw/xen/interface/memory.h b/include/hw/xen/interface/m= emory.h index 383a9468c3..b5edabf63c 100644 --- a/include/hw/xen/interface/memory.h +++ b/include/hw/xen/interface/memory.h @@ -185,5 +185,5 @@ struct xen_machphys_mfn_list { /* * Pointer to buffer to fill with list of extent starts. If there are - * any large discontiguities in the machine address space, 2MB gaps in + * any large discontinuities in the machine address space, 2MB gaps in * the machphys table will be represented by an MFN base of zero. */ diff --git a/include/hw/xen/interface/physdev.h b/include/hw/xen/interface/= physdev.h index d271766ad0..55cd5892ac 100644 --- a/include/hw/xen/interface/physdev.h +++ b/include/hw/xen/interface/physdev.h @@ -224,5 +224,5 @@ DEFINE_XEN_GUEST_HANDLE(physdev_manage_pci_ext_t); =20 /* - * Argument to physdev_op_compat() hypercall. Superceded by new physdev_op= () + * Argument to physdev_op_compat() hypercall. Superseded by new physdev_op= () * hypercall since 0x00030202. */ @@ -350,5 +350,5 @@ DEFINE_XEN_GUEST_HANDLE(physdev_dbgp_op_t); #if __XEN_INTERFACE_VERSION__ < 0x00040600 /* - * These all-capitals physdev operation names are superceded by the new na= mes + * These all-capitals physdev operation names are superseded by the new na= mes * (defined above) since interface version 0x00030202. The guard above was * added post-4.5 only though and hence shouldn't check for 0x00030202. diff --git a/include/hw/xen/interface/xen.h b/include/hw/xen/interface/xen.h index e373592c33..8c7914bbfb 100644 --- a/include/hw/xen/interface/xen.h +++ b/include/hw/xen/interface/xen.h @@ -607,5 +607,5 @@ DEFINE_XEN_GUEST_HANDLE(mmuext_op_t); =20 /* - * DOMID_COW is used as the owner of sharable pages */ + * DOMID_COW is used as the owner of shareable pages */ #define DOMID_COW xen_mk_uint(0x7FF3) =20 @@ -751,5 +751,5 @@ struct shared_info { * 1. Bi-directional inter- and intra-domain connections. Domains must * arrange out-of-band to set up a connection (usually by allocati= ng - * an unbound 'listener' port and avertising that via a storage se= rvice + * an unbound 'listener' port and advertising that via a storage s= ervice * such as xenstore). * 2. Physical interrupts. A domain with suitable hardware-access --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770027183481.71081214142055; Tue, 22 Aug 2023 22:53:47 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgoJ-00040B-Jq; Wed, 23 Aug 2023 01:53:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgoC-0003Sr-65 for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:36 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgo9-0007S1-NN for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:35 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 43F211C39F for ; Wed, 23 Aug 2023 08:52:22 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id E850D21247; Wed, 23 Aug 2023 08:52:03 +0300 (MSK) Received: (nullmailer pid 1917507 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 18/24] audio: spelling fixes Date: Wed, 23 Aug 2023 08:51:49 +0300 Message-Id: <20230823055155.1917375-19-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770027424100007 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- audio/mixeng.h | 2 +- hw/audio/fmopl.c | 8 ++++---- hw/audio/fmopl.h | 2 +- hw/audio/gusemu_hal.c | 4 ++-- hw/audio/intel-hda-defs.h | 4 ++-- 5 files changed, 10 insertions(+), 10 deletions(-) diff --git a/audio/mixeng.h b/audio/mixeng.h index f9de7cffeb..a5f56d2c26 100644 --- a/audio/mixeng.h +++ b/audio/mixeng.h @@ -39,5 +39,5 @@ typedef void (t_sample) (struct st_sample *dst, const voi= d *src, int samples); typedef void (f_sample) (void *dst, const struct st_sample *src, int sampl= es); =20 -/* indices: [stereo][signed][swap endiannes][8, 16 or 32-bits] */ +/* indices: [stereo][signed][swap endianness][8, 16 or 32-bits] */ extern t_sample *mixeng_conv[2][2][2][3]; extern f_sample *mixeng_clip[2][2][2][3]; diff --git a/hw/audio/fmopl.c b/hw/audio/fmopl.c index 8a71a569fa..a63ad0f04d 100644 --- a/hw/audio/fmopl.c +++ b/hw/audio/fmopl.c @@ -356,5 +356,5 @@ static void set_algorithm( OPL_CH *CH) } =20 -/* ---------- frequency counter for operater update ---------- */ +/* ---------- frequency counter for operator update ---------- */ static inline void CALC_FCSLOT(OPL_CH *CH,OPL_SLOT *SLOT) { @@ -641,5 +641,5 @@ static int OPLOpenTable( void ) } =20 - /* make sinwave table (total level offet) */ + /* make sinwave table (total level offset) */ /* degree 0 =3D degree 180 =3D off */ SIN_TABLE[0] =3D SIN_TABLE[SIN_ENT/2] =3D &TL_TABLE[EG_ENT-1]; @@ -1076,5 +1076,5 @@ FM_OPL *OPLCreate(int clock, int rate) FM_OPL *OPL; int state_size; - int max_ch =3D 9; /* normaly 9 channels */ + int max_ch =3D 9; /* normally 9 channels */ =20 if( OPL_LockTable() =3D=3D-1) return NULL; @@ -1093,5 +1093,5 @@ FM_OPL *OPLCreate(int clock, int rate) OPL->rate =3D rate; OPL->max_ch =3D max_ch; - /* init grobal tables */ + /* init global tables */ OPL_initialize(OPL); /* reset chip */ diff --git a/hw/audio/fmopl.h b/hw/audio/fmopl.h index e008e72d7a..89086b93f4 100644 --- a/hw/audio/fmopl.h +++ b/hw/audio/fmopl.h @@ -70,5 +70,5 @@ typedef struct fm_opl_f { OPL_CH *P_CH; /* pointer of CH */ int max_ch; /* maximum channel */ - /* Rhythm sention */ + /* Rhythm section */ uint8_t rhythm; /* Rhythm mode , key flag */ /* time tables */ diff --git a/hw/audio/gusemu_hal.c b/hw/audio/gusemu_hal.c index 5b9a14ee21..f159978b49 100644 --- a/hw/audio/gusemu_hal.c +++ b/hw/audio/gusemu_hal.c @@ -155,5 +155,5 @@ unsigned int gus_read(GUSEmuState * state, int port, in= t size) { int offset =3D 2 * (GUSregb(FunkSelReg3x3) & 0= x0f); - offset +=3D ((int) GUSregb(VoiceSelReg3x2) & 0x1f) << 5; /= * =3D Voice*32 + Funktion*2 */ + offset +=3D ((int) GUSregb(VoiceSelReg3x2) & 0x1f) << 5; /= * =3D Voice*32 + Function*2 */ value_read =3D GUSregw(offset); } @@ -354,5 +354,5 @@ void gus_write(GUSEmuState * state, int port, int size,= unsigned int data) break; /* reset flag active? */ offset =3D 2 * (GUSregb(FunkSelReg3x3) & 0x0f); - offset +=3D (GUSregb(VoiceSelReg3x2) & 0x1f) << 5; /* = =3D Voice*32 + Funktion*2 */ + offset +=3D (GUSregb(VoiceSelReg3x2) & 0x1f) << 5; /* = =3D Voice*32 + Function*2 */ GUSregw(offset) =3D (uint16_t) ((GUSregw(offset) & rea= dmask) | writedata); } diff --git a/hw/audio/intel-hda-defs.h b/hw/audio/intel-hda-defs.h index 2e37e5b874..261bdb48ff 100644 --- a/hw/audio/intel-hda-defs.h +++ b/hw/audio/intel-hda-defs.h @@ -419,5 +419,5 @@ enum { #define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */ =20 -/* Pin widget capabilies */ +/* Pin widget capabilities */ #define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */ #define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */ @@ -484,5 +484,5 @@ enum { #define AC_PWRST_D3 0x03 =20 -/* Processing capabilies */ +/* Processing capabilities */ #define AC_PCAP_BENIGN (1<<0) #define AC_PCAP_NUM_COEF (0xff<<8) --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770141820480.1106897766176; Tue, 22 Aug 2023 22:55:41 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgoW-0004RO-8c; Wed, 23 Aug 2023 01:53:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgoH-0003yM-3y for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:42 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgoC-0007SN-Hw for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:40 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 6EB501C3A0 for ; Wed, 23 Aug 2023 08:52:22 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 178C121248; Wed, 23 Aug 2023 08:52:04 +0300 (MSK) Received: (nullmailer pid 1917510 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 19/24] hw/other: spelling fixes Date: Wed, 23 Aug 2023 08:51:50 +0300 Message-Id: <20230823055155.1917375-20-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770142389100005 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- hw/acpi/aml-build.c | 6 +++--- hw/acpi/hmat.c | 2 +- hw/acpi/nvdimm.c | 2 +- hw/block/hd-geometry.c | 4 ++-- hw/block/pflash_cfi01.c | 2 +- hw/char/cadence_uart.c | 2 +- hw/char/imx_serial.c | 2 +- hw/char/serial.c | 2 +- hw/core/generic-loader.c | 4 ++-- hw/core/machine.c | 2 +- hw/core/qdev-properties-system.c | 2 +- hw/cpu/a15mpcore.c | 2 +- hw/cxl/cxl-events.c | 2 +- hw/cxl/cxl-mailbox-utils.c | 4 ++-- hw/dma/omap_dma.c | 4 ++-- hw/input/hid.c | 2 +- hw/input/tsc2005.c | 16 ++++++++-------- hw/intc/loongarch_extioi.c | 2 +- hw/intc/loongson_liointc.c | 2 +- hw/intc/omap_intc.c | 2 +- hw/intc/pnv_xive.c | 2 +- hw/intc/spapr_xive.c | 2 +- hw/intc/spapr_xive_kvm.c | 6 +++--- hw/intc/xive.c | 2 +- hw/intc/xive2.c | 6 +++--- hw/ipmi/ipmi_bmc_extern.c | 2 +- hw/mem/cxl_type3.c | 6 +++--- hw/misc/imx7_ccm.c | 2 +- hw/misc/mac_via.c | 2 +- hw/misc/stm32f2xx_syscfg.c | 4 ++-- hw/misc/trace-events | 2 +- hw/misc/zynq_slcr.c | 2 +- hw/nvme/ctrl.c | 6 +++--- hw/nvram/eeprom_at24c.c | 2 +- hw/nvram/fw_cfg.c | 2 +- hw/rtc/exynos4210_rtc.c | 2 +- hw/rx/rx62n.c | 2 +- hw/scsi/lsi53c895a.c | 2 +- hw/scsi/mfi.h | 2 +- hw/sd/sd.c | 2 +- hw/sd/sdhci.c | 2 +- hw/sensor/isl_pmbus_vr.c | 2 +- hw/sensor/max34451.c | 2 +- hw/sh4/sh7750_regs.h | 26 +++++++++++++------------- hw/smbios/smbios.c | 2 +- hw/ssi/xilinx_spips.c | 6 +++--- hw/ssi/xlnx-versal-ospi.c | 2 +- hw/timer/etraxfs_timer.c | 2 +- hw/timer/renesas_tmr.c | 2 +- hw/virtio/virtio-crypto.c | 4 ++-- hw/virtio/virtio-mem.c | 2 +- hw/virtio/virtio.c | 2 +- 52 files changed, 89 insertions(+), 89 deletions(-) diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index ea331a20d1..af66bde0f5 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -313,5 +313,5 @@ build_prepend_package_length(GArray *package, unsigned = length, bool incl_self) * PkgLength is the length of the inclusive length of the data * and PkgLength's length itself when used for terms with - * explitit length. + * explicit length. */ length +=3D length_bytes; @@ -681,5 +681,5 @@ Aml *aml_store(Aml *val, Aml *target) * pattern. * - * Returns: The newly allocated and composed according to patter Aml objec= t. + * Returns: The newly allocated and composed according to pattern Aml obje= ct. */ static Aml * @@ -2160,5 +2160,5 @@ void build_fadt(GArray *tbl, BIOSLinker *linker, cons= t AcpiFadtData *f, build_append_int_noprefix(tbl, f->minor_ver, 1); } else { - build_append_int_noprefix(tbl, 0, 3); /* Reserved upto ACPI 5.0 */ + build_append_int_noprefix(tbl, 0, 3); /* Reserved up to ACPI 5.0 */ } build_append_int_noprefix(tbl, 0, 8); /* X_FIRMWARE_CTRL */ diff --git a/hw/acpi/hmat.c b/hw/acpi/hmat.c index 3a6d51282a..2d5e199ba9 100644 --- a/hw/acpi/hmat.c +++ b/hw/acpi/hmat.c @@ -83,5 +83,5 @@ static void build_hmat_lb(GArray *table_data, HMAT_LB_Inf= o *hmat_lb, /* Length in bytes for entire structure */ uint32_t lb_length - =3D 32 /* Table length upto and including Entry Base Unit */ + =3D 32 /* Table length up to and including Entry Base Unit */ + 4 * num_initiator /* Initiator Proximity Domain List */ + 4 * num_target /* Target Proximity Domain List */ diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c index a3b25a92f3..fe03ce87e0 100644 --- a/hw/acpi/nvdimm.c +++ b/hw/acpi/nvdimm.c @@ -1098,5 +1098,5 @@ static void nvdimm_build_common_dsm(Aml *dev, * DSDT tables revision number. If revision number is < 2, integer * size is 32 bits, otherwise it is 64 bits. - * Because of this CreateField() canot be used if RLEN < Integer Size. + * Because of this CreateField() cannot be used if RLEN < Integer Size. * * Also please note that APCI ASL operator SizeOf() doesn't support diff --git a/hw/block/hd-geometry.c b/hw/block/hd-geometry.c index dae13ab14d..2b0af4430f 100644 --- a/hw/block/hd-geometry.c +++ b/hw/block/hd-geometry.c @@ -51,5 +51,5 @@ struct partition { } QEMU_PACKED; =20 -/* try to guess the disk logical geometry from the MSDOS partition table. +/* try to guess the disk logical geometry from the MS-DOS partition table. Return 0 if OK, -1 if could not guess */ static int guess_disk_lchs(BlockBackend *blk, @@ -67,5 +67,5 @@ static int guess_disk_lchs(BlockBackend *blk, return -1; } - /* test msdos magic */ + /* test MS-DOS magic */ if (buf[510] !=3D 0x55 || buf[511] !=3D 0xaa) { return -1; diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 3c066e3405..62056b1d74 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -892,5 +892,5 @@ static Property pflash_cfi01_properties[] =3D { * ie the total size of the device divided by the sector length. * If we're emulating flash devices wired in parallel the actual - * number of blocks per indvidual device will differ. + * number of blocks per individual device will differ. */ DEFINE_PROP_UINT32("num-blocks", PFlashCFI01, nb_blocs, 0), diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c index 807e398541..5dffd61b98 100644 --- a/hw/char/cadence_uart.c +++ b/hw/char/cadence_uart.c @@ -576,5 +576,5 @@ static int cadence_uart_pre_load(void *opaque) CadenceUARTState *s =3D opaque; =20 - /* the frequency will be overriden if the refclk field is present */ + /* the frequency will be overridden if the refclk field is present */ clock_set_hz(s->refclk, UART_DEFAULT_REF_CLK); return 0; diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c index 1b75a89588..377d1d9773 100644 --- a/hw/char/imx_serial.c +++ b/hw/char/imx_serial.c @@ -113,5 +113,5 @@ static void imx_serial_reset_at_boot(DeviceState *dev) =20 /* - * enable the uart on boot, so messages from the linux decompresser + * enable the uart on boot, so messages from the linux decompressor * are visible. On real hardware this is done by the boot rom * before anything else is loaded. diff --git a/hw/char/serial.c b/hw/char/serial.c index 270e1b1094..880b632177 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -55,5 +55,5 @@ #define UART_IIR_CTI 0x0C /* Character Timeout Indication */ =20 -#define UART_IIR_FENF 0x80 /* Fifo enabled, but not functionning */ +#define UART_IIR_FENF 0x80 /* Fifo enabled, but not functioning */ #define UART_IIR_FE 0xC0 /* Fifo enabled */ =20 diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c index 4f4d77908d..d4b5c501d8 100644 --- a/hw/core/generic-loader.c +++ b/hw/core/generic-loader.c @@ -25,5 +25,5 @@ =20 * This device allows the user to monkey patch memory. To be able to do - * this it needs a backend to manage the datas, the same as other + * this it needs a backend to manage the data, the same as other * memory-related devices. In this case as the backend is so trivial we * have merged it with the frontend instead of creating and maintaining a @@ -167,5 +167,5 @@ static void generic_loader_realize(DeviceState *dev, Er= ror **errp) } =20 - /* Convert the data endiannes */ + /* Convert the data endianness */ if (s->data_be) { s->data =3D cpu_to_be64(s->data); diff --git a/hw/core/machine.c b/hw/core/machine.c index f0d35c6401..ac33799c1b 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -1415,5 +1415,5 @@ void machine_run_board_init(MachineState *machine, co= nst char *mem_path, Error * if (object_class_dynamic_cast(oc, machine_class->valid_cpu_types[i= ])) { - /* The user specificed CPU is in the valid field, we are + /* The user specified CPU is in the valid field, we are * good to go. */ diff --git a/hw/core/qdev-properties-system.c b/hw/core/qdev-properties-sys= tem.c index 6d5d43eda2..41b7e682c7 100644 --- a/hw/core/qdev-properties-system.c +++ b/hw/core/qdev-properties-system.c @@ -108,5 +108,5 @@ static void set_drive_helper(Object *obj, Visitor *v, c= onst char *name, =20 if (*ptr) { - /* BlockBackend alread exists. So, we want to change attached node= */ + /* BlockBackend already exists. So, we want to change attached nod= e */ blk =3D *ptr; ctx =3D blk_get_aio_context(blk); diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c index 774ca9987a..bfd8aa5644 100644 --- a/hw/cpu/a15mpcore.c +++ b/hw/cpu/a15mpcore.c @@ -162,5 +162,5 @@ static void a15mp_priv_class_init(ObjectClass *klass, v= oid *data) dc->realize =3D a15mp_priv_realize; device_class_set_props(dc, a15mp_priv_properties); - /* We currently have no savable state */ + /* We currently have no saveable state */ } =20 diff --git a/hw/cxl/cxl-events.c b/hw/cxl/cxl-events.c index d161d57456..3ddd6369ad 100644 --- a/hw/cxl/cxl-events.c +++ b/hw/cxl/cxl-events.c @@ -198,5 +198,5 @@ CXLRetCode cxl_event_clear_records(CXLDeviceState *cxld= s, CXLClearEventPayload * QEMU_LOCK_GUARD(&log->lock); /* - * Must itterate the queue twice. + * Must iterate the queue twice. * "The device shall verify the event record handles specified in the = input * payload are in temporal order. If the device detects an older event diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index 02f9b5a870..434ccc5f6e 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -40,5 +40,5 @@ * setting the length, and returning a valid return code. * - * XXX: The handler need not worry about endianess. The payload is read o= ut of + * XXX: The handler need not worry about endianness. The payload is read = out of * a register interface that already deals with it. */ @@ -502,5 +502,5 @@ static CXLRetCode cmd_media_get_poison_list(struct cxl_= cmd *cmd, =20 query_start =3D ldq_le_p(&in->pa); - /* 64 byte alignemnt required */ + /* 64 byte alignment required */ if (query_start & 0x3f) { return CXL_MBOX_INVALID_INPUT; diff --git a/hw/dma/omap_dma.c b/hw/dma/omap_dma.c index c6e35ba4b8..77797a67b5 100644 --- a/hw/dma/omap_dma.c +++ b/hw/dma/omap_dma.c @@ -248,5 +248,5 @@ static void omap_dma_deactivate_channel(struct omap_dma= _s *s, } =20 - /* Don't deactive the channel if it is synchronized and the DMA reques= t is + /* Don't deactivate the channel if it is synchronized and the DMA requ= est is active */ if (ch->sync && ch->enable && (s->dma->drqbmp & (1ULL << ch->sync))) @@ -423,5 +423,5 @@ static void omap_dma_transfer_generic(struct soc_dma_ch= _s *dma) if (ch->fs && ch->bs) { a->pck_element ++; - /* Check if a full packet has beed transferred. */ + /* Check if a full packet has been transferred. */ if (a->pck_element =3D=3D a->pck_elements) { a->pck_element =3D 0; diff --git a/hw/input/hid.c b/hw/input/hid.c index e7ecebdf8f..a9c7dd1ce1 100644 --- a/hw/input/hid.c +++ b/hw/input/hid.c @@ -210,5 +210,5 @@ static void hid_pointer_sync(DeviceState *dev) curr->dz =3D 0; } else { - /* prepate next (clear rel, copy abs + btns) */ + /* prepare next (clear rel, copy abs + btns) */ if (hs->kind =3D=3D HID_MOUSE) { next->xdx =3D 0; diff --git a/hw/input/tsc2005.c b/hw/input/tsc2005.c index 555b677173..a4f23705b5 100644 --- a/hw/input/tsc2005.c +++ b/hw/input/tsc2005.c @@ -158,12 +158,12 @@ static uint16_t tsc2005_read(TSC2005State *s, int reg) return ret; =20 - case 0x8: /* AUX high treshold */ + case 0x8: /* AUX high threshold */ return s->aux_thr[1]; - case 0x9: /* AUX low treshold */ + case 0x9: /* AUX low threshold */ return s->aux_thr[0]; =20 - case 0xa: /* TEMP high treshold */ + case 0xa: /* TEMP high threshold */ return s->temp_thr[1]; - case 0xb: /* TEMP low treshold */ + case 0xb: /* TEMP low threshold */ return s->temp_thr[0]; =20 @@ -187,15 +187,15 @@ static void tsc2005_write(TSC2005State *s, int reg, u= int16_t data) { switch (reg) { - case 0x8: /* AUX high treshold */ + case 0x8: /* AUX high threshold */ s->aux_thr[1] =3D data; break; - case 0x9: /* AUX low treshold */ + case 0x9: /* AUX low threshold */ s->aux_thr[0] =3D data; break; =20 - case 0xa: /* TEMP high treshold */ + case 0xa: /* TEMP high threshold */ s->temp_thr[1] =3D data; break; - case 0xb: /* TEMP low treshold */ + case 0xb: /* TEMP low threshold */ s->temp_thr[0] =3D data; break; diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c index af75460643..24fb3af8cc 100644 --- a/hw/intc/loongarch_extioi.c +++ b/hw/intc/loongarch_extioi.c @@ -192,5 +192,5 @@ static MemTxResult extioi_writew(void *opaque, hwaddr a= ddr, old_data =3D s->coreisr[cpu][index]; s->coreisr[cpu][index] =3D old_data & ~val; - /* write 1 to clear interrrupt */ + /* write 1 to clear interrupt */ old_data &=3D val; irq =3D ctz32(old_data); diff --git a/hw/intc/loongson_liointc.c b/hw/intc/loongson_liointc.c index cc11b544cb..c10fb97a06 100644 --- a/hw/intc/loongson_liointc.c +++ b/hw/intc/loongson_liointc.c @@ -1,4 +1,4 @@ /* - * QEMU Loongson Local I/O interrupt controler. + * QEMU Loongson Local I/O interrupt controller. * * Copyright (c) 2020 Huacai Chen diff --git a/hw/intc/omap_intc.c b/hw/intc/omap_intc.c index 647bf324a8..435c47600f 100644 --- a/hw/intc/omap_intc.c +++ b/hw/intc/omap_intc.c @@ -69,5 +69,5 @@ static void omap_inth_sir_update(OMAPIntcState *s, int is= _fiq) =20 /* Find the interrupt line with the highest dynamic priority. - * Note: 0 denotes the hightest priority. + * Note: 0 denotes the highest priority. * If all interrupts have the same priority, the default order is IRQ_= N, * IRQ_N-1,...,IRQ_0. */ diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index e536b3ec26..6b6b42eb14 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -944,5 +944,5 @@ static void pnv_xive_ic_reg_write(void *opaque, hwaddr = offset, case VC_SBC_CONFIG: /* Store EOI configuration */ /* - * Configure store EOI if required by firwmare (skiboot has removed + * Configure store EOI if required by firmware (skiboot has removed * support recently though) */ diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 8bcab2846c..7f701d414b 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -28,5 +28,5 @@ =20 /* - * XIVE Virtualization Controller BAR and Thread Managment BAR that we + * XIVE Virtualization Controller BAR and Thread Management BAR that we * use for the ESB pages and the TIMA pages */ diff --git a/hw/intc/spapr_xive_kvm.c b/hw/intc/spapr_xive_kvm.c index 61fe7bd2d3..5789062379 100644 --- a/hw/intc/spapr_xive_kvm.c +++ b/hw/intc/spapr_xive_kvm.c @@ -486,5 +486,5 @@ static int kvmppc_xive_get_queues(SpaprXive *xive, Erro= r **errp) * Whenever the VM is stopped, the VM change handler sets the source * PQs to PENDING to stop the flow of events and to possibly catch a - * triggered interrupt occuring while the VM is stopped. The previous + * triggered interrupt occurring while the VM is stopped. The previous * state is saved in anticipation of a migration. The XIVE controller * is then synced through KVM to flush any in-flight event @@ -552,5 +552,5 @@ static void kvmppc_xive_change_state_handler(void *opaq= ue, bool running, /* * PQ is set to PENDING to possibly catch a triggered - * interrupt occuring while the VM is stopped (hotplug event + * interrupt occurring while the VM is stopped (hotplug event * for instance) . */ @@ -634,5 +634,5 @@ int kvmppc_xive_post_load(SpaprXive *xive, int version_= id) assert(xive->fd !=3D -1); =20 - /* Restore the ENDT first. The targetting depends on it. */ + /* Restore the ENDT first. The targeting depends on it. */ for (i =3D 0; i < xive->nr_ends; i++) { if (!xive_end_is_valid(&xive->endt[i])) { diff --git a/hw/intc/xive.c b/hw/intc/xive.c index 56670b2cac..9cdf2b56b3 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -1602,5 +1602,5 @@ int xive_presenter_tctx_match(XivePresenter *xptr, Xi= veTCTX *tctx, * It receives notification requests sent by the IVRE to find one * matching NVT (or more) dispatched on the processor threads. In case - * of a single NVT notification, the process is abreviated and the + * of a single NVT notification, the process is abbreviated and the * thread is signaled if a match is found. In case of a logical server * notification (bits ignored at the end of the NVT identifier), the diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index c37ef25d44..98c0d8ba44 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -543,5 +543,5 @@ static void xive2_router_realize(DeviceState *dev, Erro= r **errp) /* * Notification using the END ESe/ESn bit (Event State Buffer for - * escalation and notification). Profide futher coalescing in the + * escalation and notification). Profide further coalescing in the * Router. */ @@ -622,5 +622,5 @@ static void xive2_router_end_notify(Xive2Router *xrtr, = uint8_t end_blk, /* * Check the END ESn (Event State Buffer for notification) for - * even futher coalescing in the Router + * even further coalescing in the Router */ if (!xive2_end_is_notify(&end)) { @@ -703,5 +703,5 @@ do_escalation: /* * Check the END ESe (Event State Buffer for escalation) for even - * futher coalescing in the Router + * further coalescing in the Router */ if (!xive2_end_is_uncond_escalation(&end)) { diff --git a/hw/ipmi/ipmi_bmc_extern.c b/hw/ipmi/ipmi_bmc_extern.c index acf2bab35f..e232d35ba2 100644 --- a/hw/ipmi/ipmi_bmc_extern.c +++ b/hw/ipmi/ipmi_bmc_extern.c @@ -302,5 +302,5 @@ static void handle_msg(IPMIBmcExtern *ibe) return; } else { - ibe->inpos--; /* Remove checkum */ + ibe->inpos--; /* Remove checksum */ } =20 diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 4e314748d3..a98a157065 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -539,5 +539,5 @@ static void ct3d_reg_write(void *opaque, hwaddr offset,= uint64_t value, } else { /* - * If no more errors, then follow recomendation of PCI spec + * If no more errors, then follow recommendation of PCI sp= ec * r6.0 6.2.4.2 to set the first error pointer to a status * bit that will never be used. @@ -698,5 +698,5 @@ static void ct3_realize(PCIDevice *pci_dev, Error **err= p) &ct3d->cxl_dstate.device_registers); =20 - /* MSI(-X) Initailization */ + /* MSI(-X) Initialization */ rc =3D msix_init_exclusive_bar(pci_dev, msix_num, 4, NULL); if (rc) { @@ -707,5 +707,5 @@ static void ct3_realize(PCIDevice *pci_dev, Error **err= p) } =20 - /* DOE Initailization */ + /* DOE Initialization */ pcie_doe_init(pci_dev, &ct3d->doe_cdat, 0x190, doe_cdat_prot, true, 0); =20 diff --git a/hw/misc/imx7_ccm.c b/hw/misc/imx7_ccm.c index f135ec7b7e..7539f7fb45 100644 --- a/hw/misc/imx7_ccm.c +++ b/hw/misc/imx7_ccm.c @@ -228,5 +228,5 @@ static uint32_t imx7_ccm_get_clock_frequency(IMXCCMStat= e *dev, IMXClk clock) * easily. However for CCM provided clocks (like IPG) each GPT * timer can have its own clock root. - * This means we need additionnal information when calling this + * This means we need additional information when calling this * function to know the requester's identity. */ diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c index 0787a0268d..f84cc68849 100644 --- a/hw/misc/mac_via.c +++ b/hw/misc/mac_via.c @@ -247,5 +247,5 @@ #define vT2CH 0x1200 /* [VIA only] Timer two counter high. */ #define vSR 0x1400 /* [VIA only] Shift register. */ -#define vACR 0x1600 /* [VIA only] Auxilary control register. */ +#define vACR 0x1600 /* [VIA only] Auxiliary control register. */ #define vPCR 0x1800 /* [VIA only] Peripheral control register. */ /* diff --git a/hw/misc/stm32f2xx_syscfg.c b/hw/misc/stm32f2xx_syscfg.c index 04c22c2850..19c1e86424 100644 --- a/hw/misc/stm32f2xx_syscfg.c +++ b/hw/misc/stm32f2xx_syscfg.c @@ -95,10 +95,10 @@ static void stm32f2xx_syscfg_write(void *opaque, hwaddr= addr, case SYSCFG_MEMRMP: qemu_log_mask(LOG_UNIMP, - "%s: Changeing the memory mapping isn't supported " \ + "%s: Changing the memory mapping isn't supported " \ "in QEMU\n", __func__); return; case SYSCFG_PMC: qemu_log_mask(LOG_UNIMP, - "%s: Changeing the memory mapping isn't supported " \ + "%s: Changing the memory mapping isn't supported " \ "in QEMU\n", __func__); return; diff --git a/hw/misc/trace-events b/hw/misc/trace-events index 4d1a0e17af..bfd56ce9e2 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -156,5 +156,5 @@ stm32f4xx_syscfg_write(uint64_t addr, uint64_t data) "r= eg write: addr: 0x%" PRIx =20 # stm32f4xx_exti.c -stm32f4xx_exti_set_irq(int irq, int leve) "Set EXTI: %d to %d" +stm32f4xx_exti_set_irq(int irq, int level) "Set EXTI: %d to %d" stm32f4xx_exti_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " " stm32f4xx_exti_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" = PRIx64 " val: 0x%" PRIx64 "" diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c index 8b70285961..41f38a98e9 100644 --- a/hw/misc/zynq_slcr.c +++ b/hw/misc/zynq_slcr.c @@ -286,5 +286,5 @@ static void zynq_slcr_compute_clocks_internal(ZynqSLCRS= tate *s, uint64_t ps_clk) =20 /** - * Compute and set the ouputs clocks periods. + * Compute and set the outputs clocks periods. * But do not propagate them further. Connected clocks * will not receive any updates (See zynq_slcr_compute_clocks()) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 539d273553..1dcad5f2e0 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -18,5 +18,5 @@ * --------------------- * While QEMU coding style prefers lowercase hexadecimals in constants, the - * NVMe subsystem use thes format from the NVMe specifications in the comm= ents + * NVMe subsystem use this format from the NVMe specifications in the comm= ents * (i.e. 'h' suffix instead of '0x' prefix). * @@ -731,5 +731,5 @@ static inline void nvme_sg_unmap(NvmeSg *sg) =20 /* - * When metadata is transfered as extended LBAs, the DPTR mapped into `sg` + * When metadata is transferred as extended LBAs, the DPTR mapped into `sg` * holds both data and metadata. This function splits the data and metadata * into two separate QSG/IOVs. @@ -7595,5 +7595,5 @@ static void nvme_process_db(NvmeCtrl *n, hwaddr addr,= int val) * NVM Express v1.3d, Section 4.1 state: "If host software wri= tes * an invalid value to the Submission Queue Tail Doorbell or - * Completion Queue Head Doorbell regiter and an Asynchronous = Event + * Completion Queue Head Doorbell register and an Asynchronous= Event * Request command is outstanding, then an asynchronous event = is * posted to the Admin Completion Queue with a status code of diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c index 613c4929e3..3272068663 100644 --- a/hw/nvram/eeprom_at24c.c +++ b/hw/nvram/eeprom_at24c.c @@ -52,5 +52,5 @@ struct EEPROMState { /* cells changed since last START? */ bool changed; - /* during WRITE, # of address bytes transfered */ + /* during WRITE, # of address bytes transferred */ uint8_t haveaddr; =20 diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 29a5bef1d5..4e4524673a 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -878,5 +878,5 @@ static struct { * Any sub-page size update to these table MRs will be lost during migrati= on, * as we use aligned size in ram_load_precopy() -> qemu_ram_resize() path. - * In order to avoid the inconsistency in sizes save them seperately and + * In order to avoid the inconsistency in sizes save them separately and * migrate over in vmstate post_load(). */ diff --git a/hw/rtc/exynos4210_rtc.c b/hw/rtc/exynos4210_rtc.c index 2b8a38a296..cc7101c530 100644 --- a/hw/rtc/exynos4210_rtc.c +++ b/hw/rtc/exynos4210_rtc.c @@ -203,5 +203,5 @@ static void exynos4210_rtc_update_freq(Exynos4210RTCSta= te *s, =20 freq =3D s->freq; - /* set frequncy for time generator */ + /* set frequency for time generator */ s->freq =3D RTC_BASE_FREQ / (1 << TICCKSEL(reg_value)); =20 diff --git a/hw/rx/rx62n.c b/hw/rx/rx62n.c index 3e887a0fc7..d00fcb0ef0 100644 --- a/hw/rx/rx62n.c +++ b/hw/rx/rx62n.c @@ -115,5 +115,5 @@ static const uint8_t ipr_table[NR_IRQS] =3D { =20 /* - * Level triggerd IRQ list + * Level triggered IRQ list * Not listed IRQ is Edge trigger. * See "11.3.1 Interrupt Vector Table" in hardware manual. diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c index f7d45b0b20..634ed49c2e 100644 --- a/hw/scsi/lsi53c895a.c +++ b/hw/scsi/lsi53c895a.c @@ -1322,5 +1322,5 @@ again: trace_lsi_execute_script_io_selected(id, insn & (1 << 3) ? " ATN" : ""= ); - /* ??? Linux drivers compain when this is set. Maybe + /* ??? Linux drivers complain when this is set. Maybe it only applies in low-level mode (unimplemented). lsi_script_scsi_interrupt(s, LSI_SIST0_CMP, 0); */ diff --git a/hw/scsi/mfi.h b/hw/scsi/mfi.h index 0b4ee53dfc..cf7a2d775b 100644 --- a/hw/scsi/mfi.h +++ b/hw/scsi/mfi.h @@ -66,5 +66,5 @@ #define MFI_DIAG 0xf8 /* Host diag */ #define MFI_SEQ 0xfc /* Sequencer offset */ -#define MFI_1078_EIM 0x80000004 /* 1078 enable intrrupt mask */ +#define MFI_1078_EIM 0x80000004 /* 1078 enable interrupt mask */ #define MFI_RMI 0x2 /* reply message interrupt */ #define MFI_1078_RM 0x80000000 /* reply 1078 message interrupt */ diff --git a/hw/sd/sd.c b/hw/sd/sd.c index 77a717d355..43c374e829 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -1225,5 +1225,5 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, S= DRequest req) break; =20 - /* Block read commands (Classs 2) */ + /* Block read commands (Class 2) */ case 16: /* CMD16: SET_BLOCKLEN */ switch (sd->state) { diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 362c2c86aa..5564765a9b 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1812,5 +1812,5 @@ usdhc_write(void *opaque, hwaddr offset, uint64_t val= , unsigned size) * * We don't want to call sdhci_write(.., SDHC_TRNMOD, ...) - * here becuase it will result in a call to + * here because it will result in a call to * sdhci_send_command(s) which we don't want. * diff --git a/hw/sensor/isl_pmbus_vr.c b/hw/sensor/isl_pmbus_vr.c index eb344dd5a9..e51269f6b8 100644 --- a/hw/sensor/isl_pmbus_vr.c +++ b/hw/sensor/isl_pmbus_vr.c @@ -102,5 +102,5 @@ static void isl_pmbus_vr_exit_reset(Object *obj) } =20 -/* The raa228000 uses different direct mode coefficents from most isl devi= ces */ +/* The raa228000 uses different direct mode coefficients from most isl dev= ices */ static void raa228000_exit_reset(Object *obj) { diff --git a/hw/sensor/max34451.c b/hw/sensor/max34451.c index a91d8bd487..9db52ef677 100644 --- a/hw/sensor/max34451.c +++ b/hw/sensor/max34451.c @@ -735,5 +735,5 @@ static void max34451_init(Object *obj) /* * get and set the temperature of the internal temperature sensor in - * centidegrees Celcius i.e.: 2500 -> 25.00 C, max is 327.67 C + * centidegrees Celsius i.e.: 2500 -> 25.00 C, max is 327.67 C */ for (int i =3D 0; i < MAX34451_NUM_TEMP_DEVICES; i++) { diff --git a/hw/sh4/sh7750_regs.h b/hw/sh4/sh7750_regs.h index 94043431e6..edb5d18f00 100644 --- a/hw/sh4/sh7750_regs.h +++ b/hw/sh4/sh7750_regs.h @@ -114,5 +114,5 @@ #define SH7750_TTB_A7 SH7750_A7_REG32(SH7750_TTB_REGOFS) =20 -/* TLB exeption address register - TEA */ +/* TLB exception address register - TEA */ #define SH7750_TEA_REGOFS 0x00000c /* offset */ #define SH7750_TEA SH7750_P4_REG32(SH7750_TEA_REGOFS) @@ -184,10 +184,10 @@ #define SH7750_TRA_IMM_S 2 =20 -/* Exeption event register - EXPEVT */ +/* Exception event register - EXPEVT */ #define SH7750_EXPEVT_REGOFS 0x000024 #define SH7750_EXPEVT SH7750_P4_REG32(SH7750_EXPEVT_REGOFS) #define SH7750_EXPEVT_A7 SH7750_A7_REG32(SH7750_EXPEVT_REGOFS) =20 -#define SH7750_EXPEVT_EX 0x00000fff /* Exeption code */ +#define SH7750_EXPEVT_EX 0x00000fff /* Exception code */ #define SH7750_EXPEVT_EX_S 0 =20 @@ -196,5 +196,5 @@ #define SH7750_INTEVT SH7750_P4_REG32(SH7750_INTEVT_REGOFS) #define SH7750_INTEVT_A7 SH7750_A7_REG32(SH7750_INTEVT_REGOFS) -#define SH7750_INTEVT_EX 0x00000fff /* Exeption code */ +#define SH7750_INTEVT_EX 0x00000fff /* Exception code */ #define SH7750_INTEVT_EX_S 0 =20 @@ -1275,13 +1275,13 @@ * User Break Controller registers */ -#define SH7750_BARA 0x200000 /* Break address regiser A */ -#define SH7750_BAMRA 0x200004 /* Break address mask regiser A */ -#define SH7750_BBRA 0x200008 /* Break bus cycle regiser A */ -#define SH7750_BARB 0x20000c /* Break address regiser B */ -#define SH7750_BAMRB 0x200010 /* Break address mask regiser B */ -#define SH7750_BBRB 0x200014 /* Break bus cycle regiser B */ -#define SH7750_BASRB 0x000018 /* Break ASID regiser B */ -#define SH7750_BDRB 0x200018 /* Break data regiser B */ -#define SH7750_BDMRB 0x20001c /* Break data mask regiser B */ +#define SH7750_BARA 0x200000 /* Break address register A */ +#define SH7750_BAMRA 0x200004 /* Break address mask register A */ +#define SH7750_BBRA 0x200008 /* Break bus cycle register A */ +#define SH7750_BARB 0x20000c /* Break address register B */ +#define SH7750_BAMRB 0x200010 /* Break address mask register B */ +#define SH7750_BBRB 0x200014 /* Break bus cycle register B */ +#define SH7750_BASRB 0x000018 /* Break ASID register B */ +#define SH7750_BDRB 0x200018 /* Break data register B */ +#define SH7750_BDMRB 0x20001c /* Break data mask register B */ #define SH7750_BRCR 0x200020 /* Break control register */ =20 diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c index 10cd22f610..b753705856 100644 --- a/hw/smbios/smbios.c +++ b/hw/smbios/smbios.c @@ -1111,5 +1111,5 @@ void smbios_get_tables(MachineState *ms, =20 /* - * The offset determines if we need to keep additional space betwe= een + * The offset determines if we need to keep additional space betwe= en * table 17 and table 19 header handle numbers so that they do * not overlap. For example, for a VM with larger than 8 TB guest diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index 97009d3a5d..a3955c6c50 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -164,5 +164,5 @@ /* Poll timeout not implemented */ FIELD(GQSPI_CNFG, EN_POLL_TIMEOUT, 20, 1) - /* QEMU doesnt care about any of these last three */ + /* QEMU doesn't care about any of these last three */ FIELD(GQSPI_CNFG, BR, 3, 3) FIELD(GQSPI_CNFG, CPH, 2, 1) @@ -470,5 +470,5 @@ static void xlnx_zynqmp_qspips_flush_fifo_g(XlnxZynqMPQ= SPIPS *s) imm =3D ARRAY_FIELD_EX32(s->regs, GQSPI_GF_SNAPSHOT, IMMEDIATE= _DATA); if (!ARRAY_FIELD_EX32(s->regs, GQSPI_GF_SNAPSHOT, DATA_XFER)) { - /* immedate transfer */ + /* immediate transfer */ if (ARRAY_FIELD_EX32(s->regs, GQSPI_GF_SNAPSHOT, TRANSMIT)= || ARRAY_FIELD_EX32(s->regs, GQSPI_GF_SNAPSHOT, RECIEVE))= { @@ -769,5 +769,5 @@ static void xilinx_spips_check_zero_pump(XilinxSPIPS *s) while (s->regs[R_TRANSFER_SIZE] && s->rx_fifo.num + s->tx_fifo.num < RXFF_A_Q - 3) { - /* endianess just doesn't matter when zero pumping */ + /* endianness just doesn't matter when zero pumping */ tx_data_bytes(&s->tx_fifo, 0, 4, false); s->regs[R_TRANSFER_SIZE] &=3D ~0x03ull; diff --git a/hw/ssi/xlnx-versal-ospi.c b/hw/ssi/xlnx-versal-ospi.c index c762e0b367..1a61679c2f 100644 --- a/hw/ssi/xlnx-versal-ospi.c +++ b/hw/ssi/xlnx-versal-ospi.c @@ -838,5 +838,5 @@ static void ospi_do_ind_read(XlnxVersalOspi *s) while (!ospi_ind_op_completed(op) && !fifo8_is_full(&s->rx_sram)) { - /* Read reqested number of bytes, max bytes limited to size of sra= m */ + /* Read requested number of bytes, max bytes limited to size of sr= am */ next_b =3D ind_op_next_byte(op); end_b =3D next_b + fifo8_num_free(&s->rx_sram); diff --git a/hw/timer/etraxfs_timer.c b/hw/timer/etraxfs_timer.c index 2d6d92ef93..f035b74560 100644 --- a/hw/timer/etraxfs_timer.c +++ b/hw/timer/etraxfs_timer.c @@ -237,5 +237,5 @@ static void watchdog_hit(void *opaque) ETRAXTimerState *t =3D opaque; if (t->wd_hits =3D=3D 0) { - /* real hw gives a single tick before reseting but we are + /* real hw gives a single tick before resetting but we are a bit friendlier to compensate for our slower execution. */ ptimer_set_count(t->ptimer_wd, 10); diff --git a/hw/timer/renesas_tmr.c b/hw/timer/renesas_tmr.c index c15f654738..43b31213bc 100644 --- a/hw/timer/renesas_tmr.c +++ b/hw/timer/renesas_tmr.c @@ -116,5 +116,5 @@ static int elapsed_time(RTMRState *tmr, int ch, int64_t= delta) tmr->div_round[ch] %=3D divrate; } else { - /* disble clock. so no update */ + /* disable clock. so no update */ et =3D 0; } diff --git a/hw/virtio/virtio-crypto.c b/hw/virtio/virtio-crypto.c index 13aec771e1..0e2cc8d5a8 100644 --- a/hw/virtio/virtio-crypto.c +++ b/hw/virtio/virtio-crypto.c @@ -656,5 +656,5 @@ virtio_crypto_sym_op_helper(VirtIODevice *vdev, op_info->cipher_start_src_offset =3D cipher_start_src_offset; op_info->len_to_cipher =3D len_to_cipher; - /* Handle the initilization vector */ + /* Handle the initialization vector */ if (op_info->iv_len > 0) { DPRINTF("iv_len=3D%" PRIu32 "\n", op_info->iv_len); @@ -1279,5 +1279,5 @@ static void virtio_crypto_instance_init(Object *obj) /* * The default config_size is sizeof(struct virtio_crypto_config). - * Can be overriden with virtio_crypto_set_config_size. + * Can be overridden with virtio_crypto_set_config_size. */ vcrypto->config_size =3D sizeof(struct virtio_crypto_config); diff --git a/hw/virtio/virtio-mem.c b/hw/virtio/virtio-mem.c index b6e781741e..da5b09cefc 100644 --- a/hw/virtio/virtio-mem.c +++ b/hw/virtio/virtio-mem.c @@ -1120,5 +1120,5 @@ static int virtio_mem_mig_sanity_checks_post_load(voi= d *opaque, int version_id) } /* - * Note: Preparation for resizeable memory regions. The maximum size + * Note: Preparation for resizable memory regions. The maximum size * of the memory region must not change during migration. */ diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index 309038fd46..9a06b65bae 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -2097,5 +2097,5 @@ void virtio_queue_enable(VirtIODevice *vdev, uint32_t= queue_index) * if (!virtio_vdev_has_feature(vdev, VIRTIO_F_VERSION_1)) { - error_report("queue_enable is only suppported in devices of virtio= " + error_report("queue_enable is only supported in devices of virtio " "1.0 or later."); } --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770140700755.3945158798373; Tue, 22 Aug 2023 22:55:40 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgoZ-0004pL-Ct; Wed, 23 Aug 2023 01:53:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgoS-0004Id-73 for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:54 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgoN-0007SV-El for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:51 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 9A9F61C3A1 for ; Wed, 23 Aug 2023 08:52:22 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 41F3D21249; Wed, 23 Aug 2023 08:52:04 +0300 (MSK) Received: (nullmailer pid 1917513 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 20/24] include/: spelling fixes Date: Wed, 23 Aug 2023 08:51:51 +0300 Message-Id: <20230823055155.1917375-21-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770142389100006 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- include/block/block_int-common.h | 2 +- include/chardev/char-fe.h | 4 ++-- include/crypto/akcipher.h | 2 +- include/crypto/ivgen.h | 4 ++-- include/elf.h | 4 ++-- include/hw/acpi/aml-build.h | 2 +- include/hw/acpi/pc-hotplug.h | 2 +- include/hw/acpi/vmgenid.h | 2 +- include/hw/boards.h | 6 +++--- include/hw/char/avr_usart.h | 2 +- include/hw/clock.h | 2 +- include/hw/core/tcg-cpu-ops.h | 2 +- include/hw/cxl/cxl_device.h | 2 +- include/hw/hyperv/vmbus.h | 2 +- include/hw/i2c/npcm7xx_smbus.h | 2 +- include/hw/misc/auxbus.h | 2 +- include/hw/misc/macio/pmu.h | 2 +- include/hw/net/mii.h | 2 +- include/hw/pci-host/dino.h | 2 +- include/hw/pci/pcie_aer.h | 2 +- include/hw/ssi/xilinx_spips.h | 2 +- include/hw/virtio/virtio-net.h | 2 +- include/io/channel-socket.h | 4 ++-- include/io/task.h | 2 +- include/qemu/iova-tree.h | 4 ++-- include/qemu/yank.h | 2 +- include/sysemu/cryptodev-vhost.h | 2 +- include/sysemu/cryptodev.h | 6 +++--- include/sysemu/iothread.h | 2 +- include/sysemu/stats.h | 2 +- include/sysemu/tpm_backend.h | 2 +- include/tcg/helper-info.h | 2 +- include/tcg/tcg.h | 4 ++-- include/ui/kbd-state.h | 2 +- include/ui/spice-display.h | 2 +- include/user/safe-syscall.h | 2 +- 36 files changed, 46 insertions(+), 46 deletions(-) diff --git a/include/block/block_int-common.h b/include/block/block_int-com= mon.h index 74195c3004..e09d277328 100644 --- a/include/block/block_int-common.h +++ b/include/block/block_int-common.h @@ -419,5 +419,5 @@ struct BlockDriver { /** * Called to inform the driver that the set of cumulative set of used - * permissions for @bs has changed to @perm, and the set of sharable + * permissions for @bs has changed to @perm, and the set of shareable * permission to @shared. The driver can use this to propagate changes= to * its children (i.e. request permissions only if a parent actually ne= eds diff --git a/include/chardev/char-fe.h b/include/chardev/char-fe.h index 8c420fa36e..82a2a92602 100644 --- a/include/chardev/char-fe.h +++ b/include/chardev/char-fe.h @@ -79,5 +79,5 @@ bool qemu_chr_fe_backend_open(CharBackend *be); * @opaque: an opaque pointer for the callbacks * @context: a main loop context or NULL for the default - * @set_open: whether to call qemu_chr_fe_set_open() implicitely when + * @set_open: whether to call qemu_chr_fe_set_open() implicitly when * any of the handler is non-NULL * @sync_state: whether to issue event callback with updated state @@ -139,5 +139,5 @@ void qemu_chr_fe_disconnect(CharBackend *be); * qemu_chr_fe_wait_connected: * - * Wait for characted backend to be connected, return < 0 on error or + * Wait for character backend to be connected, return < 0 on error or * if no associated Chardev. */ diff --git a/include/crypto/akcipher.h b/include/crypto/akcipher.h index 214e58ca47..8756105f22 100644 --- a/include/crypto/akcipher.h +++ b/include/crypto/akcipher.h @@ -31,5 +31,5 @@ typedef struct QCryptoAkCipher QCryptoAkCipher; * @opts: the asymmetric key algorithm and related options * - * Determine if asymmetric key cipher decribed with @opts is + * Determine if asymmetric key cipher described with @opts is * supported by the current configured build * diff --git a/include/crypto/ivgen.h b/include/crypto/ivgen.h index e41521519c..a09d5732da 100644 --- a/include/crypto/ivgen.h +++ b/include/crypto/ivgen.h @@ -33,5 +33,5 @@ * * - * Encrypting block data with initialiation vectors + * Encrypting block data with initialization vectors * * uint8_t *data =3D ....data to encrypt... @@ -148,5 +148,5 @@ QCryptoIVGen *qcrypto_ivgen_new(QCryptoIVGenAlgorithm a= lg, * @errp: pointer to a NULL-initialized error object * - * Calculate a new initialiation vector for the data + * Calculate a new initialization vector for the data * to be stored in sector @sector. The IV will be * written into the buffer @iv of size @niv. diff --git a/include/elf.h b/include/elf.h index ec9755e73b..e7259ec366 100644 --- a/include/elf.h +++ b/include/elf.h @@ -1126,7 +1126,7 @@ typedef struct { #define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */ =20 -/* Additional section indeces. */ +/* Additional section indices. */ =20 -#define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared +#define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tentatively declar= ed symbols in ANSI C. */ #define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. = */ diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index d1fb08514b..ff2a310270 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -278,5 +278,5 @@ void free_aml_allocator(void); * * Joins Aml elements together and helps to construct AML tables - * Examle of usage: + * Example of usage: * Aml *table =3D aml_def_block("SSDT", ...); * Aml *sb =3D aml_scope("\\_SB"); diff --git a/include/hw/acpi/pc-hotplug.h b/include/hw/acpi/pc-hotplug.h index 31bc9191c3..8a654248e9 100644 --- a/include/hw/acpi/pc-hotplug.h +++ b/include/hw/acpi/pc-hotplug.h @@ -14,5 +14,5 @@ =20 /* - * ONLY DEFINEs are permited in this file since it's shared + * ONLY DEFINEs are permitted in this file since it's shared * between C and ASL code. */ diff --git a/include/hw/acpi/vmgenid.h b/include/hw/acpi/vmgenid.h index dc8bb3433e..fb135d5bcb 100644 --- a/include/hw/acpi/vmgenid.h +++ b/include/hw/acpi/vmgenid.h @@ -14,5 +14,5 @@ #define VMGENID_FW_CFG_SIZE 4096 /* Occupy a page of memory */ #define VMGENID_GUID_OFFSET 40 /* allow space for - * OVMF SDT Header Probe Supressor + * OVMF SDT Header Probe Suppressor */ =20 diff --git a/include/hw/boards.h b/include/hw/boards.h index ed83360198..19a70ec04a 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -159,5 +159,5 @@ typedef struct { * @cpu_index_to_instance_props: * used to provide @cpu_index to socket/core/thread number mapping, all= owing - * legacy code to perform maping from cpu_index to topology properties + * legacy code to perform mapping from cpu_index to topology properties * Returns: tuple of socket/core/thread ids given cpu_index belongs to. * used to provide @cpu_index to socket number mapping, allowing @@ -212,8 +212,8 @@ typedef struct { * allowed. * @default_ram_id: - * Specifies inital RAM MemoryRegion name to be used for default backend + * Specifies initial RAM MemoryRegion name to be used for default backe= nd * creation if user explicitly hasn't specified backend with "memory-ba= ckend" * property. - * It also will be used as a way to optin into "-m" option support. + * It also will be used as a way to option into "-m" option support. * If it's not set by board, '-m' will be ignored and generic code will * not create default RAM MemoryRegion. diff --git a/include/hw/char/avr_usart.h b/include/hw/char/avr_usart.h index 62eaa1528e..0cc599e9b1 100644 --- a/include/hw/char/avr_usart.h +++ b/include/hw/char/avr_usart.h @@ -35,5 +35,5 @@ #define USART_BRRL 0x04 =20 -/* Relevant bits in regiters. */ +/* Relevant bits in registers. */ #define USART_CSRA_RXC (1 << 7) #define USART_CSRA_TXC (1 << 6) diff --git a/include/hw/clock.h b/include/hw/clock.h index 5c927cee7f..bb12117f67 100644 --- a/include/hw/clock.h +++ b/include/hw/clock.h @@ -205,5 +205,5 @@ static inline bool clock_set_ns(Clock *clk, unsigned ns) * @clock_set(). This will update recursively all connected clocks. * It is an error to call this function on a clock which has a source. - * Note: this function must not be called during device inititialization + * Note: this function must not be called during device initialization * or migration. */ diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index 3e8b1b737a..479713a36e 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -15,5 +15,5 @@ struct TCGCPUOps { /** - * @initialize: Initalize TCG state + * @initialize: Initialize TCG state * * Called when the first CPU is realized. diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index 1978730fba..f717e3f384 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -209,5 +209,5 @@ void cxl_event_set_status(CXLDeviceState *cxl_dstate, C= XLEventLogType log_type, * > followed, the behavior is undefined * - * CXL 2.0 Errata F4 states futher that the layouts in the specification a= re + * CXL 2.0 Errata F4 states further that the layouts in the specification = are * shown as greater than 128 bits, but implementations are expected to * use any size of access up to 64 bits. diff --git a/include/hw/hyperv/vmbus.h b/include/hw/hyperv/vmbus.h index 8ea660dd8e..5c505852f2 100644 --- a/include/hw/hyperv/vmbus.h +++ b/include/hw/hyperv/vmbus.h @@ -52,5 +52,5 @@ struct VMBusDeviceClass { uint16_t mmio_size_mb; =20 - /* Extentions to standard device callbacks */ + /* Extensions to standard device callbacks */ void (*vmdev_realize)(VMBusDevice *vdev, Error **errp); void (*vmdev_unrealize)(VMBusDevice *vdev); diff --git a/include/hw/i2c/npcm7xx_smbus.h b/include/hw/i2c/npcm7xx_smbus.h index 3555e6836f..dc45963c0e 100644 --- a/include/hw/i2c/npcm7xx_smbus.h +++ b/include/hw/i2c/npcm7xx_smbus.h @@ -59,5 +59,5 @@ typedef enum NPCM7xxSMBusStatus { * @fif_ctl: The FIFO control register. * @fif_cts: The FIFO control status register. - * @fair_per: The fair preriod register. + * @fair_per: The fair period register. * @txf_ctl: The transmit FIFO control register. * @t_out: The SMBus timeout register. diff --git a/include/hw/misc/auxbus.h b/include/hw/misc/auxbus.h index b05799d2f7..03cacdee42 100644 --- a/include/hw/misc/auxbus.h +++ b/include/hw/misc/auxbus.h @@ -107,5 +107,5 @@ void aux_bus_realize(AUXBus *bus); * Returns the reply of the request. * - * @bus Ths bus where the request happen. + * @bus The bus where the request happen. * @cmd The command requested. * @address The 20bits address of the slave. diff --git a/include/hw/misc/macio/pmu.h b/include/hw/misc/macio/pmu.h index ba76afb52a..ceb12082ae 100644 --- a/include/hw/misc/macio/pmu.h +++ b/include/hw/misc/macio/pmu.h @@ -77,5 +77,5 @@ #define PMU_INT_AUTO_SRQ_POLL 0x02 /* ??? */ =20 -/* Bits in the environement message (either obtained via PMU_GET_COVER, +/* Bits in the environment message (either obtained via PMU_GET_COVER, * or via PMU_INT_ENVIRONMENT on core99 */ #define PMU_ENV_LID_CLOSED 0x01 /* The lid is closed */ diff --git a/include/hw/net/mii.h b/include/hw/net/mii.h index ed1bb52b0f..f7feddac9b 100644 --- a/include/hw/net/mii.h +++ b/include/hw/net/mii.h @@ -72,5 +72,5 @@ #define MII_BMSR_EXTCAP (1 << 0) /* Ext-reg capability */ =20 -#define MII_ANAR_PAUSE_ASYM (1 << 11) /* Try for asymetric pause */ +#define MII_ANAR_PAUSE_ASYM (1 << 11) /* Try for asymmetric pause */ #define MII_ANAR_PAUSE (1 << 10) /* Try for pause */ #define MII_ANAR_TXFD (1 << 8) diff --git a/include/hw/pci-host/dino.h b/include/hw/pci-host/dino.h index a1b0184940..fd7975c798 100644 --- a/include/hw/pci-host/dino.h +++ b/include/hw/pci-host/dino.h @@ -1,4 +1,4 @@ /* - * HP-PARISC Dino PCI chipset emulation, as in B160L and similiar machines + * HP-PARISC Dino PCI chipset emulation, as in B160L and similar machines * * (C) 2017-2019 by Helge Deller diff --git a/include/hw/pci/pcie_aer.h b/include/hw/pci/pcie_aer.h index 1234fdc4e2..4a9f0ea69d 100644 --- a/include/hw/pci/pcie_aer.h +++ b/include/hw/pci/pcie_aer.h @@ -41,5 +41,5 @@ struct PCIEAERLog { * to avoid unreasonable memory usage. * I bet that 128 log size would be big enough, otherwise too many err= ors - * for system to function normaly. But could consecutive errors occur? + * for system to function normally. But could consecutive errors occur? */ #define PCIE_AER_LOG_MAX_DEFAULT 8 diff --git a/include/hw/ssi/xilinx_spips.h b/include/hw/ssi/xilinx_spips.h index 06bfd18312..1386d5ac8f 100644 --- a/include/hw/ssi/xilinx_spips.h +++ b/include/hw/ssi/xilinx_spips.h @@ -105,5 +105,5 @@ struct XlnxZynqMPQSPIPS { uint32_t regs[XLNX_ZYNQMP_SPIPS_R_MAX]; =20 - /* GQSPI has seperate tx/rx fifos */ + /* GQSPI has separate tx/rx fifos */ Fifo8 rx_fifo_g; Fifo8 tx_fifo_g; diff --git a/include/hw/virtio/virtio-net.h b/include/hw/virtio/virtio-net.h index 5f5dcb4572..e07a723027 100644 --- a/include/hw/virtio/virtio-net.h +++ b/include/hw/virtio/virtio-net.h @@ -110,5 +110,5 @@ typedef struct VirtioNetRscSeg { uint16_t packets; uint16_t dup_ack; - bool is_coalesced; /* need recal ipv4 header checksum, mark here = */ + bool is_coalesced; /* need recall ipv4 header checksum, mark here= */ VirtioNetRscUnit unit; NetClientState *nc; diff --git a/include/io/channel-socket.h b/include/io/channel-socket.h index 513c428fe4..ab15577d38 100644 --- a/include/io/channel-socket.h +++ b/include/io/channel-socket.h @@ -125,5 +125,5 @@ void qio_channel_socket_connect_async(QIOChannelSocket = *ioc, * @ioc: the socket channel object * @addr: the address to listen to - * @num: the expected ammount of connections + * @num: the expected amount of connections * @errp: pointer to a NULL-initialized error object * @@ -142,5 +142,5 @@ int qio_channel_socket_listen_sync(QIOChannelSocket *io= c, * @ioc: the socket channel object * @addr: the address to listen to - * @num: the expected ammount of connections + * @num: the expected amount of connections * @callback: the function to invoke on completion * @opaque: user data to pass to @callback diff --git a/include/io/task.h b/include/io/task.h index beec4f5cfd..dc7d32ebd0 100644 --- a/include/io/task.h +++ b/include/io/task.h @@ -146,5 +146,5 @@ typedef void (*QIOTaskWorker)(QIOTask *task, * in a background thread context, while still reporting the * results in the main event thread. This allows code which - * cannot easily be rewritten to be asychronous (such as DNS + * cannot easily be rewritten to be asynchronous (such as DNS * lookups) to be easily run non-blocking. Reporting the * results in the main thread context means that the caller diff --git a/include/qemu/iova-tree.h b/include/qemu/iova-tree.h index 8528e5c98f..2a10a7052e 100644 --- a/include/qemu/iova-tree.h +++ b/include/qemu/iova-tree.h @@ -16,5 +16,5 @@ * information, and no extra user data is allowed for each element. A * benefit is that we can merge adjacent ranges internally within the - * tree. It can save a lot of memory when the ranges are splitted but + * tree. It can save a lot of memory when the ranges are split but * mostly continuous. * @@ -129,5 +129,5 @@ const DMAMap *iova_tree_find_address(const IOVATree *tr= ee, hwaddr iova); * * @tree: the iova tree to iterate on - * @iterator: the interator for the mappings, return true to stop + * @iterator: the iterator for the mappings, return true to stop * * Iterate over the iova tree. diff --git a/include/qemu/yank.h b/include/qemu/yank.h index 5375a1f195..1907150933 100644 --- a/include/qemu/yank.h +++ b/include/qemu/yank.h @@ -26,5 +26,5 @@ typedef void (YankFn)(void *opaque); * @errp: Error object. * - * Returns true on success or false if an error occured. + * Returns true on success or false if an error occurred. */ bool yank_register_instance(const YankInstance *instance, Error **errp); diff --git a/include/sysemu/cryptodev-vhost.h b/include/sysemu/cryptodev-vh= ost.h index e8cab1356e..4c3c22acae 100644 --- a/include/sysemu/cryptodev-vhost.h +++ b/include/sysemu/cryptodev-vhost.h @@ -80,5 +80,5 @@ cryptodev_vhost_init( * @crypto: the cryptodev backend common vhost object * - * Clean the resouce associated with @crypto that realizaed + * Clean the resource associated with @crypto that realizaed * by cryptodev_vhost_init() * diff --git a/include/sysemu/cryptodev.h b/include/sysemu/cryptodev.h index bc021ce847..96d3998b93 100644 --- a/include/sysemu/cryptodev.h +++ b/include/sysemu/cryptodev.h @@ -340,5 +340,5 @@ void cryptodev_backend_free_client( * @errp: pointer to a NULL-initialized error object * - * Clean the resouce associated with @backend that realizaed + * Clean the resource associated with @backend that realizaed * by the specific backend's init() callback */ @@ -408,5 +408,5 @@ int cryptodev_backend_crypto_operation( * cryptodev_backend_set_used: * @backend: the cryptodev backend object - * @used: ture or false + * @used: true or false * * Set the cryptodev backend is used by virtio-crypto or not @@ -428,5 +428,5 @@ bool cryptodev_backend_is_used(CryptoDevBackend *backen= d); * cryptodev_backend_set_ready: * @backend: the cryptodev backend object - * @ready: ture or false + * @ready: true or false * * Set the cryptodev backend is ready or not, which is called diff --git a/include/sysemu/iothread.h b/include/sysemu/iothread.h index 8f8601d6ab..2102a90eca 100644 --- a/include/sysemu/iothread.h +++ b/include/sysemu/iothread.h @@ -60,5 +60,5 @@ void iothread_destroy(IOThread *iothread); =20 /* - * Returns true if executing withing IOThread context, + * Returns true if executing within IOThread context, * false otherwise. */ diff --git a/include/sysemu/stats.h b/include/sysemu/stats.h index fcf0983154..42c236c795 100644 --- a/include/sysemu/stats.h +++ b/include/sysemu/stats.h @@ -35,5 +35,5 @@ void add_stats_schema(StatsSchemaList **, StatsProvider, = StatsTarget, =20 /* - * True if a string matches the filter passed to the stats_fn callabck, + * True if a string matches the filter passed to the stats_fn callback, * false otherwise. * diff --git a/include/sysemu/tpm_backend.h b/include/sysemu/tpm_backend.h index 8fd3269c11..7fabafefee 100644 --- a/include/sysemu/tpm_backend.h +++ b/include/sysemu/tpm_backend.h @@ -116,5 +116,5 @@ int tpm_backend_startup_tpm(TPMBackend *s, size_t buffe= rsize); /** * tpm_backend_had_startup_error: - * @s: the backend to query for a statup error + * @s: the backend to query for a startup error * * Check whether the backend had an error during startup. Returns diff --git a/include/tcg/helper-info.h b/include/tcg/helper-info.h index 4b6c9b43e8..7c27d6164a 100644 --- a/include/tcg/helper-info.h +++ b/include/tcg/helper-info.h @@ -1,4 +1,4 @@ /* - * TCG Helper Infomation Structure + * TCG Helper Information Structure * * Copyright (c) 2023 Linaro Ltd diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 0875971719..f2b0eaa6da 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -880,5 +880,5 @@ enum { TCG_OPF_64BIT =3D 0x10, /* Instruction is optional and not implemented by the host, or insn - is generic and should not be implemened by the host. */ + is generic and should not be implemented by the host. */ TCG_OPF_NOT_PRESENT =3D 0x20, /* Instruction operands are vectors. */ @@ -1124,5 +1124,5 @@ static inline int tcg_can_emit_vec_op(TCGOpcode o, TC= GType t, unsigned ve) void tcg_expand_vec_op(TCGOpcode, TCGType, unsigned, TCGArg, ...); =20 -/* Replicate a constant C accoring to the log2 of the element size. */ +/* Replicate a constant C according to the log2 of the element size. */ uint64_t dup_const(unsigned vece, uint64_t c); =20 diff --git a/include/ui/kbd-state.h b/include/ui/kbd-state.h index eb9067dd53..fb79776128 100644 --- a/include/ui/kbd-state.h +++ b/include/ui/kbd-state.h @@ -66,5 +66,5 @@ void qkbd_state_key_event(QKbdState *kbd, QKeyCode qcode,= bool down); * * @kbd: state tracker state. - * @delay_ms: the delay in miliseconds. + * @delay_ms: the delay in milliseconds. */ void qkbd_state_set_delay(QKbdState *kbd, int delay_ms); diff --git a/include/ui/spice-display.h b/include/ui/spice-display.h index 5aa13664d6..e1a9b36185 100644 --- a/include/ui/spice-display.h +++ b/include/ui/spice-display.h @@ -43,5 +43,5 @@ =20 /* - * Internal enum to differenciate between options for + * Internal enum to differentiate between options for * io calls that have a sync (old) version and an _async (new) * version: diff --git a/include/user/safe-syscall.h b/include/user/safe-syscall.h index ddceef12e2..195cedac04 100644 --- a/include/user/safe-syscall.h +++ b/include/user/safe-syscall.h @@ -92,5 +92,5 @@ * The basic setup is that we make the host syscall via a known * section of host native assembly. If a signal occurs, our signal - * handler checks the interrupted host PC against the addresse of that + * handler checks the interrupted host PC against the address of that * known section. If the PC is before or at the address of the syscall * instruction then we change the PC to point at a "return --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770088650489.7046359895287; Tue, 22 Aug 2023 22:54:48 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgoX-0004Yd-Cd; Wed, 23 Aug 2023 01:53:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgoV-0004Ku-5R for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:55 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgoS-0007Sh-FK for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:54 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id D01161C3A2 for ; Wed, 23 Aug 2023 08:52:22 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 6E2862124A; Wed, 23 Aug 2023 08:52:04 +0300 (MSK) Received: (nullmailer pid 1917516 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 21/24] scripts/: spelling fixes Date: Wed, 23 Aug 2023 08:51:52 +0300 Message-Id: <20230823055155.1917375-22-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770089815100007 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- scripts/checkpatch.pl | 2 +- scripts/ci/gitlab-pipeline-status | 2 +- scripts/codeconverter/codeconverter/qom_macros.py | 2 +- scripts/oss-fuzz/minimize_qtest_trace.py | 8 ++++---- scripts/performance/topN_callgrind.py | 2 +- scripts/performance/topN_perf.py | 2 +- scripts/qapi/gen.py | 2 +- scripts/replay-dump.py | 2 +- scripts/simplebench/bench_block_job.py | 2 +- 9 files changed, 12 insertions(+), 12 deletions(-) diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index eeaec436eb..1ad9ccb74b 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -1622,5 +1622,5 @@ sub process { qr/%[-+ *.0-9]*([hljztL]|ll|hh)?(x|X|"\s*PRI[xX][^"]*"?)/; =20 - # don't consider groups splitted by [.:/ ], like 2A.20:12ab + # don't consider groups split by [.:/ ], like 2A.20:12ab my $tmpline =3D $rawline; $tmpline =3D~ s/($hex[.:\/ ])+$hex//g; diff --git a/scripts/ci/gitlab-pipeline-status b/scripts/ci/gitlab-pipeline= -status index 924db327ff..e3343b0510 100755 --- a/scripts/ci/gitlab-pipeline-status +++ b/scripts/ci/gitlab-pipeline-status @@ -29,5 +29,5 @@ class CommunicationFailure(Exception): =20 class NoPipelineFound(Exception): - """Communication is successfull but pipeline is not found.""" + """Communication is successful but pipeline is not found.""" =20 =20 diff --git a/scripts/codeconverter/codeconverter/qom_macros.py b/scripts/co= deconverter/codeconverter/qom_macros.py index 2d2f2055a3..2b0c8224a1 100644 --- a/scripts/codeconverter/codeconverter/qom_macros.py +++ b/scripts/codeconverter/codeconverter/qom_macros.py @@ -143,5 +143,5 @@ def make_structname(self) -> str: =20 def strip_typedef(self) -> Patch: - """generate patch that will strip typedef from the struct declarti= on + """generate patch that will strip typedef from the struct declarat= ion =20 The caller is responsible for readding the typedef somewhere else. diff --git a/scripts/oss-fuzz/minimize_qtest_trace.py b/scripts/oss-fuzz/mi= nimize_qtest_trace.py index 20825768c2..d1f3990c16 100755 --- a/scripts/oss-fuzz/minimize_qtest_trace.py +++ b/scripts/oss-fuzz/minimize_qtest_trace.py @@ -3,5 +3,5 @@ =20 """ -This takes a crashing qtest trace and tries to remove superflous operations +This takes a crashing qtest trace and tries to remove superfluous operatio= ns """ =20 @@ -39,5 +39,5 @@ def usage(): =20 -M1: enable a loop around the remove minimizer, which may help decrease so= me - timing dependant instructions. Off by default. + timing dependent instructions. Off by default. -M2: try setting bits in operand of write/out to zero. Off by default. =20 @@ -178,5 +178,5 @@ def remove_lines(newtrace, outpath): # from length/2^n bytes to the left does not work, try to move the= pivot # to the right side, then add one to n, until length/2^n =3D=3D 0.= The idea - # is to prune unneccessary bytes from long writes, while accommoda= ting + # is to prune unnecessary bytes from long writes, while accommodat= ing # arbitrary MemoryRegion access sizes and alignments. =20 @@ -293,5 +293,5 @@ def minimize_trace(inpath, outpath): while(old_len > len(newtrace)): old_len =3D len(newtrace) - print("trace lenth =3D ", old_len) + print("trace length =3D ", old_len) remove_lines(newtrace, outpath) if not M1 and not M2: diff --git a/scripts/performance/topN_callgrind.py b/scripts/performance/to= pN_callgrind.py index 67c59197af..f3f05fce55 100755 --- a/scripts/performance/topN_callgrind.py +++ b/scripts/performance/topN_callgrind.py @@ -5,5 +5,5 @@ # topN_callgrind.py [-h] [-n] -- \ # [] \ -# [] +# [] # # [-h] - Print the script arguments help message. diff --git a/scripts/performance/topN_perf.py b/scripts/performance/topN_pe= rf.py index 07be195fc8..7b19e6a742 100755 --- a/scripts/performance/topN_perf.py +++ b/scripts/performance/topN_perf.py @@ -5,5 +5,5 @@ # topN_perf.py [-h] [-n] -- \ # [] \ -# [] +# [] # # [-h] - Print the script arguments help message. diff --git a/scripts/qapi/gen.py b/scripts/qapi/gen.py index 70bc576a10..bf5716b5f3 100644 --- a/scripts/qapi/gen.py +++ b/scripts/qapi/gen.py @@ -82,5 +82,5 @@ def write(self, output_dir: str) -> None: os.makedirs(odir, exist_ok=3DTrue) =20 - # use os.open for O_CREAT to create and read a non-existant file + # use os.open for O_CREAT to create and read a non-existent file fd =3D os.open(pathname, os.O_RDWR | os.O_CREAT, 0o666) with os.fdopen(fd, 'r+', encoding=3D'utf-8') as fp: diff --git a/scripts/replay-dump.py b/scripts/replay-dump.py index 3ba97a6d30..b89dc29555 100755 --- a/scripts/replay-dump.py +++ b/scripts/replay-dump.py @@ -112,5 +112,5 @@ def print_event(eid, name, string=3DNone, event_count= =3DNone): =20 def decode_unimp(eid, name, _unused_dumpfile): - "Unimplimented decoder, will trigger exit" + "Unimplemented decoder, will trigger exit" print("%s not handled - will now stop" % (name)) return False diff --git a/scripts/simplebench/bench_block_job.py b/scripts/simplebench/b= ench_block_job.py index 56191db44b..e575a3af10 100755 --- a/scripts/simplebench/bench_block_job.py +++ b/scripts/simplebench/bench_block_job.py @@ -40,5 +40,5 @@ def bench_block_job(cmd, cmd_args, qemu_args): =20 Returns {'seconds': int} on success and {'error': str} on failure, dic= t may - contain addional 'vm-log' field. Return value is compatible with + contain additional 'vm-log' field. Return value is compatible with simplebench lib. """ --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 169277014406812.462727338445006; Tue, 22 Aug 2023 22:55:44 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgoZ-0004nD-6C; Wed, 23 Aug 2023 01:53:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgoX-0004eO-Qq for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:57 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgoT-0007Tp-5i for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:53:57 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 08B951C3A3 for ; Wed, 23 Aug 2023 08:52:23 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id A34C12124B; Wed, 23 Aug 2023 08:52:04 +0300 (MSK) Received: (nullmailer pid 1917519 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 22/24] tests/: spelling fixes Date: Wed, 23 Aug 2023 08:51:53 +0300 Message-Id: <20230823055155.1917375-23-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770144744100013 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev Reviewed-by: Eric Blake --- tests/avocado/acpi-bits.py | 4 ++-- tests/avocado/acpi-bits/bits-tests/testacpi.py2 | 4 ++-- tests/decode/err_pattern_group_ident2.decode | 2 +- tests/docker/common.rc | 2 +- tests/migration/guestperf-batch.py | 2 +- tests/migration/guestperf.py | 2 +- tests/plugin/mem.c | 2 +- tests/qapi-schema/bad-if-not.json | 2 +- tests/qemu-iotests/029 | 2 +- tests/qemu-iotests/040 | 8 ++++---- tests/qemu-iotests/046 | 2 +- tests/qemu-iotests/059 | 2 +- tests/qemu-iotests/061 | 2 +- tests/qemu-iotests/071 | 2 +- tests/qemu-iotests/197 | 2 +- tests/qemu-iotests/215 | 2 +- tests/qemu-iotests/298 | 2 +- tests/qemu-iotests/pylintrc | 2 +- tests/qtest/ahci-test.c | 2 +- tests/qtest/bcm2835-dma-test.c | 2 +- tests/qtest/bios-tables-test.c | 2 +- tests/qtest/ds1338-test.c | 2 +- tests/qtest/fuzz/generic_fuzz.c | 4 ++-- tests/qtest/libqos/qgraph.c | 4 ++-- tests/qtest/libqos/qgraph_internal.h | 2 +- tests/qtest/libqos/virtio-gpio.c | 2 +- tests/qtest/libqtest.c | 4 ++-- tests/qtest/migration-test.c | 6 +++--- tests/qtest/npcm7xx_timer-test.c | 2 +- tests/qtest/tpm-emu.c | 2 +- tests/qtest/tpm-tests.c | 2 +- tests/qtest/tpm-tests.h | 2 +- tests/qtest/tpm-tis-i2c-test.c | 2 +- tests/qtest/tpm-tis-util.c | 2 +- tests/qtest/vhost-user-blk-test.c | 2 +- tests/qtest/virtio-net-test.c | 2 +- tests/qtest/vmgenid-test.c | 2 +- tests/tsan/suppressions.tsan | 2 +- tests/uefi-test-tools/Makefile | 2 +- tests/unit/check-qjson.c | 2 +- tests/unit/test-aio.c | 2 +- tests/unit/test-bdrv-graph-mod.c | 12 ++++++------ tests/unit/test-crypto-secret.c | 2 +- tests/unit/test-qobject-input-visitor.c | 2 +- tests/unit/test-throttle.c | 4 ++-- tests/unit/test-util-filemonitor.c | 2 +- tests/unit/test-xs-node.c | 2 +- tests/vm/Makefile.include | 2 +- tests/vm/ubuntuvm.py | 2 +- 49 files changed, 65 insertions(+), 65 deletions(-) diff --git a/tests/avocado/acpi-bits.py b/tests/avocado/acpi-bits.py index 3ed286dcbd..bb3f818689 100644 --- a/tests/avocado/acpi-bits.py +++ b/tests/avocado/acpi-bits.py @@ -1,5 +1,5 @@ #!/usr/bin/env python3 # group: rw quick -# Exercize QEMU generated ACPI/SMBIOS tables using biosbits, +# Exercise QEMU generated ACPI/SMBIOS tables using biosbits, # https://biosbits.org/ # @@ -367,5 +367,5 @@ def tearDown(self): =20 def test_acpi_smbios_bits(self): - """The main test case implementaion.""" + """The main test case implementation.""" =20 iso_file =3D os.path.join(self._workDir, diff --git a/tests/avocado/acpi-bits/bits-tests/testacpi.py2 b/tests/avocad= o/acpi-bits/bits-tests/testacpi.py2 index f818a9cce6..7bf9075c1b 100644 --- a/tests/avocado/acpi-bits/bits-tests/testacpi.py2 +++ b/tests/avocado/acpi-bits/bits-tests/testacpi.py2 @@ -274,6 +274,6 @@ def test_rsdp(): # Checksum the first 20 bytes per ACPI 1.0 csum =3D sum(ord(c) for c in data[:20]) % 0x100 - testsuite.test('ACPI 1.0 table first 20 bytes cummulative checksum mus= t equal 0', csum =3D=3D 0) - testsuite.print_detail("Cummulative checksum =3D {} (Expected 0)".form= at(csum)) + testsuite.test('ACPI 1.0 table first 20 bytes cumulative checksum must= equal 0', csum =3D=3D 0) + testsuite.print_detail("Cumulative checksum =3D {} (Expected 0)".forma= t(csum)) =20 test_table_checksum(data) diff --git a/tests/decode/err_pattern_group_ident2.decode b/tests/decode/er= r_pattern_group_ident2.decode index bc859233b1..0abb7513e9 100644 --- a/tests/decode/err_pattern_group_ident2.decode +++ b/tests/decode/err_pattern_group_ident2.decode @@ -8,4 +8,4 @@ top 00000000 00000000 00000000 00000000 sub1 00000000 00000000 00000000 ........ %sub1 -# comments are suposed to be indented +# comments are supposed to be indented } diff --git a/tests/docker/common.rc b/tests/docker/common.rc index 9a33df2832..a611e6adf9 100755 --- a/tests/docker/common.rc +++ b/tests/docker/common.rc @@ -13,5 +13,5 @@ =20 # This might be set by ENV of a docker container... it is always -# overriden by TARGET_LIST if the user sets it. We special case +# overridden by TARGET_LIST if the user sets it. We special case # "none" to allow for other options like --disable-tcg to restrict the # builds we eventually do. diff --git a/tests/migration/guestperf-batch.py b/tests/migration/guestperf= -batch.py index ab6bdb9d38..9485eefe49 100755 --- a/tests/migration/guestperf-batch.py +++ b/tests/migration/guestperf-batch.py @@ -1,5 +1,5 @@ #!/usr/bin/env python3 # -# Migration test batch comparison invokation +# Migration test batch comparison invocation # # Copyright (c) 2016 Red Hat, Inc. diff --git a/tests/migration/guestperf.py b/tests/migration/guestperf.py index e8cc127fd0..07182f211e 100755 --- a/tests/migration/guestperf.py +++ b/tests/migration/guestperf.py @@ -1,5 +1,5 @@ #!/usr/bin/env python3 # -# Migration test direct invokation command +# Migration test direct invocation command # # Copyright (c) 2016 Red Hat, Inc. diff --git a/tests/plugin/mem.c b/tests/plugin/mem.c index f3b9f696a0..44e91065ba 100644 --- a/tests/plugin/mem.c +++ b/tests/plugin/mem.c @@ -99,5 +99,5 @@ QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugin_id= _t id, rw =3D QEMU_PLUGIN_MEM_RW; } else { - fprintf(stderr, "invaild value for argument track: %s\n", = opt); + fprintf(stderr, "invalid value for argument track: %s\n", = opt); return -1; } diff --git a/tests/qapi-schema/bad-if-not.json b/tests/qapi-schema/bad-if-n= ot.json index 9fdaacc47b..660fc4feb2 100644 --- a/tests/qapi-schema/bad-if-not.json +++ b/tests/qapi-schema/bad-if-not.json @@ -1,3 +1,3 @@ -# check 'if not' with empy argument +# check 'if not' with empty argument { 'struct': 'TestIfStruct', 'data': { 'foo': 'int' }, 'if': { 'not': '' } } diff --git a/tests/qemu-iotests/029 b/tests/qemu-iotests/029 index bd71dd2f22..7f4849b97b 100755 --- a/tests/qemu-iotests/029 +++ b/tests/qemu-iotests/029 @@ -40,5 +40,5 @@ trap "_cleanup; exit \$status" 0 1 2 3 15 . ./common.pattern =20 -# Any format supporting intenal snapshots +# Any format supporting internal snapshots _supported_fmt qcow2 _supported_proto generic diff --git a/tests/qemu-iotests/040 b/tests/qemu-iotests/040 index 30eb97829e..5601a4873c 100755 --- a/tests/qemu-iotests/040 +++ b/tests/qemu-iotests/040 @@ -846,5 +846,5 @@ class TestCommitWithFilters(iotests.QMPTestCase): self.assertIsNotNone(self.vm.node_info('cow-1')) =20 - # 2 has been comitted into 1 + # 2 has been committed into 1 self.pattern_files[2] =3D self.img1 =20 @@ -864,5 +864,5 @@ class TestCommitWithFilters(iotests.QMPTestCase): self.assertIsNotNone(self.vm.node_info('cow-0')) =20 - # 1 has been comitted into 0 + # 1 has been committed into 0 self.pattern_files[1] =3D self.img0 =20 @@ -901,5 +901,5 @@ class TestCommitWithFilters(iotests.QMPTestCase): self.assertEqual(drv0['inserted']['node-name'], 'cow-2') =20 - # 3 has been comitted into 2 + # 3 has been committed into 2 self.pattern_files[3] =3D self.img2 =20 @@ -917,5 +917,5 @@ class TestCommitWithFilters(iotests.QMPTestCase): self.assertIsNotNone(self.vm.node_info('cow-2')) =20 - # 3 has been comitted into 2 + # 3 has been committed into 2 self.pattern_files[3] =3D self.img2 =20 diff --git a/tests/qemu-iotests/046 b/tests/qemu-iotests/046 index 517b162508..4c9ed4d26e 100755 --- a/tests/qemu-iotests/046 +++ b/tests/qemu-iotests/046 @@ -126,5 +126,5 @@ EOF =20 # Sequential write, but the next cluster is already allocated -# and phyiscally in the right position +# and physically in the right position cat <file, not on the data_file, -# so thie test does not work with external data files +# so this test does not work with external data files _unsupported_imgopts data_file =20 diff --git a/tests/qemu-iotests/197 b/tests/qemu-iotests/197 index a2547bc280..08d9b49906 100755 --- a/tests/qemu-iotests/197 +++ b/tests/qemu-iotests/197 @@ -94,5 +94,5 @@ output=3D$($QEMU_IO -f qcow2 -C -c "read -P 0 1k $((2*102= 4*1024*1024 - 512))" \ case $output in *allocate*) - _notrun "Insufficent memory to run test" ;; + _notrun "Insufficient memory to run test" ;; *) printf '%s\n' "$output" ;; esac diff --git a/tests/qemu-iotests/215 b/tests/qemu-iotests/215 index d464596f14..6babbcdc1f 100755 --- a/tests/qemu-iotests/215 +++ b/tests/qemu-iotests/215 @@ -96,5 +96,5 @@ output=3D$($QEMU_IO \ case $output in *allocate*) - _notrun "Insufficent memory to run test" ;; + _notrun "Insufficient memory to run test" ;; *) printf '%s\n' "$output" ;; esac diff --git a/tests/qemu-iotests/298 b/tests/qemu-iotests/298 index ad560e2941..4e22567d95 100755 --- a/tests/qemu-iotests/298 +++ b/tests/qemu-iotests/298 @@ -142,5 +142,5 @@ class TestTruncate(iotests.QMPTestCase): =20 # Probably we'll want preallocate filter to keep align to cluster = when - # shrink preallocation, so, ignore small differece + # shrink preallocation, so, ignore small difference self.assertLess(abs(stat.st_size - refstat.st_size), 64 * 1024) =20 diff --git a/tests/qemu-iotests/pylintrc b/tests/qemu-iotests/pylintrc index f4f823a991..de2e0c2781 100644 --- a/tests/qemu-iotests/pylintrc +++ b/tests/qemu-iotests/pylintrc @@ -20,5 +20,5 @@ disable=3Dinvalid-name, # pylint warns about Optional[] etc. as unsubscriptable in 3.9 unsubscriptable-object, - # pylint's static analysis causes false positivies for file_path(); + # pylint's static analysis causes false positives for file_path(); # If we really care to make it statically knowable, we'll use mypy. unbalanced-tuple-unpacking, diff --git a/tests/qtest/ahci-test.c b/tests/qtest/ahci-test.c index abab761c26..eea8b5f77b 100644 --- a/tests/qtest/ahci-test.c +++ b/tests/qtest/ahci-test.c @@ -331,5 +331,5 @@ static void ahci_test_pci_spec(AHCIQState *ahci) g_assert_cmphex(datal, !=3D, 0); =20 - /* Check specification adherence for capability extenstions. */ + /* Check specification adherence for capability extensions. */ data =3D qpci_config_readw(ahci->dev, datal); =20 diff --git a/tests/qtest/bcm2835-dma-test.c b/tests/qtest/bcm2835-dma-test.c index 8293d822b9..18901b76d2 100644 --- a/tests/qtest/bcm2835-dma-test.c +++ b/tests/qtest/bcm2835-dma-test.c @@ -26,5 +26,5 @@ #define BCM2708_DMA_INT_STATUS 0xfe0 =20 -/* DMA Trasfer Info fields: */ +/* DMA Transfer Info fields: */ #define BCM2708_DMA_INT_EN (1 << 0) #define BCM2708_DMA_D_INC (1 << 4) diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c index 47ba20b957..0e0b1db47d 100644 --- a/tests/qtest/bios-tables-test.c +++ b/tests/qtest/bios-tables-test.c @@ -27,5 +27,5 @@ * make check V=3D2 * this will produce a bunch of warnings about differences - * beween actual and expected ACPI tables. If you have IASL installed, + * between actual and expected ACPI tables. If you have IASL installed, * they will also be disassembled so you can look at the disassembled * output. If not - disassemble them yourself in any way you like. diff --git a/tests/qtest/ds1338-test.c b/tests/qtest/ds1338-test.c index f6ade9a050..d12424d27f 100644 --- a/tests/qtest/ds1338-test.c +++ b/tests/qtest/ds1338-test.c @@ -39,5 +39,5 @@ static void send_and_receive(void *obj, void *data, QGues= tAllocator *alloc) i2c_read_block(i2cdev, 0, resp, sizeof(resp)); =20 - /* check retrieved time againt local time */ + /* check retrieved time against local time */ g_assert_cmpuint(bcd2bin(resp[4]), =3D=3D , tm_ptr->tm_mday); g_assert_cmpuint(bcd2bin(resp[5]), =3D=3D , 1 + tm_ptr->tm_mon); diff --git a/tests/qtest/fuzz/generic_fuzz.c b/tests/qtest/fuzz/generic_fuz= z.c index 11256abf6c..357e1f9dc2 100644 --- a/tests/qtest/fuzz/generic_fuzz.c +++ b/tests/qtest/fuzz/generic_fuzz.c @@ -847,7 +847,7 @@ static void generic_pre_fuzz(QTestState *s) * * This function attempts to produce an input that: - * Ouptut: maps a device's BARs, set up three DMA patterns, triggers + * Output: maps a device's BARs, set up three DMA patterns, triggers * functionality A device, replaces the DMA patterns with a single - * patten, and triggers device functionality B. + * pattern, and triggers device functionality B. */ static size_t generic_fuzz_crossover(const uint8_t *data1, size_t size1, c= onst diff --git a/tests/qtest/libqos/qgraph.c b/tests/qtest/libqos/qgraph.c index 0a2dddfafa..2029bf9804 100644 --- a/tests/qtest/libqos/qgraph.c +++ b/tests/qtest/libqos/qgraph.c @@ -55,5 +55,5 @@ struct QOSStackElement { }; =20 -/* Each enty in these hash table will consist of pair.= */ +/* Each entry in these hash table will consist of pair= . */ static GHashTable *edge_table; static GHashTable *node_table; @@ -215,5 +215,5 @@ static QOSGraphEdge *search_list_edges(QOSGraphEdgeList= *edgelist, * search_machine(): search for a machine @name in the node hash * table. A machine is the child of the root node. - * This function forces the research in the childs of the root, + * This function forces the research in the children of the root, * to check the node is a proper machine * diff --git a/tests/qtest/libqos/qgraph_internal.h b/tests/qtest/libqos/qgra= ph_internal.h index 7d62fd17af..87fab1f9f0 100644 --- a/tests/qtest/libqos/qgraph_internal.h +++ b/tests/qtest/libqos/qgraph_internal.h @@ -198,5 +198,5 @@ char *qos_graph_edge_get_name(QOSGraphEdge *edge); * to that @node name. * - * It performs a search only trough the list of machines + * It performs a search only through the list of machines * (i.e. the QOS_ROOT child). * diff --git a/tests/qtest/libqos/virtio-gpio.c b/tests/qtest/libqos/virtio-g= pio.c index f22d7b5eb5..9220d287fe 100644 --- a/tests/qtest/libqos/virtio-gpio.c +++ b/tests/qtest/libqos/virtio-gpio.c @@ -29,5 +29,5 @@ static void virtio_gpio_cleanup(QVhostUserGPIO *gpio) /* * This handles the VirtIO setup from the point of view of the driver - * frontend and therefor doesn't present any vhost specific features + * frontend and therefore doesn't present any vhost specific features * and in fact masks of the re-used bit. */ diff --git a/tests/qtest/libqtest.c b/tests/qtest/libqtest.c index c22dfc30d3..7bbac5b9d0 100644 --- a/tests/qtest/libqtest.c +++ b/tests/qtest/libqtest.c @@ -113,5 +113,5 @@ static int socket_accept(int sock) int ret; /* - * timeout unit of blocking receive calls is different among platfoms. + * timeout unit of blocking receive calls is different among platforms. * It's in seconds on non-Windows platforms but milliseconds on Window= s. */ @@ -1692,5 +1692,5 @@ QTestState *qtest_inproc_init(QTestState **s, bool lo= g, const char* arch, qtest_client_set_rx_handler(qts, qtest_client_inproc_recv_line); =20 - /* send() may not have a matching protoype, so use a type-safe wrapper= */ + /* send() may not have a matching prototype, so use a type-safe wrappe= r */ qts->ops.external_send =3D send; qtest_client_set_tx_handler(qts, send_wrapper); diff --git a/tests/qtest/migration-test.c b/tests/qtest/migration-test.c index 62d3f37021..1b43df5ca7 100644 --- a/tests/qtest/migration-test.c +++ b/tests/qtest/migration-test.c @@ -487,5 +487,5 @@ static void migrate_ensure_converge(QTestState *who) * * Finally we go back to the source and read a byte just - * before the marker untill we see it flip in value. This + * before the marker until we see it flip in value. This * is proof that start_address -> MAGIC_OFFSET_BASE * is now dirty again. @@ -827,5 +827,5 @@ static int test_migrate_start(QTestState **from, QTestS= tate **to, /* * Remove shmem file immediately to avoid memory leak in test failed c= ase. - * It's valid becase QEMU has already opened this file + * It's valid because QEMU has already opened this file */ if (args->use_shmem) { @@ -2104,5 +2104,5 @@ static void test_migrate_auto_converge(void) /* * We want the test to be stable and as fast as possible. - * E.g., with 1Gb/s bandwith migration may pass without throttling, + * E.g., with 1Gb/s bandwidth migration may pass without throttling, * so we need to decrease a bandwidth. */ diff --git a/tests/qtest/npcm7xx_timer-test.c b/tests/qtest/npcm7xx_timer-t= est.c index 83774a5b90..43711049ca 100644 --- a/tests/qtest/npcm7xx_timer-test.c +++ b/tests/qtest/npcm7xx_timer-test.c @@ -385,5 +385,5 @@ static void test_pause_resume(gconstpointer test_data) } =20 -/* Verifies that the prescaler can be changed while the timer is runnin. */ +/* Verifies that the prescaler can be changed while the timer is running. = */ static void test_prescaler_change(gconstpointer test_data) { diff --git a/tests/qtest/tpm-emu.c b/tests/qtest/tpm-emu.c index f05fe12f01..2bf8ff4c86 100644 --- a/tests/qtest/tpm-emu.c +++ b/tests/qtest/tpm-emu.c @@ -78,5 +78,5 @@ static void *tpm_emu_tpm_thread(void *data) break; default: - g_debug("unsupport TPM version %u", s->tpm_version); + g_debug("unsupported TPM version %u", s->tpm_version); g_assert_not_reached(); } diff --git a/tests/qtest/tpm-tests.c b/tests/qtest/tpm-tests.c index 25073d1f9e..fb94496bbd 100644 --- a/tests/qtest/tpm-tests.c +++ b/tests/qtest/tpm-tests.c @@ -1,4 +1,4 @@ /* - * QTest TPM commont test code + * QTest TPM common test code * * Copyright (c) 2018 IBM Corporation diff --git a/tests/qtest/tpm-tests.h b/tests/qtest/tpm-tests.h index a5df35ab5b..07ba60d26e 100644 --- a/tests/qtest/tpm-tests.h +++ b/tests/qtest/tpm-tests.h @@ -1,4 +1,4 @@ /* - * QTest TPM commont test code + * QTest TPM common test code * * Copyright (c) 2018 IBM Corporation diff --git a/tests/qtest/tpm-tis-i2c-test.c b/tests/qtest/tpm-tis-i2c-test.c index 7a590ac551..3a1af026f2 100644 --- a/tests/qtest/tpm-tis-i2c-test.c +++ b/tests/qtest/tpm-tis-i2c-test.c @@ -469,5 +469,5 @@ static void tpm_tis_i2c_test_check_access_reg_release(c= onst void *data) /* * highest locality should now be active; release it and make sure= the - * next higest locality is active afterwards + * next highest locality is active afterwards */ for (l =3D TPM_TIS_NUM_LOCALITIES - 2; l >=3D 0; l--) { diff --git a/tests/qtest/tpm-tis-util.c b/tests/qtest/tpm-tis-util.c index 728cd3e065..862bb53248 100644 --- a/tests/qtest/tpm-tis-util.c +++ b/tests/qtest/tpm-tis-util.c @@ -341,5 +341,5 @@ void tpm_tis_test_check_access_reg_release(const void *= data) /* * highest locality should now be active; release it and make sure= the - * next higest locality is active afterwards + * next highest locality is active afterwards */ for (l =3D TPM_TIS_NUM_LOCALITIES - 2; l >=3D 0; l--) { diff --git a/tests/qtest/vhost-user-blk-test.c b/tests/qtest/vhost-user-blk= -test.c index dc37f5af4d..117b9acd10 100644 --- a/tests/qtest/vhost-user-blk-test.c +++ b/tests/qtest/vhost-user-blk-test.c @@ -962,5 +962,5 @@ static void *vhost_user_blk_test_setup(GString *cmd_lin= e, void *arg) * * Since vhost-user server only serves one vhost-user client one time, - * another exprot + * another export * */ diff --git a/tests/qtest/virtio-net-test.c b/tests/qtest/virtio-net-test.c index dff43f0f60..fab5dd8b05 100644 --- a/tests/qtest/virtio-net-test.c +++ b/tests/qtest/virtio-net-test.c @@ -213,5 +213,5 @@ static void announce_self(void *obj, void *data, QGuest= Allocator *t_alloc) =20 /* - * Stop the announcment by settings rounds to 0 on the + * Stop the announcement by settings rounds to 0 on the * existing timer. */ diff --git a/tests/qtest/vmgenid-test.c b/tests/qtest/vmgenid-test.c index 324db08c7a..29fee9e7c0 100644 --- a/tests/qtest/vmgenid-test.c +++ b/tests/qtest/vmgenid-test.c @@ -20,5 +20,5 @@ #define VGID_GUID "324e6eaf-d1d1-4bf6-bf41-b9bb6c91fb87" #define VMGENID_GUID_OFFSET 40 /* allow space for - * OVMF SDT Header Probe Supressor + * OVMF SDT Header Probe Suppressor */ #define RSDP_ADDR_INVALID 0x100000 /* RSDP must be below this address */ diff --git a/tests/tsan/suppressions.tsan b/tests/tsan/suppressions.tsan index 73414b9ebd..d9a002a2ef 100644 --- a/tests/tsan/suppressions.tsan +++ b/tests/tsan/suppressions.tsan @@ -8,5 +8,5 @@ mutex:aio_context_acquire mutex:pthread_mutex_lock =20 -# TSan reports a race betwen pthread_mutex_init() and +# TSan reports a race between pthread_mutex_init() and # pthread_mutex_lock(). Since this is outside of QEMU, # we choose to ignore it. diff --git a/tests/uefi-test-tools/Makefile b/tests/uefi-test-tools/Makefile index 471f0de981..0c003f2877 100644 --- a/tests/uefi-test-tools/Makefile +++ b/tests/uefi-test-tools/Makefile @@ -88,5 +88,5 @@ Build/%.fat: Build/%.efi =20 # In turn, the "build" utility of edk2 BaseTools invokes another "make". -# Although the outer "make" process advertizes its job server to all child +# Although the outer "make" process advertises its job server to all child # processes via MAKEFLAGS in the environment, the outer "make" closes the = job # server file descriptors (exposed in MAKEFLAGS) before executing a recipe= -- diff --git a/tests/unit/check-qjson.c b/tests/unit/check-qjson.c index c4e0f851bf..a89293ce51 100644 --- a/tests/unit/check-qjson.c +++ b/tests/unit/check-qjson.c @@ -1487,5 +1487,5 @@ int main(int argc, char **argv) =20 g_test_add_func("/literals/interpolation/valid", interpolation_valid); - g_test_add_func("/literals/interpolation/unkown", interpolation_unknow= n); + g_test_add_func("/literals/interpolation/unknown", interpolation_unkno= wn); g_test_add_func("/literals/interpolation/string", interpolation_string= ); =20 diff --git a/tests/unit/test-aio.c b/tests/unit/test-aio.c index 519440eed3..71ed31a4db 100644 --- a/tests/unit/test-aio.c +++ b/tests/unit/test-aio.c @@ -455,5 +455,5 @@ static void test_timer_schedule(void) g_assert_cmpint(data.n, =3D=3D, 0); =20 - /* timer_mod may well cause an event notifer to have gone off, + /* timer_mod may well cause an event notifier to have gone off, * so clear that */ diff --git a/tests/unit/test-bdrv-graph-mod.c b/tests/unit/test-bdrv-graph-= mod.c index c522591531..36eed4b464 100644 --- a/tests/unit/test-bdrv-graph-mod.c +++ b/tests/unit/test-bdrv-graph-mod.c @@ -99,7 +99,7 @@ static BlockDriverState *exclusive_writer_node(const char= *name) * | shared: except write * v - * +-------------------+ +----------------+ - * | passtrough filter |---------->| null-co node | - * +-------------------+ +----------------+ + * +--------------------+ +----------------+ + * | passthrough filter |--------->| null-co node | + * +--------------------+ +----------------+ * * @@ -115,7 +115,7 @@ static BlockDriverState *exclusive_writer_node(const ch= ar *name) * | shared: except write * v - * +-------------------+ - * | passtrough filter | - * +-------------------+ + * +--------------------+ + * | passthrough filter | + * +--------------------+ * | | * perm: write, read | | perm: write, read diff --git a/tests/unit/test-crypto-secret.c b/tests/unit/test-crypto-secre= t.c index 147b4af828..ffd13ff70e 100644 --- a/tests/unit/test-crypto-secret.c +++ b/tests/unit/test-crypto-secret.c @@ -245,5 +245,5 @@ static void test_secret_keyring_bad_key_access_right(vo= id) Object *sec; =20 - g_test_skip("TODO: Need responce from Linux kernel maintainers"); + g_test_skip("TODO: Need response from Linux kernel maintainers"); return; =20 diff --git a/tests/unit/test-qobject-input-visitor.c b/tests/unit/test-qobj= ect-input-visitor.c index 9b3e2dbe14..024e26c49e 100644 --- a/tests/unit/test-qobject-input-visitor.c +++ b/tests/unit/test-qobject-input-visitor.c @@ -95,5 +95,5 @@ Visitor *visitor_input_test_init(TestInputVisitorData *da= ta, /* similar to visitor_input_test_init(), but does not expect a string * literal/format json_string argument and so can be used for - * programatically generated strings (and we can't pass in programatically + * programmatically generated strings (and we can't pass in programmatical= ly * generated strings via %s format parameters since qobject_from_jsonv() * will wrap those in double-quotes and treat the entire object as a diff --git a/tests/unit/test-throttle.c b/tests/unit/test-throttle.c index 7adb5e6652..9ba1c73c35 100644 --- a/tests/unit/test-throttle.c +++ b/tests/unit/test-throttle.c @@ -136,5 +136,5 @@ static void test_compute_wait(void) g_assert(double_cmp(bkt.level, (i + 1) * (bkt.max - bkt.avg) / 10)= ); /* We can do bursts for the 2 seconds we have configured in - * burst_length. We have 100 extra miliseconds of burst + * burst_length. We have 100 extra milliseconds of burst * because bkt.level has been leaking during this time. * After that, we have to wait. */ @@ -380,5 +380,5 @@ static void test_is_valid(void) /* zero are valids */ test_is_valid_for_value(0, true); - /* positives numers are valids */ + /* positives numbers are valids */ test_is_valid_for_value(1, true); } diff --git a/tests/unit/test-util-filemonitor.c b/tests/unit/test-util-file= monitor.c index b629e10857..a22de27595 100644 --- a/tests/unit/test-util-filemonitor.c +++ b/tests/unit/test-util-filemonitor.c @@ -133,5 +133,5 @@ qemu_file_monitor_test_record_free(QFileMonitorTestReco= rd *rec) * emitted in the background thread running the event * loop, we can't assume there is a record available - * immediately. Thus we will sleep for upto 5 seconds + * immediately. Thus we will sleep for up to 5 seconds * to wait for the event to be queued for us. */ diff --git a/tests/unit/test-xs-node.c b/tests/unit/test-xs-node.c index b80d10ff98..ac94e7ed6c 100644 --- a/tests/unit/test-xs-node.c +++ b/tests/unit/test-xs-node.c @@ -363,5 +363,5 @@ static void test_xs_node_simple(void) g_assert(!memcmp(data->data, "something", data->len)); =20 - /* Even if we use an abolute path */ + /* Even if we use an absolute path */ g_byte_array_set_size(data, 0); err =3D xs_impl_read(s, DOMID_GUEST, XBT_NULL, diff --git a/tests/vm/Makefile.include b/tests/vm/Makefile.include index c2a8ca1c17..e87dd7cd7a 100644 --- a/tests/vm/Makefile.include +++ b/tests/vm/Makefile.include @@ -82,5 +82,5 @@ endif @echo " QEMU_LOCAL=3D1 - Use QEMU binary local to this= build." @echo " TARGET_LIST=3Da,b,c - Override target list in builds" - @echo " V=3D1 - Enable verbose ouput on host and guest commands" + @echo " V=3D1 - Enable verbose output on host and guest commands" =20 vm-build-all: $(addprefix vm-build-, $(IMAGES)) diff --git a/tests/vm/ubuntuvm.py b/tests/vm/ubuntuvm.py index 6689ad87aa..15c530c571 100644 --- a/tests/vm/ubuntuvm.py +++ b/tests/vm/ubuntuvm.py @@ -52,5 +52,5 @@ def build_image(self, img): if self._config['install_cmds'] !=3D "": # Issue the install commands. - # This can be overriden by the user in the config .yml. + # This can be overridden by the user in the config .yml. install_cmds =3D self._config['install_cmds'].split(',') for cmd in install_cmds: --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770061696853.5584388006985; Tue, 22 Aug 2023 22:54:21 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgom-0006t7-TX; Wed, 23 Aug 2023 01:54:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgoj-0006Ys-D6 for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:54:09 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgog-0007Va-6K for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:54:09 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 3FE361C3A4 for ; Wed, 23 Aug 2023 08:52:23 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id D01B12124C; Wed, 23 Aug 2023 08:52:04 +0300 (MSK) Received: (nullmailer pid 1917522 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 23/24] qga/: spelling fixes Date: Wed, 23 Aug 2023 08:51:54 +0300 Message-Id: <20230823055155.1917375-24-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770063814100011 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev Reviewed-by: Eric Blake --- qga/channel-posix.c | 2 +- qga/commands-posix-ssh.c | 2 +- qga/commands-posix.c | 2 +- qga/commands-win32.c | 4 ++-- qga/main.c | 2 +- qga/vss-win32/install.cpp | 4 ++-- 6 files changed, 8 insertions(+), 8 deletions(-) diff --git a/qga/channel-posix.c b/qga/channel-posix.c index 0c5175d957..465d688ecb 100644 --- a/qga/channel-posix.c +++ b/qga/channel-posix.c @@ -153,5 +153,5 @@ static gboolean ga_channel_open(GAChannel *c, const gch= ar *path, /* * In the default state channel sends echo of every command to a - * client. The client programm doesn't expect this and raises an + * client. The client program doesn't expect this and raises an * error. Suppress echo by resetting ECHO terminal flag. */ diff --git a/qga/commands-posix-ssh.c b/qga/commands-posix-ssh.c index f3a580b8cc..236f80de44 100644 --- a/qga/commands-posix-ssh.c +++ b/qga/commands-posix-ssh.c @@ -383,5 +383,5 @@ test_add_keys(void) g_assert(err =3D=3D NULL); =20 - /* key2 came first, and should'nt be duplicated */ + /* key2 came first, and shouldn't be duplicated */ test_authorized_keys_equal("algo key2 comments\n" "algo key1 comments"); diff --git a/qga/commands-posix.c b/qga/commands-posix.c index def857d773..6169bbf7a0 100644 --- a/qga/commands-posix.c +++ b/qga/commands-posix.c @@ -3250,5 +3250,5 @@ GuestUserList *qmp_guest_get_users(Error **errp) #endif =20 -/* Replace escaped special characters with theire real values. The replace= ment +/* Replace escaped special characters with their real values. The replacem= ent * is done in place -- returned value is in the original string. */ diff --git a/qga/commands-win32.c b/qga/commands-win32.c index d23875264f..6beae659b7 100644 --- a/qga/commands-win32.c +++ b/qga/commands-win32.c @@ -488,5 +488,5 @@ static GuestDiskBusType win2qemu[] =3D { [BusTypeFileBackedVirtual] =3D GUEST_DISK_BUS_TYPE_FILE_BACKED_VIRTUAL, /* - * BusTypeSpaces currently is not suported + * BusTypeSpaces currently is not supported */ [BusTypeSpaces] =3D GUEST_DISK_BUS_TYPE_UNKNOWN, @@ -2260,5 +2260,5 @@ static char *ga_get_win_product_name(Error **errp) } if (err !=3D ERROR_SUCCESS) { - error_setg_win32(errp, err, "failed to retrive ProductName"); + error_setg_win32(errp, err, "failed to retrieve ProductName"); goto fail; } diff --git a/qga/main.c b/qga/main.c index 002161a0cc..8668b9f3d3 100644 --- a/qga/main.c +++ b/qga/main.c @@ -1334,5 +1334,5 @@ static bool check_is_frozen(GAState *s) * marked as frozen. this could be a stale value (a non-qemu-ga process * or reboot may have since unfrozen them), but better to require an - * uneeded unfreeze than to risk hanging on start-up + * unneeded unfreeze than to risk hanging on start-up */ struct stat st; diff --git a/qga/vss-win32/install.cpp b/qga/vss-win32/install.cpp index ae38662a62..84944133f7 100644 --- a/qga/vss-win32/install.cpp +++ b/qga/vss-win32/install.cpp @@ -344,5 +344,5 @@ STDAPI COMRegister(void) _bstr_t(""))); =20 - /* Setup roles of the applicaion */ + /* Setup roles of the application */ =20 chk(getNameByStringSID(administratorsGroupSID, buffer, &bufferLen)); @@ -440,5 +440,5 @@ STDAPI DllRegisterServer(void) } =20 - /* Add this module to registery */ + /* Add this module to registry */ =20 sprintf(key, "CLSID\\%s", g_szClsid); --=20 2.39.2 From nobody Thu Nov 28 13:59:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692770079662930.8363999740469; Tue, 22 Aug 2023 22:54:39 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qYgor-0007G7-Ax; Wed, 23 Aug 2023 01:54:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgon-00075h-5n for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:54:13 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qYgoj-0007Vx-1b for qemu-devel@nongnu.org; Wed, 23 Aug 2023 01:54:12 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 6C01F1C3A5 for ; Wed, 23 Aug 2023 08:52:23 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 131D12124D; Wed, 23 Aug 2023 08:52:05 +0300 (MSK) Received: (nullmailer pid 1917526 invoked by uid 1000); Wed, 23 Aug 2023 05:52:00 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PATCH 24/24] misc/other: spelling fixes Date: Wed, 23 Aug 2023 08:51:55 +0300 Message-Id: <20230823055155.1917375-25-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692770080043100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Tokarev --- accel/tcg/tb-maint.c | 2 +- backends/tpm/tpm_ioctl.h | 2 +- chardev/char-socket.c | 6 +++--- chardev/char.c | 2 +- contrib/plugins/cache.c | 2 +- contrib/plugins/lockstep.c | 2 +- crypto/afalg.c | 2 +- crypto/block-luks.c | 6 +++--- crypto/der.c | 2 +- crypto/der.h | 6 +++--- linux-user/flatload.c | 2 +- linux-user/syscall.c | 4 ++-- nbd/client-connection.c | 2 +- net/checksum.c | 4 ++-- net/filter.c | 4 ++-- net/vhost-vdpa.c | 8 ++++---- semihosting/config.c | 2 +- semihosting/syscalls.c | 4 ++-- softmmu/icount.c | 2 +- softmmu/ioport.c | 2 +- 20 files changed, 33 insertions(+), 33 deletions(-) diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index c406b2f7b7..32ae8af61c 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -1,4 +1,4 @@ /* - * Translation Block Maintaince + * Translation Block Maintenance * * Copyright (c) 2003 Fabrice Bellard diff --git a/backends/tpm/tpm_ioctl.h b/backends/tpm/tpm_ioctl.h index b1d31768a6..1933ab6855 100644 --- a/backends/tpm/tpm_ioctl.h +++ b/backends/tpm/tpm_ioctl.h @@ -239,5 +239,5 @@ struct ptm_lockstorage { struct { ptm_res tpm_result; - } resp; /* reponse */ + } resp; /* response */ } u; }; diff --git a/chardev/char-socket.c b/chardev/char-socket.c index e8e3a743d5..73947da188 100644 --- a/chardev/char-socket.c +++ b/chardev/char-socket.c @@ -711,5 +711,5 @@ static void tcp_chr_telnet_init(Chardev *chr) if (!s->is_tn3270) { init->buflen =3D 12; - /* Prep the telnet negotion to put telnet in binary, + /* Prep the telnet negotiation to put telnet in binary, * no echo, single char mode */ IACSET(init->buf, 0xff, 0xfb, 0x01); /* IAC WILL ECHO */ @@ -719,5 +719,5 @@ static void tcp_chr_telnet_init(Chardev *chr) } else { init->buflen =3D 21; - /* Prep the TN3270 negotion based on RFC1576 */ + /* Prep the TN3270 negotiation based on RFC1576 */ IACSET(init->buf, 0xff, 0xfd, 0x19); /* IAC DO EOR */ IACSET(init->buf, 0xff, 0xfb, 0x19); /* IAC WILL EOR */ @@ -1299,5 +1299,5 @@ static bool qmp_chardev_validate_socket(ChardevSocket= *sock, } =20 - /* Validate any options which have a dependancy on client vs server */ + /* Validate any options which have a dependency on client vs server */ if (!sock->has_server || sock->server) { if (sock->has_reconnect) { diff --git a/chardev/char.c b/chardev/char.c index 661ad8176a..996a024c7a 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -1116,5 +1116,5 @@ ChardevReturn *qmp_chardev_change(const char *id, Cha= rdevBackend *backend, } =20 - /* change successfull, clean up */ + /* change successful, clean up */ chr_new->handover_yank_instance =3D false; =20 diff --git a/contrib/plugins/cache.c b/contrib/plugins/cache.c index 5036213f1b..dea4a56c8d 100644 --- a/contrib/plugins/cache.c +++ b/contrib/plugins/cache.c @@ -351,5 +351,5 @@ static int in_cache(Cache *cache, uint64_t addr) * @addr: The address of the requested memory location * - * Returns true if the requsted data is hit in the cache and false when mi= ssed. + * Returns true if the requested data is hit in the cache and false when m= issed. * The cache is updated on miss for the next access. */ diff --git a/contrib/plugins/lockstep.c b/contrib/plugins/lockstep.c index 3614c3564c..850f7b2941 100644 --- a/contrib/plugins/lockstep.c +++ b/contrib/plugins/lockstep.c @@ -109,5 +109,5 @@ static void report_divergance(ExecState *us, ExecState = *them) /* * If we have diverged before did we get back on track or are we - * totally loosing it? + * totally losing it? */ if (divergence_log) { diff --git a/crypto/afalg.c b/crypto/afalg.c index 348301e703..52a491dbb5 100644 --- a/crypto/afalg.c +++ b/crypto/afalg.c @@ -74,5 +74,5 @@ qcrypto_afalg_comm_alloc(const char *type, const char *na= me, =20 afalg =3D g_new0(QCryptoAFAlg, 1); - /* initilize crypto API socket */ + /* initialize crypto API socket */ afalg->opfd =3D -1; afalg->tfmfd =3D qcrypto_afalg_socket_bind(type, name, errp); diff --git a/crypto/block-luks.c b/crypto/block-luks.c index 2f59c3a625..8430217d6e 100644 --- a/crypto/block-luks.c +++ b/crypto/block-luks.c @@ -245,5 +245,5 @@ qcrypto_block_luks_has_format(const uint8_t *buf, * When calculating ESSIV IVs, the cipher length used by ESSIV * may be different from the cipher length used for the block - * encryption, becauses dm-crypt uses the hash digest length + * encryption, because dm-crypt uses the hash digest length * as the key size. ie, if you have AES 128 as the block cipher * and SHA 256 as ESSIV hash, then ESSIV will use AES 256 as @@ -394,5 +394,5 @@ qcrypto_block_luks_from_disk_endian(QCryptoBlockLUKSHea= der *hdr) =20 /* - * Stores the main LUKS header, taking care of endianess + * Stores the main LUKS header, taking care of endianness */ static int @@ -424,5 +424,5 @@ qcrypto_block_luks_store_header(QCryptoBlock *block, =20 /* - * Loads the main LUKS header,and byteswaps it to native endianess + * Loads the main LUKS header,and byteswaps it to native endianness * And run basic sanity checks on it */ diff --git a/crypto/der.c b/crypto/der.c index dab3fe4f24..ebbecfc3fe 100644 --- a/crypto/der.c +++ b/crypto/der.c @@ -77,5 +77,5 @@ enum QCryptoDERTagEnc { * qcrypto_der_encode_length: * @src_len: the length of source data - * @dst: distination to save the encoded 'length', if dst is NULL, only co= mpute + * @dst: destination to save the encoded 'length', if dst is NULL, only co= mpute * the expected buffer size in bytes. * @dst_len: output parameter, indicates how many bytes wrote. diff --git a/crypto/der.h b/crypto/der.h index 0e895bbeec..f4ba6da28a 100644 --- a/crypto/der.h +++ b/crypto/der.h @@ -250,5 +250,5 @@ void qcrypto_der_encode_octet_str(QCryptoEncodeContext = *ctx, * qcrypto_der_encode_octet_str_begin and qcrypto_der_encode_octet_str_end * are encoded as an octet string. This is useful when we need to encode a - * encoded SEQUNCE as OCTET STRING. + * encoded SEQUENCE as OCTET STRING. */ void qcrypto_der_encode_octet_str_begin(QCryptoEncodeContext *ctx); @@ -261,5 +261,5 @@ void qcrypto_der_encode_octet_str_begin(QCryptoEncodeCo= ntext *ctx); * qcrypto_der_encode_octet_str_begin and qcrypto_der_encode_octet_str_end * are encoded as an octet string. This is useful when we need to encode a - * encoded SEQUNCE as OCTET STRING. + * encoded SEQUENCE as OCTET STRING. */ void qcrypto_der_encode_octet_str_end(QCryptoEncodeContext *ctx); @@ -276,5 +276,5 @@ size_t qcrypto_der_encode_ctx_buffer_len(QCryptoEncodeC= ontext *ctx); * qcrypto_der_encode_ctx_flush_and_free: * @ctx: the encode context. - * @dst: the distination to save the encoded data, the length of dst should + * @dst: the destination to save the encoded data, the length of dst should * not less than qcrypto_der_encode_cxt_buffer_len * diff --git a/linux-user/flatload.c b/linux-user/flatload.c index 8f5e9f489b..4331a11bf0 100644 --- a/linux-user/flatload.c +++ b/linux-user/flatload.c @@ -781,5 +781,5 @@ int load_flt_binary(struct linux_binprm *bprm, struct i= mage_info *info) for all current targets, and excess alignment is harmless. */ stack_len =3D bprm->envc + bprm->argc + 2; - stack_len +=3D flat_argvp_envp_on_stack() ? 2 : 0; /* arvg, argp */ + stack_len +=3D flat_argvp_envp_on_stack() ? 2 : 0; /* argv, argp */ stack_len +=3D 1; /* argc */ stack_len *=3D sizeof(abi_ulong); diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 9353268cc1..7ccd3affbe 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -1810,5 +1810,5 @@ static inline abi_long target_to_host_cmsg(struct msg= hdr *msgh, =20 memcpy(dst, target_data, len); - /* fix endianess of first 32-bit word */ + /* fix endianness of first 32-bit word */ if (len >=3D sizeof(uint32_t)) { *dst =3D tswap32(*dst); @@ -2921,5 +2921,5 @@ get_timeout: return ret; } - /* swap host endianess to target endianess. */ + /* swap host endianness to target endianness. */ for (i =3D 0; i < (len / sizeof(uint32_t)); i++) { results[i] =3D tswap32(results[i]); diff --git a/nbd/client-connection.c b/nbd/client-connection.c index 3d14296c04..258ef81ae9 100644 --- a/nbd/client-connection.c +++ b/nbd/client-connection.c @@ -198,5 +198,5 @@ static void *connect_thread_func(void *opaque) * pointers to our internally allocated strings, which are IN para= meters * of nbd_receive_negotiate() and therefore nbd_connect(). Caller - * shoudn't be interested in these fields. + * shouldn't be interested in these fields. */ conn->updated_info.x_dirty_bitmap =3D NULL; diff --git a/net/checksum.c b/net/checksum.c index 68245fd748..1a957e4c0b 100644 --- a/net/checksum.c +++ b/net/checksum.c @@ -75,5 +75,5 @@ void net_checksum_calculate(uint8_t *data, int length, in= t csum_flag) } =20 - /* Handle the optionnal VLAN headers */ + /* Handle the optional VLAN headers */ switch (lduw_be_p(&PKT_GET_ETH_HDR(data)->h_proto)) { case ETH_P_VLAN: @@ -97,5 +97,5 @@ void net_checksum_calculate(uint8_t *data, int length, in= t csum_flag) length -=3D mac_hdr_len; =20 - /* Now check we have an IP header (with an optionnal VLAN header) */ + /* Now check we have an IP header (with an optional VLAN header) */ if (length < sizeof(struct ip_header)) { return; diff --git a/net/filter.c b/net/filter.c index 3fe88fa43f..3b92e04af0 100644 --- a/net/filter.c +++ b/net/filter.c @@ -93,5 +93,5 @@ ssize_t qemu_netfilter_pass_to_next(NetClientState *sende= r, /* * if qemu_netfilter_pass_to_next been called, means that - * the packet has been hold by filter and has already retured size + * the packet has been hold by filter and has already returned size * to the sender, so sent_cb shouldn't be called later, just * pass NULL to next. @@ -107,5 +107,5 @@ ssize_t qemu_netfilter_pass_to_next(NetClientState *sen= der, /* * We have gone through all filters, pass it to receiver. - * Do the valid check again incase sender or receiver been + * Do the valid check again in case sender or receiver been * deleted while we go through filters. */ diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c index 9795306742..34202ca009 100644 --- a/net/vhost-vdpa.c +++ b/net/vhost-vdpa.c @@ -822,5 +822,5 @@ static int vhost_vdpa_net_load_rx(VhostVDPAState *s, * on by default. * - * Addtionally, according to VirtIO standard, "Since there are + * Additionally, according to VirtIO standard, "Since there are * no guarantees, it can use a hash filter or silently switch to * allmulti or promiscuous mode if it is given too many addresses.". @@ -1131,5 +1131,5 @@ static int vhost_vdpa_net_excessive_mac_filter_cvq_ad= d(VhostVDPAState *s, * * According to virtio_net_handle_mac(), QEMU doesn't verify the MAC - * addresses provieded in CVQ command. Therefore, only the entries + * addresses provided in CVQ command. Therefore, only the entries * field need to be prepared in the CVQ command. */ @@ -1142,5 +1142,5 @@ static int vhost_vdpa_net_excessive_mac_filter_cvq_ad= d(VhostVDPAState *s, * * According to virtio_net_handle_mac(), QEMU doesn't verify the MAC - * addresses provieded in CVQ command. Therefore, only the entries + * addresses provided in CVQ command. Therefore, only the entries * field need to be prepared in the CVQ command. */ @@ -1203,5 +1203,5 @@ static int vhost_vdpa_net_handle_ctrl_avail(VhostShad= owVirtqueue *svq, * * Therefore, QEMU must handle this situation instead of sending - * the CVQ command direclty. + * the CVQ command directly. */ dev_written =3D vhost_vdpa_net_excessive_mac_filter_cvq_add(s, ele= m, diff --git a/semihosting/config.c b/semihosting/config.c index 89a1759687..8ca569735d 100644 --- a/semihosting/config.c +++ b/semihosting/config.c @@ -9,5 +9,5 @@ * in target/HW/HW-semi.c * - * Semihosting is sightly strange in that it is also supported by some + * Semihosting is slightly strange in that it is also supported by some * linux-user targets. However in that use case no configuration of * the outputs and command lines is supported. diff --git a/semihosting/syscalls.c b/semihosting/syscalls.c index 68899ebb1c..d27574a1e2 100644 --- a/semihosting/syscalls.c +++ b/semihosting/syscalls.c @@ -721,5 +721,5 @@ void semihost_sys_read_gf(CPUState *cs, gdb_syscall_com= plete_cb complete, { /* - * Bound length for 64-bit guests on 32-bit hosts, not overlowing ssiz= e_t. + * Bound length for 64-bit guests on 32-bit hosts, not overflowing ssi= ze_t. * Note the Linux kernel does this with MAX_RW_COUNT, so it's not a bad * idea to do this unconditionally. @@ -762,5 +762,5 @@ void semihost_sys_write_gf(CPUState *cs, gdb_syscall_co= mplete_cb complete, { /* - * Bound length for 64-bit guests on 32-bit hosts, not overlowing ssiz= e_t. + * Bound length for 64-bit guests on 32-bit hosts, not overflowing ssi= ze_t. * Note the Linux kernel does this with MAX_RW_COUNT, so it's not a bad * idea to do this unconditionally. diff --git a/softmmu/icount.c b/softmmu/icount.c index a5cef9c60a..144e24829c 100644 --- a/softmmu/icount.c +++ b/softmmu/icount.c @@ -326,5 +326,5 @@ void icount_start_warp_timer(void) * It is probably a race condition: notification sent * to vCPU was processed in advance and vCPU went to sleep. - * Therefore we have to wake it up for doing someting. + * Therefore we have to wake it up for doing something. */ if (replay_has_event()) { diff --git a/softmmu/ioport.c b/softmmu/ioport.c index b66e0a5a8e..1824aa808c 100644 --- a/softmmu/ioport.c +++ b/softmmu/ioport.c @@ -23,5 +23,5 @@ */ /* - * splitted out ioport related stuffs from vl.c. + * split out ioport related stuffs from vl.c. */ =20 --=20 2.39.2