From nobody Tue May 7 20:33:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1616524361; cv=none; d=zohomail.com; s=zohoarc; b=cLsx5suzeqebho+6LgE80ZrL0a+FZjSru+yQgN4BUsOp93aXUVb1QmcR/baQbZ+cN3yK1lwnyZqy8VP9kD4dPlsFAl9kI5yCJsvKdGFr7Y9KduUCdNaX1cYkuDuJH6Am64DAkkfrt9sISI6HGRdw92fEoVrNbq3xgMNdCnp+l+s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1616524361; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=/mIojbFw62+qJPO3HxXwQHpN6XnpqNF+57JuIFrDcVo=; b=nb4ZZ7WR4iDZKNdNkkY5ipS9OXqsVibIEKugyqxh4Xu1XMoRbOBKSI//ELCoXZwXb2Ufe2Ale4i2UMpzlIh9CUNGDX70wJTEpH0vIXbfoQ31ddPjwCk38zLCwW44KS13LtvLL1Mqv+AtT97h53Cd/9vQVAmaE1ns0GBzDuI6CC4= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1616524361905304.0293843895455; Tue, 23 Mar 2021 11:32:41 -0700 (PDT) Received: from localhost ([::1]:34866 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lOlpY-0000Mr-Pb for importer@patchew.org; Tue, 23 Mar 2021 14:32:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39102) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOknp-000485-O4 for qemu-devel@nongnu.org; Tue, 23 Mar 2021 13:26:49 -0400 Received: from mga18.intel.com ([134.134.136.126]:35204) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOknn-0003iU-Fk for qemu-devel@nongnu.org; Tue, 23 Mar 2021 13:26:49 -0400 Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2021 10:26:37 -0700 Received: from ls.sc.intel.com (HELO localhost) ([143.183.96.54]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2021 10:26:36 -0700 IronPort-SDR: w/iOpTsF4qtBgwVwRb+aQzw5jaWsCVWM1314JaTSZumbhRclP4V1m/Hu/NOc7Cp4yVYyY8Mf/+ bx+KSeoDp09w== X-IronPort-AV: E=McAfee;i="6000,8403,9932"; a="178093237" X-IronPort-AV: E=Sophos;i="5.81,272,1610438400"; d="scan'208";a="178093237" IronPort-SDR: Pvlpk4uRKG75CcrVdQfYjX3DfhmwdQs/jpX+iRMRE+ryuDl5+qGz7adGTMYyODfrKQKnzTO+9G Y+zICt6QZTVQ== X-IronPort-AV: E=Sophos;i="5.81,272,1610438400"; d="scan'208";a="607801297" From: Isaku Yamahata To: qemu-devel@nongnu.org, mst@redhat.com, peter.maydell@linaro.org, imammedo@redhat.com, f4bug@amsat.org Subject: [PATCH v2 1/3] vt82c686.c: don't raise SCI when PCI_INTERRUPT_PIN isn't setup Date: Tue, 23 Mar 2021 10:24:29 -0700 Message-Id: <00c07067c1c8700bea48407cbec6d854e87de742.1616519655.git.isaku.yamahata@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=134.134.136.126; envelope-from=isaku.yamahata@intel.com; helo=mga18.intel.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: isaku.yamahata@intel.com, Peter Maydell , Huacai Chen , isaku.yamahata@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Without this patch, the following patch will triger clan runtime sanitizer warnings as follows. This patch proactively works around it. I let v582c686.c maintainer address a correct fix as I'm not sure about fuloong2e device model. > MALLOC_PERTURB_=3D${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))} > QTEST_QEMU_IMG=3D./qemu-img > G_TEST_DBUS_DAEMON=3D/home/petmay01/linaro/qemu-for-merges/tests/dbus-vms= tate-daemon.sh > QTEST_QEMU_BINARY=3D./qemu-system-mips64el tests/qtest/qom-test --tap -k > PASS 1 qtest-mips64el/qom-test /mips64el/qom/loongson3-virt > PASS 2 qtest-mips64el/qom-test /mips64el/qom/none > PASS 3 qtest-mips64el/qom-test /mips64el/qom/magnum > PASS 4 qtest-mips64el/qom-test /mips64el/qom/mipssim > PASS 5 qtest-mips64el/qom-test /mips64el/qom/malta > ../../hw/pci/pci.c:252:30: runtime error: shift exponent -1 is negative > PASS 6 qtest-mips64el/qom-test /mips64el/qom/fuloong2e > PASS 7 qtest-mips64el/qom-test /mips64el/qom/boston > PASS 8 qtest-mips64el/qom-test /mips64el/qom/pica61 > > and similarly for eg > > MALLOC_PERTURB_=3D${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))} > QTEST_QEMU_IMG=3D./qemu-img > G_TEST_DBUS_DAEMON=3D/home/petmay01/linaro/qemu-for-merges/tests/dbus-vms= tate-daemon.sh > QTEST_QEMU_BINARY=3D./qemu-system-mips64el tests/qtest/endianness-test > --tap -k > ../../hw/pci/pci.c:252:30: runtime error: shift exponent -1 is negative > PASS 1 qtest-mips64el/endianness-test /mips64el/endianness/fuloong2e > ../../hw/pci/pci.c:252:30: runtime error: shift exponent -1 is negative > PASS 2 qtest-mips64el/endianness-test /mips64el/endianness/split/fuloong2e > ../../hw/pci/pci.c:252:30: runtime error: shift exponent -1 is negative > PASS 3 qtest-mips64el/endianness-test /mips64el/endianness/combine/fuloon= g2e Cc: Huacai Chen Cc: "Philippe Mathieu-Daud=C3=A9" Cc: Jiaxun Yang Reported-by: Peter Maydell Signed-off-by: Isaku Yamahata --- hw/isa/vt82c686.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 05d084f698..f0fb309f12 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -144,7 +144,18 @@ static void pm_update_sci(ViaPMState *s) ACPI_BITMASK_POWER_BUTTON_ENABLE | ACPI_BITMASK_GLOBAL_LOCK_ENABLE | ACPI_BITMASK_TIMER_ENABLE)) !=3D 0); - pci_set_irq(&s->dev, sci_level); + if (pci_get_byte(s->dev.config + PCI_INTERRUPT_PIN)) { + /* + * FIXME: + * Fix device model that realizes this PM device and remove + * this work around. + * The device model should wire SCI and setup + * PCI_INTERRUPT_PIN properly. + * If PIN# =3D 0(interrupt pin isn't used), don't raise SCI as + * work around. + */ + pci_set_irq(&s->dev, sci_level); + } /* schedule a timer interruption if needed */ acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENAB= LE) && !(pmsts & ACPI_BITMASK_TIMER_STATUS)); --=20 2.25.1 From nobody Tue May 7 20:33:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1616524550; cv=none; d=zohomail.com; s=zohoarc; b=fDRFOqHGY03jVc1TXDNuEjeE2uJS5Uh/H3HjaCpmYOf3upGXi/mCal8pFDYeQWiUAIPzoWeanYEGqXxGV3MW31al3VmBAuexbpVYEnQPMSpEfwGsM/CWAI2QZlIIRtCct3QTocrcPE3Ob3y8M8nXpVUm/zQp494P6dbXGKYGxyM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1616524550; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=BiO/FQN7wMygzhlFooJTJdBSMXgZCrQVlDh3ZewXfSs=; b=OCIdsvzwM2QHf2ciJQaMs7In+Xbnm9EKWotm8v9ESuark8p/WJgtiQ4hjfdZ2kTV1YEp0MMWYLV6cJHcvQRvA+NCK0WgQimV9Q1jC6h6KxKmxn3/wz4OoDG78JATh/A8cFY4ToaX2Z1LKjUdAp6iZc5huqWLrQnjrvBI8Mw/9/w= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1616524550325820.1350818247764; Tue, 23 Mar 2021 11:35:50 -0700 (PDT) Received: from localhost ([::1]:39462 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lOlsb-0003eg-79 for importer@patchew.org; Tue, 23 Mar 2021 14:35:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39062) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOknn-0003zd-4t for qemu-devel@nongnu.org; Tue, 23 Mar 2021 13:26:47 -0400 Received: from mga18.intel.com ([134.134.136.126]:35204) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOknj-0003iU-5s for qemu-devel@nongnu.org; Tue, 23 Mar 2021 13:26:46 -0400 Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2021 10:26:37 -0700 Received: from ls.sc.intel.com (HELO localhost) ([143.183.96.54]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2021 10:26:36 -0700 IronPort-SDR: fnbVuUPnNVF/GwZN+crrh/03EC/bfP/68lAxH0QtX2ceXBlQluCMFV2vGhihOGkjMNdHhi04uU HvBBEm+JL/cw== X-IronPort-AV: E=McAfee;i="6000,8403,9932"; a="178093239" X-IronPort-AV: E=Sophos;i="5.81,272,1610438400"; d="scan'208";a="178093239" IronPort-SDR: cVigCD4kPpFTawqv0u25jxC0q38KtY6+lh/2aFf3oB8Q06hdfTPJx96E8niVZafbR4MtZbwB+h sxKQ9k3Hx+Xg== X-IronPort-AV: E=Sophos;i="5.81,272,1610438400"; d="scan'208";a="607801300" From: Isaku Yamahata To: qemu-devel@nongnu.org, mst@redhat.com, peter.maydell@linaro.org, imammedo@redhat.com, f4bug@amsat.org Subject: [PATCH v2 2/3] pci: sprinkle assert in PCI pin number Date: Tue, 23 Mar 2021 10:24:30 -0700 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=134.134.136.126; envelope-from=isaku.yamahata@intel.com; helo=mga18.intel.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: isaku.yamahata@intel.com, Peter Maydell , isaku.yamahata@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" If a device model (a) doesn't set the value to a correct interrupt number and then (b) triggers an interrupt for itself, it's device model bug. Add assert on interrupt pin number to catch this kind of bug more obviously. Suggested-by: Peter Maydell Signed-off-by: Isaku Yamahata --- hw/pci/pci.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index ac9a24889c..cb6bab999b 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -1450,6 +1450,8 @@ static void pci_irq_handler(void *opaque, int irq_num= , int level) PCIDevice *pci_dev =3D opaque; int change; =20 + assert(0 <=3D irq_num && irq_num < PCI_NUM_PINS); + assert(level =3D=3D 0 || level =3D=3D 1); change =3D level - pci_irq_state(pci_dev, irq_num); if (!change) return; @@ -1463,7 +1465,13 @@ static void pci_irq_handler(void *opaque, int irq_nu= m, int level) =20 static inline int pci_intx(PCIDevice *pci_dev) { - return pci_get_byte(pci_dev->config + PCI_INTERRUPT_PIN) - 1; + int intx =3D pci_get_byte(pci_dev->config + PCI_INTERRUPT_PIN) - 1; + /* + * This function is used to setup/trigger irq. + * So PIN =3D 0 (interrupt isn't used) doesn't make sense. + */ + assert(0 <=3D intx && intx < PCI_NUM_PINS); + return intx; } =20 qemu_irq pci_allocate_irq(PCIDevice *pci_dev) --=20 2.25.1 From nobody Tue May 7 20:33:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1616524687; cv=none; d=zohomail.com; s=zohoarc; b=fVaHL0LbteanrwJOGoeeHnTJGF8mIlL6uYLQ/WHrfQMxTu9ksaaDiER6IZ2SM4nrNcM+DTTwd9H+bHGY8091/Xbl0PrwRHCvcgO6NaqcjcQrp1jm4zo859HTNCI+BQ/gfsTV4bnZFB9SO9kztvUcDFoarGDf/dfLcoZNbb60O7U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1616524687; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=NtmCp5Z7ZMHOWiB4yzC79z06nHSp+oPC0RDjKDWwqnk=; b=hyP0PcRjUIc3JU7/32amknpYl1/IswcZB0aaibMv+Xmdj+JAGqF5rEwVbRVBq/EaAZEjtvqvzh1tCWVdHo4uvhkktntOAGdezybjxmVgha5FAV+FtJQUtoy8sf6UOVMPGXxWRYIR36eGzMHlVoJPgXq3M7B1KwXv9N6m/uDxlbo= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1616524687759917.4543068066945; Tue, 23 Mar 2021 11:38:07 -0700 (PDT) Received: from localhost ([::1]:45700 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lOluo-00085A-Jb for importer@patchew.org; Tue, 23 Mar 2021 14:38:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39106) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOknq-0004A6-Br for qemu-devel@nongnu.org; Tue, 23 Mar 2021 13:26:50 -0400 Received: from mga18.intel.com ([134.134.136.126]:35217) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOkno-0003rR-8g for qemu-devel@nongnu.org; Tue, 23 Mar 2021 13:26:50 -0400 Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2021 10:26:37 -0700 Received: from ls.sc.intel.com (HELO localhost) ([143.183.96.54]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2021 10:26:36 -0700 IronPort-SDR: 2hjemtWXhjWqBP6jXUb0AVmMj3b+FJ1w0KFKfYGKk/vKEsjMsfRfNyLTcTJwY1tXPCzlNydbZw NA3r8rl8jaQQ== X-IronPort-AV: E=McAfee;i="6000,8403,9932"; a="178093240" X-IronPort-AV: E=Sophos;i="5.81,272,1610438400"; d="scan'208";a="178093240" IronPort-SDR: 9FkQ8kErq6Av0556RLo+I5VUGy2zLvxkb444DPqJnfUVRX9R94VENLLVNqUNxUlebWBvEB2ODS h258TkYD2i/Q== X-IronPort-AV: E=Sophos;i="5.81,272,1610438400"; d="scan'208";a="607801303" From: Isaku Yamahata To: qemu-devel@nongnu.org, mst@redhat.com, peter.maydell@linaro.org, imammedo@redhat.com, f4bug@amsat.org Subject: [PATCH v2 3/3] acpi:piix4, vt82c686: reinitialize acpi PM device on reset Date: Tue, 23 Mar 2021 10:24:31 -0700 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=134.134.136.126; envelope-from=isaku.yamahata@intel.com; helo=mga18.intel.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: isaku.yamahata@intel.com, berrange@redhat.com, Reinoud Zandijk , isaku.yamahata@gmail.com, pbonzini@redhat.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Commit 6be8cf56bc8b made sure that SCI is enabled in PM1.CNT on reset in acpi_only mode by modifying acpi_pm1_cnt_reset() and that worked for q35 as expected. The function was introduced by commit eaba51c573a (acpi, acpi_piix, vt82c686: factor out PM1_CNT logic) that forgot to actually call it at piix4 reset time and as result SCI_EN wasn't set as was expected by 6be8cf56bc8b in acpi_only mode. So Windows crashes when it notices that SCI_EN is not set and FADT is not providing information about how to enable it anymore. Reproducer: qemu-system-x86_64 -enable-kvm -M pc-i440fx-6.0,smm=3Doff -cdrom any_win= dows_10x64.iso Fix it by calling acpi_pm1_cnt_reset() at piix4 reset time. Occasionally this patch adds reset acpi PM related registers on piix4/vt582c686 reset time and de-assert sci. piix4_pm_realize() initializes acpi pm tmr, evt, cnt and gpe. via_pm_realize() initializes acpi pm tmr, evt and cnt. reset them on device reset. pm_reset() in ich9.c correctly calls corresponding reset functions. Fixes: 6be8cf56bc8b (acpi/core: always set SCI_EN when SMM isn't supported) Reported-by: Reinoud Zandijk Co-developed-by: Igor Mammedov Signed-off-by: Igor Mammedov Signed-off-by: Isaku Yamahata --- CC: imammedo@redhat.com CC: isaku.yamahata@intel.com CC: mst@redhat.com CC: reinoud@NetBSD.org CC: isaku.yamahata@gmail.com CC: berrange@redhat.com CC: pbonzini@redhat.com CC: f4bug@amsat.org CC: aurelien@aurel32.net --- hw/acpi/piix4.c | 7 +++++++ hw/isa/vt82c686.c | 5 +++++ 2 files changed, 12 insertions(+) diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 6056d51667..8f8b0e95e5 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -326,6 +326,13 @@ static void piix4_pm_reset(DeviceState *dev) /* Mark SMM as already inited (until KVM supports SMM). */ pci_conf[0x5B] =3D 0x02; } + + acpi_pm1_evt_reset(&s->ar); + acpi_pm1_cnt_reset(&s->ar); + acpi_pm_tmr_reset(&s->ar); + acpi_gpe_reset(&s->ar); + acpi_update_sci(&s->ar, s->irq); + pm_io_space_update(s); acpi_pcihp_reset(&s->acpi_pci_hotplug, !s->use_acpi_root_pci_hotplug); } diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index f0fb309f12..98325bb32b 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -178,6 +178,11 @@ static void via_pm_reset(DeviceState *d) /* SMBus IO base */ pci_set_long(s->dev.config + 0x90, 1); =20 + acpi_pm1_evt_reset(&s->ar); + acpi_pm1_cnt_reset(&s->ar); + acpi_pm_tmr_reset(&s->ar); + pm_update_sci(s); + pm_io_space_update(s); smb_io_space_update(s); } --=20 2.25.1