From nobody Sat Feb 7 17:04:43 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1609802753; cv=none; d=zohomail.com; s=zohoarc; b=KgMYvcfOhJsADLlBk2yszqd0d95MTdqg5wc0+ckdr2j8h6xw8FcuIvYxQVGO3aErfeF3tVWq3nRVBD8jLWHsPkiNrBBALch5RGlA1qYegx0PJz/MnWsG76tMW3s6faE7wqbq67EeSXkLr8U9vH30/78C1Mwrxz22yW/FYnbka1M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1609802753; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=4PdeBlvNfS3L6h0bHqSfZkTHfHTqZqQfUOocn58qfZ8=; b=EitRHP3bfEided7Kdkqjs3BEiZwABccCbZ2vK9kLG3jTr4ITRgPksLAfGK2apBrOKtYJKF96nF/XVZQH9xSHqy+XdDVby8TR/mmlp4TDgjbC2E28vv62oIK0x8j9vqOX84/nCbGQcQnRHcaSXUR2CoCizs4upxoVcd3LBaGrWBo= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1609802753251274.42155163230564; Mon, 4 Jan 2021 15:25:53 -0800 (PST) Received: from localhost ([::1]:36222 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kwZEW-0007n3-40 for importer@patchew.org; Mon, 04 Jan 2021 18:25:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:35614) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kwZCA-00065p-MZ; Mon, 04 Jan 2021 18:23:26 -0500 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:55660) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kwZC7-0007yl-PB; Mon, 04 Jan 2021 18:23:25 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 95DE57470EE; Tue, 5 Jan 2021 00:23:20 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 116DF7470E0; Tue, 5 Jan 2021 00:23:20 +0100 (CET) Message-Id: <49fd899c9767a5ed08905b7bbb2b19d0531cf7ec.1609802040.git.balaton@eik.bme.hu> In-Reply-To: References: Subject: [PATCH v4 1/4] ppc440_pcix: Improve comment for IRQ mapping Date: Tue, 05 Jan 2021 00:14:00 +0100 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , f4bug@amsat.org, Guenter Roeck , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Reply-to: BALATON Zoltan From: BALATON Zoltan via Content-Type: text/plain; charset="utf-8" The code mapping all PCI interrupts to a single CPU IRQ works but is not trivial so document it in a comment. Signed-off-by: BALATON Zoltan Reviewed-by: Peter Maydell --- hw/ppc/ppc440_pcix.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c index ee952314c8..eb1290ffc8 100644 --- a/hw/ppc/ppc440_pcix.c +++ b/hw/ppc/ppc440_pcix.c @@ -415,8 +415,15 @@ static void ppc440_pcix_reset(DeviceState *dev) s->sts =3D 0; } =20 -/* All pins from each slot are tied to a single board IRQ. - * This may need further refactoring for other boards. */ +/* + * All four IRQ[ABCD] pins from all slots are tied to a single board + * IRQ, so our mapping function here maps everything to IRQ 0. + * The code in pci_change_irq_level() tracks the number of times + * the mapped IRQ is asserted and deasserted, so if multiple devices + * assert an IRQ at the same time the behaviour is correct. + * + * This may need further refactoring for boards that use multiple IRQ line= s. + */ static int ppc440_pcix_map_irq(PCIDevice *pci_dev, int irq_num) { trace_ppc440_pcix_map_irq(pci_dev->devfn, irq_num, 0); --=20 2.21.3 From nobody Sat Feb 7 17:04:43 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1609802801; cv=none; d=zohomail.com; s=zohoarc; b=iDOWmBkIx0lZII55dliLiP1QBvCu9CTCZ7/5zro85NjuZGxBeJSgE6JmgaoopynULxjDSUB+9Q2KHs0xqEZPrsta43I+HiL0klbE93hl9YvCw5nlY4kpAoPp9HTRJERBj5jYIhSvIyMFZc03Q5lfU6CvqHJFiU0IjFP7yXTzY18= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1609802801; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=4metjRPDqIOumImsM8cncjxKtxNKbQ4I7G1B5OvXlgE=; b=no5KtMf95Vy8DRq3GsJzjGN4XsscmfgCPGYMlG1DtEcigPHi4TUiAR4BeT0gKO9k456Xqrskk5XLZqrQu3o2aIxeXhxDM8/gq9CBRDGt6IUtn5XOj2RrZPESYn25BqEI45z0crMatbxXjthDQ9xyS7YRokMKz23aLlklBR20ohw= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1609802801371394.8963801505015; Mon, 4 Jan 2021 15:26:41 -0800 (PST) Received: from localhost ([::1]:38516 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kwZFH-0000OV-VR for importer@patchew.org; Mon, 04 Jan 2021 18:26:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:35640) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kwZCB-00066E-35; Mon, 04 Jan 2021 18:23:28 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]:55658) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kwZC7-0007yk-PE; Mon, 04 Jan 2021 18:23:26 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 9BA387470EF; Tue, 5 Jan 2021 00:23:20 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 176DA7470E6; Tue, 5 Jan 2021 00:23:20 +0100 (CET) Message-Id: <783ab6ddf9920774805db48bdbf0cc4acff6af79.1609802040.git.balaton@eik.bme.hu> In-Reply-To: References: Subject: [PATCH v4 2/4] ppc440_pcix: Fix register write trace event Date: Tue, 05 Jan 2021 00:14:00 +0100 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , f4bug@amsat.org, Guenter Roeck , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Reply-to: BALATON Zoltan From: BALATON Zoltan via The trace event for pci_host_config_write() was also using the trace event for read. Add corresponding trace and correct this. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/ppc/ppc440_pcix.c | 2 +- hw/ppc/trace-events | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c index eb1290ffc8..7829d3e556 100644 --- a/hw/ppc/ppc440_pcix.c +++ b/hw/ppc/ppc440_pcix.c @@ -169,7 +169,7 @@ static void ppc440_pcix_reg_write4(void *opaque, hwaddr= addr, { struct PPC440PCIXState *s =3D opaque; =20 - trace_ppc440_pcix_reg_read(addr, val); + trace_ppc440_pcix_reg_write(addr, val, size); switch (addr) { case PCI_VENDOR_ID ... PCI_MAX_LAT: stl_le_p(s->dev->config + addr, val); diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events index ed05f2fc9a..017c48624f 100644 --- a/hw/ppc/trace-events +++ b/hw/ppc/trace-events @@ -117,3 +117,4 @@ ppc440_pcix_set_irq(int irq_num) "PCI irq %d" ppc440_pcix_update_pim(int idx, uint64_t size, uint64_t la) "Added window = %d of size=3D0x%" PRIx64 " to CPU=3D0x%" PRIx64 ppc440_pcix_update_pom(int idx, uint32_t size, uint64_t la, uint64_t pcia)= "Added window %d of size=3D0x%x from CPU=3D0x%" PRIx64 " to PCI=3D0x%" PRI= x64 ppc440_pcix_reg_read(uint64_t addr, uint32_t val) "addr 0x%" PRIx64 " =3D = 0x%" PRIx32 +ppc440_pcix_reg_write(uint64_t addr, uint32_t val, uint32_t size) "addr 0x= %" PRIx64 " =3D 0x%" PRIx32 " size 0x%" PRIx32 --=20 2.21.3 From nobody Sat Feb 7 17:04:43 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1609802941; cv=none; d=zohomail.com; s=zohoarc; b=JSVDNfFMvWvUgOX3KEqx9/Qxh4C1MO7JCp5wTg06CwmFDZ7qFBk2rbYmw+2ayDT21stWjpTlnSXldDBuBZ2Em4/w6QnYF6eareIsZok3T9QY0m1IgRD82TTOwobJ0BWhF76EDWzBR/2GapZc9HBG/Spawvd114N0zdLG3BeU1Y8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1609802941; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=dtQl/uR/XcD3BamnsDKg6RLLHpaA3zE9C784JyGp6bc=; b=C5TdIQ3FlYj9X8J9+WL6bIY7aA2waEOjtd0vacv/020aGr+Zc5+96uegsm6m84yPey9QEnU/xMqsbZ4orf4XoO0GBTo2y4jw65w245AXDBeq5+RMSCYjaxm9tp+WwU2urjsGDNkq8rzVuaQX50XM0YuCgtnw6bUywDjGqh1XbSU= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1609802941718723.0643384669758; Mon, 4 Jan 2021 15:29:01 -0800 (PST) Received: from localhost ([::1]:43848 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kwZHY-0002Yk-Jg for importer@patchew.org; Mon, 04 Jan 2021 18:29:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:35644) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kwZCC-00066I-8f; Mon, 04 Jan 2021 18:23:28 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]:55669) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kwZC7-0007ym-P4; Mon, 04 Jan 2021 18:23:28 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id A4D7B7470F0; Tue, 5 Jan 2021 00:23:20 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 1C6257470DF; Tue, 5 Jan 2021 00:23:20 +0100 (CET) Message-Id: <6a97eaad3faf7fe5c998f6e8953f6b851cf8757e.1609802040.git.balaton@eik.bme.hu> In-Reply-To: References: Subject: [PATCH v4 3/4] ppc440_pcix: Fix up pci config access Date: Tue, 05 Jan 2021 00:14:00 +0100 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , f4bug@amsat.org, Guenter Roeck , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Reply-to: BALATON Zoltan From: BALATON Zoltan via Content-Type: text/plain; charset="utf-8" This fixes a long standing issue with MorphOS booting on sam460ex which turns out to be because of suspicious values written to PCI config address that apparently works on real machine but caused wrong access on this device model. This replaces a previous work around for this with a better fix that makes it work. Signed-off-by: BALATON Zoltan --- hw/ppc/ppc440_pcix.c | 37 ++++++++++++++++++++++--------------- 1 file changed, 22 insertions(+), 15 deletions(-) diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c index 7829d3e556..91cbcd0504 100644 --- a/hw/ppc/ppc440_pcix.c +++ b/hw/ppc/ppc440_pcix.c @@ -449,28 +449,35 @@ static AddressSpace *ppc440_pcix_set_iommu(PCIBus *b,= void *opaque, int devfn) return &s->bm_as; } =20 -/* The default pci_host_data_{read,write} functions in pci/pci_host.c - * deny access to registers without bit 31 set but our clients want - * this to work so we have to override these here */ -static void pci_host_data_write(void *opaque, hwaddr addr, - uint64_t val, unsigned len) +/* + * Some guests on sam460ex write all kinds of garbage here such as + * missing enable bit and low bits set and still expect this to work + * (apparently it does on real hardware because these boot there) so + * we have to override these ops here and fix it up + */ +static void pci_host_config_write(void *opaque, hwaddr addr, + uint64_t val, unsigned len) { PCIHostState *s =3D opaque; - pci_data_write(s->bus, s->config_reg | (addr & 3), val, len); + + if (addr !=3D 0 || len !=3D 4) { + return; + } + s->config_reg =3D (val & 0xfffffffcULL) | (1UL << 31); } =20 -static uint64_t pci_host_data_read(void *opaque, - hwaddr addr, unsigned len) +static uint64_t pci_host_config_read(void *opaque, hwaddr addr, + unsigned len) { PCIHostState *s =3D opaque; - uint32_t val; - val =3D pci_data_read(s->bus, s->config_reg | (addr & 3), len); + uint32_t val =3D s->config_reg; + return val; } =20 -const MemoryRegionOps ppc440_pcix_host_data_ops =3D { - .read =3D pci_host_data_read, - .write =3D pci_host_data_write, +const MemoryRegionOps ppc440_pcix_host_conf_ops =3D { + .read =3D pci_host_config_read, + .write =3D pci_host_config_write, .endianness =3D DEVICE_LITTLE_ENDIAN, }; =20 @@ -497,9 +504,9 @@ static void ppc440_pcix_realize(DeviceState *dev, Error= **errp) pci_setup_iommu(h->bus, ppc440_pcix_set_iommu, s); =20 memory_region_init(&s->container, OBJECT(s), "pci-container", PCI_ALL_= SIZE); - memory_region_init_io(&h->conf_mem, OBJECT(s), &pci_host_conf_le_ops, + memory_region_init_io(&h->conf_mem, OBJECT(s), &ppc440_pcix_host_conf_= ops, h, "pci-conf-idx", 4); - memory_region_init_io(&h->data_mem, OBJECT(s), &ppc440_pcix_host_data_= ops, + memory_region_init_io(&h->data_mem, OBJECT(s), &pci_host_data_le_ops, h, "pci-conf-data", 4); memory_region_init_io(&s->iomem, OBJECT(s), &pci_reg_ops, s, "pci.reg", PPC440_REG_SIZE); --=20 2.21.3 From nobody Sat Feb 7 17:04:43 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1609802941; cv=none; d=zohomail.com; s=zohoarc; b=Kle+NvUYaGszRHiE3uLr+q0ISxkxOIjagsd7tvQ0DH4yTRs0YxKfx8xEvF+kez6j0Xuvjn3BQDXzW1/UYKKPfMhvE8768XxLCLP2NPlt3/X4XG2Ee/zisBO2ea3AidNGA2EtpjBMkYen/wGJytBeD1ckqApbhvK14fUki13EyZ4= ARC-Message-Signature: i=1; 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Mon, 04 Jan 2021 18:29:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:35646) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kwZCD-00067N-Hf; Mon, 04 Jan 2021 18:23:34 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]:55654) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kwZC7-0007yj-PY; Mon, 04 Jan 2021 18:23:29 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 6DA8A7470E8; Tue, 5 Jan 2021 00:23:20 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 21EBA7470E2; Tue, 5 Jan 2021 00:23:20 +0100 (CET) Message-Id: <10c86eeab2090f81cdccb1f2197287ba4d799319.1609802040.git.balaton@eik.bme.hu> In-Reply-To: References: Subject: [PATCH v4 4/4] sam460ex: Use type cast macro instead of simple cast Date: Tue, 05 Jan 2021 00:14:00 +0100 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , f4bug@amsat.org, Guenter Roeck , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Reply-to: BALATON Zoltan From: BALATON Zoltan via Content-Type: text/plain; charset="utf-8" Use the PCI_BUS type cast macro to convert result of qdev_get_child_bus(). Also remove the check for NULL afterwards which should not be needed because sysbus_create_simple() uses error_abort and PCI_BUS macro also checks its argument by default so this shouldn't fail here. Signed-off-by: BALATON Zoltan --- hw/ppc/sam460ex.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index 14e6583eb0..cc67e9c39b 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -384,11 +384,8 @@ static void sam460ex_init(MachineState *machine) ppc460ex_pcie_init(env); /* All PCI irqs are connected to the same UIC pin (cf. UBoot source) */ dev =3D sysbus_create_simple("ppc440-pcix-host", 0xc0ec00000, uic[1][0= ]); - pci_bus =3D (PCIBus *)qdev_get_child_bus(dev, "pci.0"); - if (!pci_bus) { - error_report("couldn't create PCI controller!"); - exit(1); - } + pci_bus =3D PCI_BUS(qdev_get_child_bus(dev, "pci.0")); + memory_region_init_alias(isa, NULL, "isa_mmio", get_system_io(), 0, 0x10000); memory_region_add_subregion(get_system_memory(), 0xc08000000, isa); --=20 2.21.3