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charset="utf-8" After a claim or a priority change we need to update the pending interrupts. This is based on the same patch for the SiFive PLIC: 55765822804f5a58594e "riscv: plic: Add a couple of mising sifive_plic_update calls" Signed-off-by: Alistair Francis Cc: Jessica Clarke Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/intc/ibex_plic.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/intc/ibex_plic.c b/hw/intc/ibex_plic.c index 41079518c6..578edd2ce0 100644 --- a/hw/intc/ibex_plic.c +++ b/hw/intc/ibex_plic.c @@ -121,6 +121,9 @@ static uint64_t ibex_plic_read(void *opaque, hwaddr add= r, s->pending[pending_num] &=3D ~(1 << (s->claim % 32)); =20 ret =3D s->claim; + + /* Update the interrupt status after the claim */ + ibex_plic_update(s); } =20 return ret; @@ -140,6 +143,7 @@ static void ibex_plic_write(void *opaque, hwaddr addr, } else if (addr_between(addr, s->priority_base, s->priority_num)) { uint32_t irq =3D ((addr - s->priority_base) >> 2) + 1; s->priority[irq] =3D value & 7; + ibex_plic_update(s); } else if (addr_between(addr, s->enable_base, s->enable_num)) { uint32_t enable_reg =3D (addr - s->enable_base) / 4; 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charset="utf-8" Once an interrupt has been claimed, but before it has been compelted we shouldn't receive any more pending interrupts. This patche keeps track of this to ensure that we don't see any more interrupts until it is completed. Signed-off-by: Alistair Francis --- include/hw/intc/ibex_plic.h | 1 + hw/intc/ibex_plic.c | 17 +++++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/include/hw/intc/ibex_plic.h b/include/hw/intc/ibex_plic.h index ddc7909903..d8eb09b258 100644 --- a/include/hw/intc/ibex_plic.h +++ b/include/hw/intc/ibex_plic.h @@ -33,6 +33,7 @@ typedef struct IbexPlicState { MemoryRegion mmio; =20 uint32_t *pending; + uint32_t *claimed; uint32_t *source; uint32_t *priority; uint32_t *enable; diff --git a/hw/intc/ibex_plic.c b/hw/intc/ibex_plic.c index 578edd2ce0..669247ef08 100644 --- a/hw/intc/ibex_plic.c +++ b/hw/intc/ibex_plic.c @@ -43,6 +43,14 @@ static void ibex_plic_irqs_set_pending(IbexPlicState *s,= int irq, bool level) { int pending_num =3D irq / 32; =20 + if (s->claimed[pending_num] & 1 << (irq % 32)) { + /* + * The interrupt has been claimed, but not compelted. + * The pending bit can't be set. + */ + return; + } + s->pending[pending_num] |=3D level << (irq % 32); } =20 @@ -120,6 +128,10 @@ static uint64_t ibex_plic_read(void *opaque, hwaddr ad= dr, int pending_num =3D s->claim / 32; s->pending[pending_num] &=3D ~(1 << (s->claim % 32)); =20 + /* Set the interrupt as claimed, but not compelted */ + s->claimed[pending_num] |=3D 1 << (s->claim % 32); + + /* Return the current claimed interrupt */ ret =3D s->claim; =20 /* Update the interrupt status after the claim */ @@ -155,6 +167,10 @@ static void ibex_plic_write(void *opaque, hwaddr addr, /* Interrupt was completed */ s->claim =3D 0; } + if (s->claimed[value / 32] & 1 << (value % 32)) { + /* This value was already claimed, clear it. */ + s->claimed[value / 32] &=3D ~(1 << (value % 32)); + } } =20 ibex_plic_update(s); @@ -215,6 +231,7 @@ static void ibex_plic_realize(DeviceState *dev, Error *= *errp) int i; =20 s->pending =3D g_new0(uint32_t, s->pending_num); + s->claimed =3D g_new0(uint32_t, s->pending_num); s->source =3D g_new0(uint32_t, s->source_num); s->priority =3D g_new0(uint32_t, s->priority_num); s->enable =3D g_new0(uint32_t, s->enable_num); --=20 2.27.0 From nobody Sat Nov 15 16:07:36 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" This patch follows what commit aa4d30f6618dc "riscv: plic: Honour source priorities" does and ensures that the highest priority interrupt will be serviced first. Signed-off-by: Alistair Francis Cc: Jessica Clarke Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/intc/ibex_plic.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/hw/intc/ibex_plic.c b/hw/intc/ibex_plic.c index 669247ef08..f49fa67c91 100644 --- a/hw/intc/ibex_plic.c +++ b/hw/intc/ibex_plic.c @@ -57,6 +57,8 @@ static void ibex_plic_irqs_set_pending(IbexPlicState *s, = int irq, bool level) static bool ibex_plic_irqs_pending(IbexPlicState *s, uint32_t context) { int i; + uint32_t max_irq =3D 0; + uint32_t max_prio =3D s->threshold; =20 for (i =3D 0; i < s->pending_num; i++) { uint32_t irq_num =3D ctz64(s->pending[i]) + (i * 32); @@ -66,14 +68,17 @@ static bool ibex_plic_irqs_pending(IbexPlicState *s, ui= nt32_t context) continue; } =20 - if (s->priority[irq_num] > s->threshold) { - if (!s->claim) { - s->claim =3D irq_num; - } - return true; + if (s->priority[irq_num] > max_prio) { + max_irq =3D irq_num; + max_prio =3D s->priority[irq_num]; } } =20 + if (max_irq) { + s->claim =3D max_irq; + return true; + } + return false; } =20 --=20 2.27.0