From nobody Thu May 16 09:27:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1583783552; cv=none; d=zohomail.com; s=zohoarc; b=Ez+e7piVppmE9b6OCno+fvxarV9lNb3xQ4ka6eKLAoBiRJJ//ZcbMj1d0Wm3EgN91t0ld0awR3prAn0zATGFhTaeRsbYffLfllXNiAH3FoKdn/kno9gARMYhCPC3XBb32XTKec/pIeS7NayEspPBpAu9jhURlDsO3M8hF2Wwi34= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1583783552; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=Z0ZOM4yhUULwwHvjEWEnoAGW1LU5hs5spDCdAoLBvp0=; b=j3l68TyXvAG/1qG0pIQ7BEuAss8Wo3Dx/IZvDpL0+czePDU5HDmHxieUP0tSzNZ9GV+SJJ9vvNcu5zF0mtPFAR+HfYSAN2FLqZnqqzExuZ6vPh9Z0HxuCI0XIw9V21VRU4R27z1AF79QzE1tzud1ReE1uBpmZqvWjhcO5PkVM14= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1583783552395566.3885748699157; Mon, 9 Mar 2020 12:52:32 -0700 (PDT) Received: from localhost ([::1]:48922 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jBORz-00074G-8Z for importer@patchew.org; Mon, 09 Mar 2020 15:52:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54675) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jBONn-0007FE-DM for qemu-devel@nongnu.org; Mon, 09 Mar 2020 15:48:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jBONm-0000r5-3w for qemu-devel@nongnu.org; Mon, 09 Mar 2020 15:48:11 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:20820) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1jBONh-0000jp-Ux; Mon, 09 Mar 2020 15:48:06 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 9E870747DFA; Mon, 9 Mar 2020 20:48:02 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 7821D747DFE; Mon, 9 Mar 2020 20:48:02 +0100 (CET) Message-Id: <48e77c282cdc70914122f771497242e1c6e77760.1583781493.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v3 1/3] ide: Make room for flags in PCIIDEState and add one for legacy IRQ routing Date: Mon, 09 Mar 2020 20:18:13 +0100 To: qemu-devel@nongnu.org, qemu-block@nongnu.org X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:738:2001:2001::2001 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: John Snow , Mark Cave-Ayland , Aleksandar Markovic , philmd@redhat.com, Artyom Tarasenko , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" We'll need a flag for implementing some device specific behaviour in via-ide but we already have a currently CMD646 specific field that can be repurposed for this and leave room for furhter flags if needed in the future. This patch changes the "secondary" field to "flags" and define the flags for CMD646 and via-ide and change CMD646 and its users accordingly. Signed-off-by: BALATON Zoltan --- hw/alpha/dp264.c | 2 +- hw/ide/cmd646.c | 12 ++++++------ hw/sparc64/sun4u.c | 9 ++------- include/hw/ide.h | 4 ++-- include/hw/ide/pci.h | 7 ++++++- 5 files changed, 17 insertions(+), 17 deletions(-) diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index e5350a287f..f104e5dfa4 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -103,7 +103,7 @@ static void clipper_init(MachineState *machine) DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; ide_drive_get(hd, ARRAY_SIZE(hd)); =20 - pci_cmd646_ide_init(pci_bus, hd, 0); + pci_cmd646_ide_init(pci_bus, hd, -1, false); } =20 /* Load PALcode. Given that this is not "real" cpu palcode, diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c index 335c060673..0be650791f 100644 --- a/hw/ide/cmd646.c +++ b/hw/ide/cmd646.c @@ -256,7 +256,7 @@ static void pci_cmd646_ide_realize(PCIDevice *dev, Erro= r **errp) pci_conf[PCI_CLASS_PROG] =3D 0x8f; =20 pci_conf[CNTRL] =3D CNTRL_EN_CH0; // enable IDE0 - if (d->secondary) { + if (d->flags & BIT(PCI_IDE_SECONDARY)) { /* XXX: if not enabled, really disable the seconday IDE controller= */ pci_conf[CNTRL] |=3D CNTRL_EN_CH1; /* enable IDE1 */ } @@ -317,20 +317,20 @@ static void pci_cmd646_ide_exitfn(PCIDevice *dev) } } =20 -void pci_cmd646_ide_init(PCIBus *bus, DriveInfo **hd_table, - int secondary_ide_enabled) +void pci_cmd646_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn, + bool secondary_ide_enabled) { PCIDevice *dev; =20 - dev =3D pci_create(bus, -1, "cmd646-ide"); - qdev_prop_set_uint32(&dev->qdev, "secondary", secondary_ide_enabled); + dev =3D pci_create(bus, devfn, "cmd646-ide"); + qdev_prop_set_bit(&dev->qdev, "secondary", secondary_ide_enabled); qdev_init_nofail(&dev->qdev); =20 pci_ide_create_devs(dev, hd_table); } =20 static Property cmd646_ide_properties[] =3D { - DEFINE_PROP_UINT32("secondary", PCIIDEState, secondary, 0), + DEFINE_PROP_BIT("secondary", PCIIDEState, flags, PCI_IDE_SECONDARY, fa= lse), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index d33e84f831..fbe6790847 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -50,8 +50,7 @@ #include "hw/sparc/sparc64.h" #include "hw/nvram/fw_cfg.h" #include "hw/sysbus.h" -#include "hw/ide.h" -#include "hw/ide/pci.h" +#include "hw/ide/internal.h" #include "hw/loader.h" #include "hw/fw-path-provider.h" #include "elf.h" @@ -664,11 +663,7 @@ static void sun4uv_init(MemoryRegion *address_space_me= m, } =20 ide_drive_get(hd, ARRAY_SIZE(hd)); - - pci_dev =3D pci_create(pci_busA, PCI_DEVFN(3, 0), "cmd646-ide"); - qdev_prop_set_uint32(&pci_dev->qdev, "secondary", 1); - qdev_init_nofail(&pci_dev->qdev); - pci_ide_create_devs(pci_dev, hd); + pci_cmd646_ide_init(pci_busA, hd, PCI_DEVFN(3, 0), true); =20 /* Map NVRAM into I/O (ebus) space */ nvram =3D m48t59_init(NULL, 0, 0, NVRAM_SIZE, 1968, 59); diff --git a/include/hw/ide.h b/include/hw/ide.h index 28d8a06439..d88c5ee695 100644 --- a/include/hw/ide.h +++ b/include/hw/ide.h @@ -12,8 +12,8 @@ ISADevice *isa_ide_init(ISABus *bus, int iobase, int ioba= se2, int isairq, DriveInfo *hd0, DriveInfo *hd1); =20 /* ide-pci.c */ -void pci_cmd646_ide_init(PCIBus *bus, DriveInfo **hd_table, - int secondary_ide_enabled); +void pci_cmd646_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn, + bool secondary_ide_enabled); PCIDevice *pci_piix3_xen_ide_init(PCIBus *bus, DriveInfo **hd_table, int d= evfn); PCIDevice *pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn= ); PCIDevice *pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn= ); diff --git a/include/hw/ide/pci.h b/include/hw/ide/pci.h index a9f2c33e68..21075edf16 100644 --- a/include/hw/ide/pci.h +++ b/include/hw/ide/pci.h @@ -40,6 +40,11 @@ typedef struct BMDMAState { #define TYPE_PCI_IDE "pci-ide" #define PCI_IDE(obj) OBJECT_CHECK(PCIIDEState, (obj), TYPE_PCI_IDE) =20 +enum { + PCI_IDE_SECONDARY, /* used only for cmd646 */ + PCI_IDE_LEGACY_IRQ +}; + typedef struct PCIIDEState { /*< private >*/ PCIDevice parent_obj; @@ -47,7 +52,7 @@ typedef struct PCIIDEState { =20 IDEBus bus[2]; BMDMAState bmdma[2]; - uint32_t secondary; /* used only for cmd646 */ + uint32_t flags; MemoryRegion bmdma_bar; MemoryRegion cmd_bar[2]; MemoryRegion data_bar[2]; --=20 2.21.1 From nobody Thu May 16 09:27:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1583783762; cv=none; d=zohomail.com; s=zohoarc; b=BBXcJE8y5tlphAxXC4K+Dn8PV8J35wB6e/VYdTxZ5UhJfYd89Z8w2nlF9ApPNlWQH9rypbS0pv+pbIxLqUNpXuD6SBhRusraQO3eIjbdbkekGKWJo6OvS9E5GVtQR8E7/9UJ+OZeRFXaRlqk7mM/NQtpMhBwFWEJLA6P1gJcC7o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1583783762; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=W/JnO/JB5JzWHdI0lNRzI1H0HkfXbOdQ+h0TZZ7yAbQ=; b=cdTiL3m/8FdzOlbJyBadugvpF5xlbSIRU51jDtjo9eMOmKzN8AiX5Xzt5UMVrP4J/SSQ+4p2Xst8CK9kpTVdiqMePVrDWFoAPr3lnnAF4Yme5F40Ui3fu/UjQOlx2AOLB7djP7diJ1MRiy96ZxrPRSvHVhgnbceJZv5O4uzH0UA= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1583783762463696.0360232186534; Mon, 9 Mar 2020 12:56:02 -0700 (PDT) Received: from localhost ([::1]:48982 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jBOVM-0005Ij-7E for importer@patchew.org; Mon, 09 Mar 2020 15:56:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54654) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jBONm-0007CQ-0X for qemu-devel@nongnu.org; Mon, 09 Mar 2020 15:48:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jBONk-0000pg-Q5 for qemu-devel@nongnu.org; Mon, 09 Mar 2020 15:48:09 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:20821) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1jBONh-0000jo-If; Mon, 09 Mar 2020 15:48:05 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 979A3747DFD; Mon, 9 Mar 2020 20:48:02 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 7CC2A747DCF; Mon, 9 Mar 2020 20:48:02 +0100 (CET) Message-Id: <857e327a240f2175fe5105f0ebdfe1357fef32c7.1583781494.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v3 2/3] pci: Honour wmask when resetting PCI_INTERRUPT_LINE Date: Mon, 09 Mar 2020 20:18:13 +0100 To: qemu-devel@nongnu.org, qemu-block@nongnu.org X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:738:2001:2001::2001 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S. Tsirkin" , John Snow , Mark Cave-Ayland , Aleksandar Markovic , philmd@redhat.com, Artyom Tarasenko , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The pci_do_device_reset() function (called from pci_device_reset) clears the PCI_INTERRUPT_LINE config reg of devices on the bus but did this without taking wmask into account. We'll have a device model now that needs to set a constant value for this reg and this patch allows to do that without additional workaround in device emulation to reverse the effect of this PCI bus reset function. Suggested-by: Mark Cave-Ayland Signed-off-by: BALATON Zoltan --- hw/pci/pci.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index e1ed6677e1..d07e4ed9de 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -302,8 +302,10 @@ static void pci_do_device_reset(PCIDevice *dev) pci_word_test_and_clear_mask(dev->config + PCI_STATUS, pci_get_word(dev->wmask + PCI_STATUS) | pci_get_word(dev->w1cmask + PCI_STATUS)); + pci_word_test_and_clear_mask(dev->config + PCI_INTERRUPT_LINE, + pci_get_word(dev->wmask + PCI_INTERRUPT_LINE= ) | + pci_get_word(dev->w1cmask + PCI_INTERRUPT_LI= NE)); dev->config[PCI_CACHE_LINE_SIZE] =3D 0x0; - dev->config[PCI_INTERRUPT_LINE] =3D 0x0; for (r =3D 0; r < PCI_NUM_REGIONS; ++r) { PCIIORegion *region =3D &dev->io_regions[r]; if (!region->size) { --=20 2.21.1 From nobody Thu May 16 09:27:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1583783565; cv=none; d=zohomail.com; s=zohoarc; b=KJfO8QC5xcVbNQGW6MQYl3i/0gIx7y1WIRQML7wQGza7Y+x8gHik9oG1XMrNE9KE8g0l+JOsZwEuFtaXO5vyur9ReYYHz7x+aEDErIDLAJybXep8sp44sKz6mUuoSc/s/t6R/GAdxJ+nDu+QK0eNmRV0R5rKMwc8M5fw3odKr38= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1583783565; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=I22Ykvc82BbaKIjTGd1I3cGrIZqbxLXjEkzr5AiLnWU=; b=MvRbMUwb+JG2msdTwOHhfMR0Y//FPXUikmrXo2x02GdG1I2Ha5WEv7mPzaTU6DtnZ2c37zz3eb//QLKKaeLey2UbGS1f5MfHYAxZlJG739YEH7zruS1SNZElcU3zsXn8PcLb/Zw2RV6wkjercKlC+dHco5iwbPM1761BOEzhyRs= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1583783564717953.7855756321171; Mon, 9 Mar 2020 12:52:44 -0700 (PDT) Received: from localhost ([::1]:48926 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jBOSB-0007cX-K6 for importer@patchew.org; Mon, 09 Mar 2020 15:52:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54682) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jBONo-0007Gx-2i for qemu-devel@nongnu.org; Mon, 09 Mar 2020 15:48:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jBONm-0000rc-JX for qemu-devel@nongnu.org; Mon, 09 Mar 2020 15:48:11 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:20819) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1jBONh-0000jm-V2; Mon, 09 Mar 2020 15:48:06 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id AADC7747DCF; Mon, 9 Mar 2020 20:48:02 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 80A85747E04; Mon, 9 Mar 2020 20:48:02 +0100 (CET) Message-Id: In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v3 3/3] via-ide: Also emulate non 100% native mode Date: Mon, 09 Mar 2020 20:18:13 +0100 To: qemu-devel@nongnu.org, qemu-block@nongnu.org X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:738:2001:2001::2001 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: John Snow , Mark Cave-Ayland , Aleksandar Markovic , philmd@redhat.com, Artyom Tarasenko , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Some machines operate in "non 100% native mode" where interrupts are fixed at legacy IDE interrupts and some guests expect this behaviour without checking based on knowledge about hardware. Even Linux has arch specific workarounds for this that are activated on such boards so this needs to be emulated as well. Signed-off-by: BALATON Zoltan --- v2: Don't use PCI_INTERRUPT_LINE in via_ide_set_irq() v3: Patch pci.c instead of local workaround for PCI reset clearing PCI_INTERRUPT_PIN config reg hw/ide/via.c | 37 +++++++++++++++++++++++++++++-------- hw/mips/mips_fulong2e.c | 2 +- include/hw/ide.h | 3 ++- 3 files changed, 32 insertions(+), 10 deletions(-) diff --git a/hw/ide/via.c b/hw/ide/via.c index 096de8dba0..02d29809f2 100644 --- a/hw/ide/via.c +++ b/hw/ide/via.c @@ -1,9 +1,10 @@ /* - * QEMU IDE Emulation: PCI VIA82C686B support. + * QEMU VIA southbridge IDE emulation (VT82C686B, VT8231) * * Copyright (c) 2003 Fabrice Bellard * Copyright (c) 2006 Openedhand Ltd. * Copyright (c) 2010 Huacai Chen + * Copyright (c) 2019-2020 BALATON Zoltan * * Permission is hereby granted, free of charge, to any person obtaining a= copy * of this software and associated documentation files (the "Software"), t= o deal @@ -25,6 +26,8 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/range.h" +#include "hw/qdev-properties.h" #include "hw/pci/pci.h" #include "migration/vmstate.h" #include "qemu/module.h" @@ -111,11 +114,18 @@ static void via_ide_set_irq(void *opaque, int n, int = level) } else { d->config[0x70 + n * 8] &=3D ~0x80; } - level =3D (d->config[0x70] & 0x80) || (d->config[0x78] & 0x80); - n =3D pci_get_byte(d->config + PCI_INTERRUPT_LINE); - if (n) { - qemu_set_irq(isa_get_irq(NULL, n), level); + + /* + * Some machines operate in "non 100% native mode" where PCI_INTERRUPT= _LINE + * is not used but IDE always uses ISA IRQ 14 and 15 even in native mo= de. + * Some guest drivers expect this, often without checking. + */ + if (!(pci_get_byte(d->config + PCI_CLASS_PROG) & (n ? 4 : 1)) || + PCI_IDE(d)->flags & BIT(PCI_IDE_LEGACY_IRQ)) { + qemu_set_irq(isa_get_irq(NULL, (n ? 15 : 14)), level); + } else { + qemu_set_irq(isa_get_irq(NULL, 14), level); } } =20 @@ -169,7 +179,8 @@ static void via_ide_realize(PCIDevice *dev, Error **err= p) =20 pci_config_set_prog_interface(pci_conf, 0x8f); /* native PCI ATA mode = */ pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0); - dev->wmask[PCI_INTERRUPT_LINE] =3D 0xf; + dev->wmask[PCI_CLASS_PROG] =3D 5; + dev->wmask[PCI_INTERRUPT_LINE] =3D 0; =20 memory_region_init_io(&d->data_bar[0], OBJECT(d), &pci_ide_data_le_ops, &d->bus[0], "via-ide0-data", 8); @@ -213,14 +224,23 @@ static void via_ide_exitfn(PCIDevice *dev) } } =20 -void via_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn) +void via_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn, + bool legacy_irq) { PCIDevice *dev; =20 - dev =3D pci_create_simple(bus, devfn, "via-ide"); + dev =3D pci_create(bus, devfn, "via-ide"); + qdev_prop_set_bit(&dev->qdev, "legacy-irq", legacy_irq); + qdev_init_nofail(&dev->qdev); pci_ide_create_devs(dev, hd_table); } =20 +static Property via_ide_properties[] =3D { + DEFINE_PROP_BIT("legacy-irq", PCIIDEState, flags, PCI_IDE_LEGACY_IRQ, + false), + DEFINE_PROP_END_OF_LIST(), +}; + static void via_ide_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); @@ -233,6 +253,7 @@ static void via_ide_class_init(ObjectClass *klass, void= *data) k->device_id =3D PCI_DEVICE_ID_VIA_IDE; k->revision =3D 0x06; k->class_id =3D PCI_CLASS_STORAGE_IDE; + device_class_set_props(dc, via_ide_properties); set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); } =20 diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index 4727b1d3a4..150182c62a 100644 --- a/hw/mips/mips_fulong2e.c +++ b/hw/mips/mips_fulong2e.c @@ -257,7 +257,7 @@ static void vt82c686b_southbridge_init(PCIBus *pci_bus,= int slot, qemu_irq intc, isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO); =20 ide_drive_get(hd, ARRAY_SIZE(hd)); - via_ide_init(pci_bus, hd, PCI_DEVFN(slot, 1)); + via_ide_init(pci_bus, hd, PCI_DEVFN(slot, 1), false); =20 pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci"); pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci"); diff --git a/include/hw/ide.h b/include/hw/ide.h index d88c5ee695..2a7001ccba 100644 --- a/include/hw/ide.h +++ b/include/hw/ide.h @@ -18,7 +18,8 @@ PCIDevice *pci_piix3_xen_ide_init(PCIBus *bus, DriveInfo = **hd_table, int devfn); PCIDevice *pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn= ); PCIDevice *pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn= ); int pci_piix3_xen_ide_unplug(DeviceState *dev, bool aux); -void via_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn); +void via_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn, + bool legacy_irq); =20 /* ide-mmio.c */ void mmio_ide_init_drives(DeviceState *dev, DriveInfo *hd0, DriveInfo *hd1= ); --=20 2.21.1