From nobody Thu Apr 25 14:37:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1547169976353854.4282040469335; Thu, 10 Jan 2019 17:26:16 -0800 (PST) Received: from localhost ([127.0.0.1]:49550 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ghlaB-00074W-NB for importer@patchew.org; Thu, 10 Jan 2019 20:25:59 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38029) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ghlYr-0006R3-Sm for qemu-devel@nongnu.org; Thu, 10 Jan 2019 20:24:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ghlYq-0000sy-2B for qemu-devel@nongnu.org; Thu, 10 Jan 2019 20:24:37 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]:50520) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ghlYo-0000lG-BN for qemu-devel@nongnu.org; Thu, 10 Jan 2019 20:24:35 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 12F757456CC; Fri, 11 Jan 2019 02:24:25 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 8CA177456BB; Fri, 11 Jan 2019 02:24:24 +0100 (CET) Message-Id: <1e352f091aa601fb2e19771aac46529fe278dd91.1547166960.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Date: Fri, 11 Jan 2019 01:36:00 +0100 To: qemu-devel@nongnu.org X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 152.66.115.2 Subject: [Qemu-devel] [PATCH 1/5] cmd646: Remove unused variable X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , John Snow , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" There was a pointer to PCIIDEState in CMD646BAR which was set but not used afterwards. Get rid of this unused variable. Signed-off-by: BALATON Zoltan Tested-by: Mark Cave-Ayland --- hw/ide/cmd646.c | 1 - include/hw/ide/pci.h | 1 - 2 files changed, 2 deletions(-) diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c index 6bb92d717f..41c1831f9a 100644 --- a/hw/ide/cmd646.c +++ b/hw/ide/cmd646.c @@ -123,7 +123,6 @@ static void setup_cmd646_bar(PCIIDEState *d, int bus_nu= m) CMD646BAR *bar =3D &d->cmd646_bar[bus_num]; =20 bar->bus =3D bus; - bar->pci_dev =3D d; memory_region_init_io(&bar->cmd, OBJECT(d), &cmd646_cmd_ops, bar, "cmd646-cmd", 4); memory_region_init_io(&bar->data, OBJECT(d), &cmd646_data_ops, bar, diff --git a/include/hw/ide/pci.h b/include/hw/ide/pci.h index dbc6a0383d..ed723acfb4 100644 --- a/include/hw/ide/pci.h +++ b/include/hw/ide/pci.h @@ -41,7 +41,6 @@ typedef struct CMD646BAR { MemoryRegion cmd; MemoryRegion data; IDEBus *bus; - struct PCIIDEState *pci_dev; } CMD646BAR; =20 #define TYPE_PCI_IDE "pci-ide" --=20 2.13.7 From nobody Thu Apr 25 14:37:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1547170001279814.1421447014403; Thu, 10 Jan 2019 17:26:41 -0800 (PST) Received: from localhost ([127.0.0.1]:49705 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ghlao-0007aC-VY for importer@patchew.org; Thu, 10 Jan 2019 20:26:39 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38073) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ghlYv-0006SA-Md for qemu-devel@nongnu.org; Thu, 10 Jan 2019 20:24:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ghlYt-0000vr-Ru for qemu-devel@nongnu.org; Thu, 10 Jan 2019 20:24:41 -0500 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:50532) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ghlYr-0000qb-Rn for qemu-devel@nongnu.org; Thu, 10 Jan 2019 20:24:39 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id A22297456BB; Fri, 11 Jan 2019 02:24:32 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 8FEB77456A0; Fri, 11 Jan 2019 02:24:24 +0100 (CET) Message-Id: <7a31c155c9899869794499d841d30c7ef32aae47.1547166960.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Date: Fri, 11 Jan 2019 01:36:00 +0100 To: qemu-devel@nongnu.org X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:738:2001:2001::2001 Subject: [Qemu-devel] [PATCH 2/5] cmd646: Remove IDEBus from CMD646BAR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , John Snow , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The cmd646 io mem ops callbacks only need the IDEBus which is currently passed via a CMD646BAR struct. No need to wrap it up like that, we can pass it directly to these callbacks which then allows to drop the IDEBus from the CMD646BAR. Signed-off-by: BALATON Zoltan Tested-by: Mark Cave-Ayland --- hw/ide/cmd646.c | 29 ++++++++++++++--------------- include/hw/ide/pci.h | 1 - 2 files changed, 14 insertions(+), 16 deletions(-) diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c index 41c1831f9a..c24f71e219 100644 --- a/hw/ide/cmd646.c +++ b/hw/ide/cmd646.c @@ -53,23 +53,23 @@ static void cmd646_update_irq(PCIDevice *pd); static uint64_t cmd646_cmd_read(void *opaque, hwaddr addr, unsigned size) { - CMD646BAR *cmd646bar =3D opaque; + IDEBus *bus =3D opaque; =20 if (addr !=3D 2 || size !=3D 1) { return ((uint64_t)1 << (size * 8)) - 1; } - return ide_status_read(cmd646bar->bus, addr + 2); + return ide_status_read(bus, addr + 2); } =20 static void cmd646_cmd_write(void *opaque, hwaddr addr, uint64_t data, unsigned size) { - CMD646BAR *cmd646bar =3D opaque; + IDEBus *bus =3D opaque; =20 if (addr !=3D 2 || size !=3D 1) { return; } - ide_cmd_write(cmd646bar->bus, addr + 2, data); + ide_cmd_write(bus, addr + 2, data); } =20 static const MemoryRegionOps cmd646_cmd_ops =3D { @@ -81,15 +81,15 @@ static const MemoryRegionOps cmd646_cmd_ops =3D { static uint64_t cmd646_data_read(void *opaque, hwaddr addr, unsigned size) { - CMD646BAR *cmd646bar =3D opaque; + IDEBus *bus =3D opaque; =20 if (size =3D=3D 1) { - return ide_ioport_read(cmd646bar->bus, addr); + return ide_ioport_read(bus, addr); } else if (addr =3D=3D 0) { if (size =3D=3D 2) { - return ide_data_readw(cmd646bar->bus, addr); + return ide_data_readw(bus, addr); } else { - return ide_data_readl(cmd646bar->bus, addr); + return ide_data_readl(bus, addr); } } return ((uint64_t)1 << (size * 8)) - 1; @@ -98,15 +98,15 @@ static uint64_t cmd646_data_read(void *opaque, hwaddr a= ddr, static void cmd646_data_write(void *opaque, hwaddr addr, uint64_t data, unsigned size) { - CMD646BAR *cmd646bar =3D opaque; + IDEBus *bus =3D opaque; =20 if (size =3D=3D 1) { - ide_ioport_write(cmd646bar->bus, addr, data); + ide_ioport_write(bus, addr, data); } else if (addr =3D=3D 0) { if (size =3D=3D 2) { - ide_data_writew(cmd646bar->bus, addr, data); + ide_data_writew(bus, addr, data); } else { - ide_data_writel(cmd646bar->bus, addr, data); + ide_data_writel(bus, addr, data); } } } @@ -122,10 +122,9 @@ static void setup_cmd646_bar(PCIIDEState *d, int bus_n= um) IDEBus *bus =3D &d->bus[bus_num]; CMD646BAR *bar =3D &d->cmd646_bar[bus_num]; =20 - bar->bus =3D bus; - memory_region_init_io(&bar->cmd, OBJECT(d), &cmd646_cmd_ops, bar, + memory_region_init_io(&bar->cmd, OBJECT(d), &cmd646_cmd_ops, bus, "cmd646-cmd", 4); - memory_region_init_io(&bar->data, OBJECT(d), &cmd646_data_ops, bar, + memory_region_init_io(&bar->data, OBJECT(d), &cmd646_data_ops, bus, "cmd646-data", 8); } =20 diff --git a/include/hw/ide/pci.h b/include/hw/ide/pci.h index ed723acfb4..013d7937d2 100644 --- a/include/hw/ide/pci.h +++ b/include/hw/ide/pci.h @@ -40,7 +40,6 @@ typedef struct BMDMAState { typedef struct CMD646BAR { MemoryRegion cmd; MemoryRegion data; - IDEBus *bus; } CMD646BAR; =20 #define TYPE_PCI_IDE "pci-ide" --=20 2.13.7 From nobody Thu Apr 25 14:37:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1547170102144595.8513319493192; Thu, 10 Jan 2019 17:28:22 -0800 (PST) Received: from localhost ([127.0.0.1]:50136 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ghlcT-0000Pk-3P for importer@patchew.org; Thu, 10 Jan 2019 20:28:21 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38072) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ghlYv-0006S9-MP for qemu-devel@nongnu.org; Thu, 10 Jan 2019 20:24:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ghlYt-0000vy-Sf for qemu-devel@nongnu.org; Thu, 10 Jan 2019 20:24:41 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]:50540) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ghlYr-0000tO-T4 for qemu-devel@nongnu.org; Thu, 10 Jan 2019 20:24:39 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id B00417456C9; Fri, 11 Jan 2019 02:24:32 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 930567456B5; Fri, 11 Jan 2019 02:24:24 +0100 (CET) Message-Id: In-Reply-To: References: From: BALATON Zoltan Date: Fri, 11 Jan 2019 01:36:00 +0100 To: qemu-devel@nongnu.org X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 152.66.115.2 Subject: [Qemu-devel] [PATCH 3/5] cmd646: Move PCI IDE specific functions to ide/pci.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , John Snow , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The io mem ops callbacks are not specific to CMD646 but really follow the PCI IDE spec so move these from cmd646.c to pci.c to allow other PCI IDE implementations to use them. Signed-off-by: BALATON Zoltan Tested-by: Mark Cave-Ayland --- hw/ide/cmd646.c | 71 ++----------------------------------------------= ---- hw/ide/pci.c | 65 +++++++++++++++++++++++++++++++++++++++++++++++ include/hw/ide/pci.h | 2 ++ 3 files changed, 69 insertions(+), 69 deletions(-) diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c index c24f71e219..95f0df9742 100644 --- a/hw/ide/cmd646.c +++ b/hw/ide/cmd646.c @@ -50,81 +50,14 @@ =20 static void cmd646_update_irq(PCIDevice *pd); =20 -static uint64_t cmd646_cmd_read(void *opaque, hwaddr addr, - unsigned size) -{ - IDEBus *bus =3D opaque; - - if (addr !=3D 2 || size !=3D 1) { - return ((uint64_t)1 << (size * 8)) - 1; - } - return ide_status_read(bus, addr + 2); -} - -static void cmd646_cmd_write(void *opaque, hwaddr addr, - uint64_t data, unsigned size) -{ - IDEBus *bus =3D opaque; - - if (addr !=3D 2 || size !=3D 1) { - return; - } - ide_cmd_write(bus, addr + 2, data); -} - -static const MemoryRegionOps cmd646_cmd_ops =3D { - .read =3D cmd646_cmd_read, - .write =3D cmd646_cmd_write, - .endianness =3D DEVICE_LITTLE_ENDIAN, -}; - -static uint64_t cmd646_data_read(void *opaque, hwaddr addr, - unsigned size) -{ - IDEBus *bus =3D opaque; - - if (size =3D=3D 1) { - return ide_ioport_read(bus, addr); - } else if (addr =3D=3D 0) { - if (size =3D=3D 2) { - return ide_data_readw(bus, addr); - } else { - return ide_data_readl(bus, addr); - } - } - return ((uint64_t)1 << (size * 8)) - 1; -} - -static void cmd646_data_write(void *opaque, hwaddr addr, - uint64_t data, unsigned size) -{ - IDEBus *bus =3D opaque; - - if (size =3D=3D 1) { - ide_ioport_write(bus, addr, data); - } else if (addr =3D=3D 0) { - if (size =3D=3D 2) { - ide_data_writew(bus, addr, data); - } else { - ide_data_writel(bus, addr, data); - } - } -} - -static const MemoryRegionOps cmd646_data_ops =3D { - .read =3D cmd646_data_read, - .write =3D cmd646_data_write, - .endianness =3D DEVICE_LITTLE_ENDIAN, -}; - static void setup_cmd646_bar(PCIIDEState *d, int bus_num) { IDEBus *bus =3D &d->bus[bus_num]; CMD646BAR *bar =3D &d->cmd646_bar[bus_num]; =20 - memory_region_init_io(&bar->cmd, OBJECT(d), &cmd646_cmd_ops, bus, + memory_region_init_io(&bar->cmd, OBJECT(d), &pci_ide_cmd_le_ops, bus, "cmd646-cmd", 4); - memory_region_init_io(&bar->data, OBJECT(d), &cmd646_data_ops, bus, + memory_region_init_io(&bar->data, OBJECT(d), &pci_ide_data_le_ops, bus, "cmd646-data", 8); } =20 diff --git a/hw/ide/pci.c b/hw/ide/pci.c index b75154f99f..942613a9a9 100644 --- a/hw/ide/pci.c +++ b/hw/ide/pci.c @@ -36,6 +36,71 @@ (IDE_RETRY_DMA | IDE_RETRY_PIO | \ IDE_RETRY_READ | IDE_RETRY_FLUSH) =20 +static uint64_t pci_ide_cmd_read(void *opaque, hwaddr addr, unsigned size) +{ + IDEBus *bus =3D opaque; + + if (addr !=3D 2 || size !=3D 1) { + return ((uint64_t)1 << (size * 8)) - 1; + } + return ide_status_read(bus, addr + 2); +} + +static void pci_ide_cmd_write(void *opaque, hwaddr addr, + uint64_t data, unsigned size) +{ + IDEBus *bus =3D opaque; + + if (addr !=3D 2 || size !=3D 1) { + return; + } + ide_cmd_write(bus, addr + 2, data); +} + +const MemoryRegionOps pci_ide_cmd_le_ops =3D { + .read =3D pci_ide_cmd_read, + .write =3D pci_ide_cmd_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, +}; + +static uint64_t pci_ide_data_read(void *opaque, hwaddr addr, unsigned size) +{ + IDEBus *bus =3D opaque; + + if (size =3D=3D 1) { + return ide_ioport_read(bus, addr); + } else if (addr =3D=3D 0) { + if (size =3D=3D 2) { + return ide_data_readw(bus, addr); + } else { + return ide_data_readl(bus, addr); + } + } + return ((uint64_t)1 << (size * 8)) - 1; +} + +static void pci_ide_data_write(void *opaque, hwaddr addr, + uint64_t data, unsigned size) +{ + IDEBus *bus =3D opaque; + + if (size =3D=3D 1) { + ide_ioport_write(bus, addr, data); + } else if (addr =3D=3D 0) { + if (size =3D=3D 2) { + ide_data_writew(bus, addr, data); + } else { + ide_data_writel(bus, addr, data); + } + } +} + +const MemoryRegionOps pci_ide_data_le_ops =3D { + .read =3D pci_ide_data_read, + .write =3D pci_ide_data_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, +}; + static void bmdma_start_dma(IDEDMA *dma, IDEState *s, BlockCompletionFunc *dma_cb) { diff --git a/include/hw/ide/pci.h b/include/hw/ide/pci.h index 013d7937d2..3110633e4c 100644 --- a/include/hw/ide/pci.h +++ b/include/hw/ide/pci.h @@ -71,4 +71,6 @@ extern MemoryRegionOps bmdma_addr_ioport_ops; void pci_ide_create_devs(PCIDevice *dev, DriveInfo **hd_table); =20 extern const VMStateDescription vmstate_ide_pci; +extern const MemoryRegionOps pci_ide_cmd_le_ops; +extern const MemoryRegionOps pci_ide_data_le_ops; #endif --=20 2.13.7 From nobody Thu Apr 25 14:37:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1547170144716542.4359518337802; Thu, 10 Jan 2019 17:29:04 -0800 (PST) Received: from localhost ([127.0.0.1]:50323 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ghld9-0000xP-Mw for importer@patchew.org; Thu, 10 Jan 2019 20:29:03 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38026) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ghlYr-0006R1-SL for qemu-devel@nongnu.org; Thu, 10 Jan 2019 20:24:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ghlYq-0000t7-2b for qemu-devel@nongnu.org; Thu, 10 Jan 2019 20:24:37 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]:50518) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ghlYo-0000lE-Bb for qemu-devel@nongnu.org; Thu, 10 Jan 2019 20:24:35 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 56CF17456B3; Fri, 11 Jan 2019 02:24:25 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id ADDFA7456C8; Fri, 11 Jan 2019 02:24:24 +0100 (CET) Message-Id: <4b6cb2ae150dc0d21178209e4beb1e35140a7325.1547166960.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Date: Fri, 11 Jan 2019 01:36:00 +0100 To: qemu-devel@nongnu.org X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 152.66.115.2 Subject: [Qemu-devel] [PATCH 4/5] ide: Get rid of CMD646BAR struct X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , John Snow , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Now that no CMD646 specific parts are left in CMD646BAR (all remaining members are really PCI IDE specific) this struct can be deleted moving the memory regions for PCI IDE BARs to PCIIDEState where they better belong. The CMD646 PCI IDE model is adjusted accordingly. Signed-off-by: BALATON Zoltan Tested-by: Mark Cave-Ayland --- hw/ide/cmd646.c | 33 ++++++++++++++++----------------- include/hw/ide/pci.h | 10 ++-------- 2 files changed, 18 insertions(+), 25 deletions(-) diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c index 95f0df9742..5a5679134a 100644 --- a/hw/ide/cmd646.c +++ b/hw/ide/cmd646.c @@ -50,17 +50,6 @@ =20 static void cmd646_update_irq(PCIDevice *pd); =20 -static void setup_cmd646_bar(PCIIDEState *d, int bus_num) -{ - IDEBus *bus =3D &d->bus[bus_num]; - CMD646BAR *bar =3D &d->cmd646_bar[bus_num]; - - memory_region_init_io(&bar->cmd, OBJECT(d), &pci_ide_cmd_le_ops, bus, - "cmd646-cmd", 4); - memory_region_init_io(&bar->data, OBJECT(d), &pci_ide_data_le_ops, bus, - "cmd646-data", 8); -} - static void cmd646_update_dma_interrupts(PCIDevice *pd) { /* Sync DMA interrupt status from UDMA interrupt status */ @@ -277,12 +266,22 @@ static void pci_cmd646_ide_realize(PCIDevice *dev, Er= ror **errp) dev->wmask[MRDMODE] =3D 0x0; dev->w1cmask[MRDMODE] =3D MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1; =20 - setup_cmd646_bar(d, 0); - setup_cmd646_bar(d, 1); - pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd646_bar[0].= data); - pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd646_bar[0].= cmd); - pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd646_bar[1].= data); - pci_register_bar(dev, 3, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd646_bar[1].= cmd); + memory_region_init_io(&d->data_bar[0], OBJECT(d), &pci_ide_data_le_ops, + &d->bus[0], "cmd646-data0", 8); + pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[0]); + + memory_region_init_io(&d->cmd_bar[0], OBJECT(d), &pci_ide_cmd_le_ops, + &d->bus[0], "cmd646-cmd0", 4); + pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[0]); + + memory_region_init_io(&d->data_bar[1], OBJECT(d), &pci_ide_data_le_ops, + &d->bus[1], "cmd646-data1", 8); + pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[1]); + + memory_region_init_io(&d->cmd_bar[1], OBJECT(d), &pci_ide_cmd_le_ops, + &d->bus[1], "cmd646-cmd1", 4); + pci_register_bar(dev, 3, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[1]); + bmdma_setup_bar(d); pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar); =20 diff --git a/include/hw/ide/pci.h b/include/hw/ide/pci.h index 3110633e4c..a9f2c33e68 100644 --- a/include/hw/ide/pci.h +++ b/include/hw/ide/pci.h @@ -37,11 +37,6 @@ typedef struct BMDMAState { struct PCIIDEState *pci_dev; } BMDMAState; =20 -typedef struct CMD646BAR { - MemoryRegion cmd; - MemoryRegion data; -} CMD646BAR; - #define TYPE_PCI_IDE "pci-ide" #define PCI_IDE(obj) OBJECT_CHECK(PCIIDEState, (obj), TYPE_PCI_IDE) =20 @@ -54,17 +49,16 @@ typedef struct PCIIDEState { BMDMAState bmdma[2]; uint32_t secondary; /* used only for cmd646 */ MemoryRegion bmdma_bar; - CMD646BAR cmd646_bar[2]; /* used only for cmd646 */ + MemoryRegion cmd_bar[2]; + MemoryRegion data_bar[2]; } PCIIDEState; =20 - static inline IDEState *bmdma_active_if(BMDMAState *bmdma) { assert(bmdma->bus->retry_unit !=3D (uint8_t)-1); return bmdma->bus->ifs + bmdma->bus->retry_unit; } =20 - void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d); void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val); extern MemoryRegionOps bmdma_addr_ioport_ops; --=20 2.13.7 From nobody Thu Apr 25 14:37:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1547169997675150.7210639702298; Thu, 10 Jan 2019 17:26:37 -0800 (PST) Received: from localhost ([127.0.0.1]:49671 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ghlah-0007V8-M6 for importer@patchew.org; Thu, 10 Jan 2019 20:26:31 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38028) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ghlYr-0006R2-Sl for qemu-devel@nongnu.org; Thu, 10 Jan 2019 20:24:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ghlYq-0000tB-2i for qemu-devel@nongnu.org; Thu, 10 Jan 2019 20:24:37 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]:50519) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ghlYo-0000lF-Bb for qemu-devel@nongnu.org; Thu, 10 Jan 2019 20:24:35 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 54CA27456CA; Fri, 11 Jan 2019 02:24:25 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id B12917456C9; Fri, 11 Jan 2019 02:24:24 +0100 (CET) Message-Id: <793b6a7934ef2bba26b8d066bec446019efa6c5d.1547166960.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Date: Fri, 11 Jan 2019 01:36:00 +0100 To: qemu-devel@nongnu.org X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 152.66.115.2 Subject: [Qemu-devel] [PATCH 5/5] sii3112: Remove duplicated code and use PCI IDE ops instead X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , John Snow , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Parts of the SiI3112 mmio are identical to PCI IDE registers so we can use the corresponding functions that were factored out into ide/pci.c. This removes code duplication and simplifies the SiI3112 model which also helped to spot a copy paste error where reading status of the 2nd channel read the 1st channel instead. This is also fixed here. Signed-off-by: BALATON Zoltan Tested-by: Mark Cave-Ayland --- hw/ide/sii3112.c | 52 ++++++++-------------------------------------------- 1 file changed, 8 insertions(+), 44 deletions(-) diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c index 743a50ed51..59db09cfe4 100644 --- a/hw/ide/sii3112.c +++ b/hw/ide/sii3112.c @@ -88,35 +88,19 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr a= ddr, val |=3D (uint32_t)d->i.bmdma[1].status << 16; break; case 0x80 ... 0x87: - if (size =3D=3D 1) { - val =3D ide_ioport_read(&d->i.bus[0], addr - 0x80); - } else if (addr =3D=3D 0x80) { - val =3D (size =3D=3D 2) ? ide_data_readw(&d->i.bus[0], 0) : - ide_data_readl(&d->i.bus[0], 0); - } else { - val =3D (1ULL << (size * 8)) - 1; - } + val =3D pci_ide_data_le_ops.read(&d->i.bus[0], addr - 0x80, size); break; case 0x8a: - val =3D (size =3D=3D 1) ? ide_status_read(&d->i.bus[0], 4) : - (1ULL << (size * 8)) - 1; + val =3D pci_ide_cmd_le_ops.read(&d->i.bus[0], 2, size); break; case 0xa0: val =3D d->regs[0].confstat; break; case 0xc0 ... 0xc7: - if (size =3D=3D 1) { - val =3D ide_ioport_read(&d->i.bus[1], addr - 0xc0); - } else if (addr =3D=3D 0xc0) { - val =3D (size =3D=3D 2) ? ide_data_readw(&d->i.bus[1], 0) : - ide_data_readl(&d->i.bus[1], 0); - } else { - val =3D (1ULL << (size * 8)) - 1; - } + val =3D pci_ide_data_le_ops.read(&d->i.bus[1], addr - 0xc0, size); break; case 0xca: - val =3D (size =3D=3D 1) ? ide_status_read(&d->i.bus[0], 4) : - (1ULL << (size * 8)) - 1; + val =3D pci_ide_cmd_le_ops.read(&d->i.bus[1], 2, size); break; case 0xe0: val =3D d->regs[1].confstat; @@ -186,36 +170,16 @@ static void sii3112_reg_write(void *opaque, hwaddr ad= dr, bmdma_addr_ioport_ops.write(&d->i.bmdma[1], addr - 12, val, size); break; case 0x80 ... 0x87: - if (size =3D=3D 1) { - ide_ioport_write(&d->i.bus[0], addr - 0x80, val); - } else if (addr =3D=3D 0x80) { - if (size =3D=3D 2) { - ide_data_writew(&d->i.bus[0], 0, val); - } else { - ide_data_writel(&d->i.bus[0], 0, val); - } - } + pci_ide_data_le_ops.write(&d->i.bus[0], addr - 0x80, val, size); break; case 0x8a: - if (size =3D=3D 1) { - ide_cmd_write(&d->i.bus[0], 4, val); - } + pci_ide_cmd_le_ops.write(&d->i.bus[0], 2, val, size); break; case 0xc0 ... 0xc7: - if (size =3D=3D 1) { - ide_ioport_write(&d->i.bus[1], addr - 0xc0, val); - } else if (addr =3D=3D 0xc0) { - if (size =3D=3D 2) { - ide_data_writew(&d->i.bus[1], 0, val); - } else { - ide_data_writel(&d->i.bus[1], 0, val); - } - } + pci_ide_data_le_ops.write(&d->i.bus[1], addr - 0xc0, val, size); break; case 0xca: - if (size =3D=3D 1) { - ide_cmd_write(&d->i.bus[1], 4, val); - } + pci_ide_cmd_le_ops.write(&d->i.bus[1], 2, val, size); break; case 0x100: d->regs[0].scontrol =3D val & 0xfff; --=20 2.13.7