From nobody Sat Feb 7 13:47:36 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545812585150490.4670601380317; Wed, 26 Dec 2018 00:23:05 -0800 (PST) Received: from localhost ([127.0.0.1]:44852 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gc4T1-0006wo-I7 for importer@patchew.org; Wed, 26 Dec 2018 03:23:03 -0500 Received: from eggs.gnu.org ([208.118.235.92]:50657) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gc4RH-0005iN-6N for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gc4RD-0005pW-7e for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:15 -0500 Received: from mga06.intel.com ([134.134.136.31]:14740) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gc4RB-0005oB-82 for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:11 -0500 Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Dec 2018 00:21:07 -0800 Received: from unknown (HELO localhost.localdomain.sh.intel.com) ([10.239.13.104]) by orsmga006.jf.intel.com with ESMTP; 26 Dec 2018 00:21:05 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,400,1539673200"; d="scan'208";a="103379568" From: Yang Weijiang To: qemu-devel@nongnu.org, pbonzini@redhat.com, rkrcmar@redhat.com, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, mst@redhat.com, yu-cheng.yu@intel.com, yi.z.zhang@intel.com, hjl.tools@gmail.com Date: Wed, 26 Dec 2018 16:25:17 +0800 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH 1/4] Add CET xsaves/xrstors related macros and structures. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Weijiang , Zhang Yi Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" CET protection in user mode and kernel mode relies on specific MSRs, these MSRs' contents are automatically saved/restored by xsaves/xrstors instructions. Signed-off-by: Zhang Yi Signed-off-by: Yang Weijiang --- target/i386/cpu.h | 36 +++++++++++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 9c52d0cbeb..f3f724d8e6 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -469,6 +469,9 @@ typedef enum X86Seg { #define XSTATE_ZMM_Hi256_BIT 6 #define XSTATE_Hi16_ZMM_BIT 7 #define XSTATE_PKRU_BIT 9 +#define XSTATE_RESERVED_BIT 10 +#define XSTATE_CET_U_BIT 11 +#define XSTATE_CET_S_BIT 12 =20 #define XSTATE_FP_MASK (1ULL << XSTATE_FP_BIT) #define XSTATE_SSE_MASK (1ULL << XSTATE_SSE_BIT) @@ -479,6 +482,19 @@ typedef enum X86Seg { #define XSTATE_ZMM_Hi256_MASK (1ULL << XSTATE_ZMM_Hi256_BIT) #define XSTATE_Hi16_ZMM_MASK (1ULL << XSTATE_Hi16_ZMM_BIT) #define XSTATE_PKRU_MASK (1ULL << XSTATE_PKRU_BIT) +#define XSTATE_RESERVED_MASK (1ULL << XSTATE_RESERVED_BIT) +#define XSTATE_CET_U_MASK (1ULL << XSTATE_CET_U_BIT) +#define XSTATE_CET_S_MASK (1ULL << XSTATE_CET_S_BIT) + +/* CPUID feature bits available in XCR0 */ +#define CPUID_XSTATE_USER_MASK (XSTATE_FP_MASK | XSTATE_SSE_MASK \ + | XSTATE_YMM_MASK | XSTATE_BNDREGS_MASK \ + | XSTATE_BNDCSR_MASK | XSTATE_OPMASK_MASK \ + | XSTATE_ZMM_Hi256_MASK \ + | XSTATE_Hi16_ZMM_MASK | XSTATE_PKRU_MASK) + +/* CPUID feature bits available in XSS */ +#define CPUID_XSTATE_KERNEL_MASK (XSTATE_CET_U_MASK | XSTATE_CET_S_MASK) =20 /* CPUID feature words */ typedef enum FeatureWord { @@ -503,6 +519,8 @@ typedef enum FeatureWord { FEAT_XSAVE_COMP_LO, /* CPUID[EAX=3D0xd,ECX=3D0].EAX */ FEAT_XSAVE_COMP_HI, /* CPUID[EAX=3D0xd,ECX=3D0].EDX */ FEAT_ARCH_CAPABILITIES, + FEAT_XSAVE_SV_LO, /* CPUID[EAX=3D0xd,ECX=3D1].ECX */ + FEAT_XSAVE_SV_HI, /* CPUID[EAX=3D0xd,ECX=3D1].EDX */ FEATURE_WORDS, } FeatureWord; =20 @@ -687,7 +705,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_7_0_ECX_LA57 (1U << 16) #define CPUID_7_0_ECX_RDPID (1U << 22) #define CPUID_7_0_ECX_CLDEMOTE (1U << 25) /* CLDEMOTE Instruction */ - +#define CPUID_7_0_ECX_CET_SHSTK (1U << 7) /* CET SHSTK feature bit */ #define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Ins= tructions */ #define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulat= ion Single Precision */ #define CPUID_7_0_EDX_PCONFIG (1U << 18) /* Platform Configuration */ @@ -1021,6 +1039,19 @@ typedef struct XSavePKRU { uint32_t padding; } XSavePKRU; =20 +/* Ext. save area 11: User mode CET state */ +typedef struct XSaveCETU { + uint64_t u_cet; + uint64_t user_ssp; +} XSaveCETU; + +/* Ext. save area 12: Supervisor mode CET state */ +typedef struct XSaveCETS { + uint64_t kernel_ssp; + uint64_t pl1_ssp; + uint64_t pl2_ssp; +} XSaveCETS; + typedef struct X86XSaveArea { X86LegacyXSaveArea legacy; X86XSaveHeader header; @@ -1039,6 +1070,9 @@ typedef struct X86XSaveArea { XSaveHi16_ZMM hi16_zmm_state; /* PKRU State: */ XSavePKRU pkru_state; + /* CET State: */ + XSaveCETU cet_u; + XSaveCETS cet_s; } X86XSaveArea; =20 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, avx_state) !=3D 0x240); --=20 2.17.1 From nobody Sat Feb 7 13:47:36 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545812733938794.6720861658252; Wed, 26 Dec 2018 00:25:33 -0800 (PST) Received: from localhost ([127.0.0.1]:44876 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gc4VQ-0001JL-GV for importer@patchew.org; Wed, 26 Dec 2018 03:25:32 -0500 Received: from eggs.gnu.org ([208.118.235.92]:50655) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gc4RH-0005iL-6H for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:15 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gc4RF-0005qF-39 for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:15 -0500 Received: from mga06.intel.com ([134.134.136.31]:14744) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gc4RD-0005p1-BM for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:12 -0500 Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Dec 2018 00:21:09 -0800 Received: from unknown (HELO localhost.localdomain.sh.intel.com) ([10.239.13.104]) by orsmga006.jf.intel.com with ESMTP; 26 Dec 2018 00:21:07 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,400,1539673200"; d="scan'208";a="103379577" From: Yang Weijiang To: qemu-devel@nongnu.org, pbonzini@redhat.com, rkrcmar@redhat.com, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, mst@redhat.com, yu-cheng.yu@intel.com, yi.z.zhang@intel.com, hjl.tools@gmail.com Date: Wed, 26 Dec 2018 16:25:18 +0800 Message-Id: <30d79c2d6fa0658cd2818c21da852fd4dfeeae1c.1545806972.git.weijiang.yang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH 2/4] Add CET SHSTK and IBT CPUID feature-word definitions. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Weijiang , Zhang Yi Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" XSS[bit 11] and XSS[bit 12] correspond to CET user mode area and supervisor mode area respectively. Signed-off-by: Zhang Yi Signed-off-by: Yang Weijiang --- target/i386/cpu.c | 31 +++++++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index f81d35e1f9..3630c688d6 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1018,7 +1018,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORD= S] =3D { .type =3D CPUID_FEATURE_WORD, .feat_names =3D { NULL, "avx512vbmi", "umip", "pku", - NULL /* ospke */, NULL, "avx512vbmi2", NULL, + NULL /* ospke */, NULL, "avx512vbmi2", "shstk", "gfni", "vaes", "vpclmulqdq", "avx512vnni", "avx512bitalg", NULL, "avx512-vpopcntdq", NULL, "la57", NULL, NULL, NULL, @@ -1041,7 +1041,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORD= S] =3D { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, "pconfig", NULL, - NULL, NULL, NULL, NULL, + "ibt", NULL, NULL, NULL, NULL, NULL, "spec-ctrl", NULL, NULL, "arch-capabilities", NULL, "ssbd", }, @@ -1162,6 +1162,25 @@ static FeatureWordInfo feature_word_info[FEATURE_WOR= DS] =3D { } }, }, + /* Below are CET supervisor xsave features */ + [FEAT_XSAVE_SV_LO] =3D { + .type =3D CPUID_FEATURE_WORD, + .cpuid =3D { + .eax =3D 0xD, + .needs_ecx =3D true, + .ecx =3D 1, + .reg =3D R_ECX, + }, + }, + [FEAT_XSAVE_SV_HI] =3D { + .type =3D CPUID_FEATURE_WORD, + .cpuid =3D { + .eax =3D 0xD, + .needs_ecx =3D true, + .ecx =3D 1, + .reg =3D R_EDX + }, + } }; =20 typedef struct X86RegisterInfo32 { @@ -1233,6 +1252,14 @@ static const ExtSaveArea x86_ext_save_areas[] =3D { { .feature =3D FEAT_7_0_ECX, .bits =3D CPUID_7_0_ECX_PKU, .offset =3D offsetof(X86XSaveArea, pkru_state), .size =3D sizeof(XSavePKRU) }, + [XSTATE_CET_U_BIT] =3D { + .feature =3D FEAT_7_0_ECX, .bits =3D CPUID_7_0_ECX_CET_SHSTK, + .offset =3D offsetof(X86XSaveArea, cet_u), + .size =3D sizeof(XSaveCETU) }, + [XSTATE_CET_S_BIT] =3D { + .feature =3D FEAT_7_0_ECX, .bits =3D CPUID_7_0_ECX_CET_SHSTK, + .offset =3D offsetof(X86XSaveArea, cet_s), + .size =3D sizeof(XSaveCETS) }, }; =20 static uint32_t xsave_area_size(uint64_t mask) --=20 2.17.1 From nobody Sat Feb 7 13:47:36 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545812716830609.1195563653674; Wed, 26 Dec 2018 00:25:16 -0800 (PST) Received: from localhost ([127.0.0.1]:44873 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gc4V9-0000sQ-DL for importer@patchew.org; Wed, 26 Dec 2018 03:25:15 -0500 Received: from eggs.gnu.org ([208.118.235.92]:50687) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gc4RL-0005nM-37 for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gc4RJ-0005rt-54 for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:19 -0500 Received: from mga06.intel.com ([134.134.136.31]:14750) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gc4RH-0005q6-6d for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:16 -0500 Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Dec 2018 00:21:12 -0800 Received: from unknown (HELO localhost.localdomain.sh.intel.com) ([10.239.13.104]) by orsmga006.jf.intel.com with ESMTP; 26 Dec 2018 00:21:10 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,400,1539673200"; d="scan'208";a="103379586" From: Yang Weijiang To: qemu-devel@nongnu.org, pbonzini@redhat.com, rkrcmar@redhat.com, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, mst@redhat.com, yu-cheng.yu@intel.com, yi.z.zhang@intel.com, hjl.tools@gmail.com Date: Wed, 26 Dec 2018 16:25:19 +0800 Message-Id: <7a6de6a8c37161fc207f7003fc0e762045fb4028.1545806972.git.weijiang.yang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH 3/4] Add hepler functions for CPUID xsave area size calculation. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Weijiang , Zhang Yi Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" These functions are called when return CPUID xsave area size information. Signed-off-by: Zhang Yi Signed-off-by: Yang Weijiang --- target/i386/cpu.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 3630c688d6..cf4f2798dc 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1281,12 +1281,34 @@ static inline bool accel_uses_host_cpuid(void) return kvm_enabled() || hvf_enabled(); } =20 +static uint32_t xsave_area_size_compat(uint64_t mask) +{ + int i; + uint64_t ret =3D 0; + uint32_t offset; + + for (i =3D 0; i < ARRAY_SIZE(x86_ext_save_areas); i++) { + const ExtSaveArea *esa =3D &x86_ext_save_areas[i]; + offset =3D i > 1 ? ret : esa->offset; + if ((mask >> i) & 1) { + ret =3D MAX(ret, offset + esa->size); + } + } + return ret; +} + static inline uint64_t x86_cpu_xsave_components(X86CPU *cpu) { return ((uint64_t)cpu->env.features[FEAT_XSAVE_COMP_HI]) << 32 | cpu->env.features[FEAT_XSAVE_COMP_LO]; } =20 +static inline uint64_t x86_cpu_xsave_sv_components(X86CPU *cpu) +{ + return ((uint64_t)cpu->env.features[FEAT_XSAVE_SV_HI]) << 32 | + cpu->env.features[FEAT_XSAVE_SV_LO]; +} + const char *get_register_name_32(unsigned int reg) { if (reg >=3D CPU_NB_REGS32) { @@ -4913,8 +4935,10 @@ static void x86_cpu_enable_xsave_components(X86CPU *= cpu) } } =20 - env->features[FEAT_XSAVE_COMP_LO] =3D mask; + env->features[FEAT_XSAVE_COMP_LO] =3D mask & CPUID_XSTATE_USER_MASK; env->features[FEAT_XSAVE_COMP_HI] =3D mask >> 32; + env->features[FEAT_XSAVE_SV_LO] =3D mask & CPUID_XSTATE_KERNEL_MASK; + env->features[FEAT_XSAVE_SV_HI] =3D mask >> 32; } =20 /***** Steps involved on loading and filtering CPUID data --=20 2.17.1 From nobody Sat Feb 7 13:47:36 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545812757441224.57128071698048; Wed, 26 Dec 2018 00:25:57 -0800 (PST) Received: from localhost ([127.0.0.1]:44879 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gc4Vn-0001fb-Th for importer@patchew.org; Wed, 26 Dec 2018 03:25:55 -0500 Received: from eggs.gnu.org ([208.118.235.92]:50689) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gc4RL-0005nO-3V for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gc4RJ-0005rz-5j for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:19 -0500 Received: from mga06.intel.com ([134.134.136.31]:14744) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gc4RH-0005p1-9t for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:17 -0500 Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Dec 2018 00:21:14 -0800 Received: from unknown (HELO localhost.localdomain.sh.intel.com) ([10.239.13.104]) by orsmga006.jf.intel.com with ESMTP; 26 Dec 2018 00:21:12 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,400,1539673200"; d="scan'208";a="103379595" From: Yang Weijiang To: qemu-devel@nongnu.org, pbonzini@redhat.com, rkrcmar@redhat.com, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, mst@redhat.com, yu-cheng.yu@intel.com, yi.z.zhang@intel.com, hjl.tools@gmail.com Date: Wed, 26 Dec 2018 16:25:20 +0800 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH 4/4] Report CPUID xsave area support for CET. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Weijiang , Zhang Yi Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" CPUID bit definition as below: CPUID.(EAX=3Dd, ECX=3D1):ECX.CET_U(bit 11): user mode state CPUID.(EAX=3Dd, ECX=3D1):ECX.CET_S(bit 12): kernel mode state Signed-off-by: Zhang Yi Signed-off-by: Yang Weijiang --- target/i386/cpu.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index cf4f2798dc..78994bfa1d 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4396,12 +4396,22 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index= , uint32_t count, *ebx =3D xsave_area_size(env->xcr0); } else if (count =3D=3D 1) { *eax =3D env->features[FEAT_XSAVE]; + *ecx =3D env->features[FEAT_XSAVE_SV_LO]; + *edx =3D env->features[FEAT_XSAVE_SV_HI]; + *ebx =3D xsave_area_size_compat(x86_cpu_xsave_components(cpu) | + x86_cpu_xsave_sv_components(cpu)); } else if (count < ARRAY_SIZE(x86_ext_save_areas)) { if ((x86_cpu_xsave_components(cpu) >> count) & 1) { const ExtSaveArea *esa =3D &x86_ext_save_areas[count]; *eax =3D esa->size; *ebx =3D esa->offset; } + if ((x86_cpu_xsave_sv_components(cpu) >> count) & 1) { + const ExtSaveArea *esa_sv =3D &x86_ext_save_areas[count]; + *eax =3D esa_sv->size; + *ebx =3D esa_sv->offset; + *ecx =3D 1; + } } break; } --=20 2.17.1