From nobody Sat Sep 14 07:37:06 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1677629860014901.5267771251331; Tue, 28 Feb 2023 16:17:40 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pXA9q-0008L8-Vo; Tue, 28 Feb 2023 19:17:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pXA9n-0008IJ-B7; Tue, 28 Feb 2023 19:17:19 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pXA9l-0001im-Pp; Tue, 28 Feb 2023 19:17:19 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 96498746705; Wed, 1 Mar 2023 01:17:11 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 6175F74645F; Wed, 1 Mar 2023 01:17:11 +0100 (CET) Message-Id: In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v5 5/7] hw/isa/vt82c686: Work around missing level sensitive irq in i8259 model MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Gerd Hoffmann , Daniel Henrique Barboza , Bernhard Beschow , Peter Maydell , philmd@linaro.org, ReneEngel80@emailn.de Date: Wed, 1 Mar 2023 01:17:11 +0100 (CET) X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1677629862761100003 Content-Type: text/plain; charset="utf-8" MorphOS sets the ISA PIC to level sensitive mode but QEMU does not support that so this causes a freeze if multiple devices try to raise a shared interrupt. Work around it by lowering the interrupt before raising it again if it is already raised. This could be reverted when the i8259 model is fixed. Signed-off-by: BALATON Zoltan --- hw/isa/vt82c686.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 018a119964..3e44a51f92 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -549,6 +549,7 @@ struct ViaISAState { PCIDevice dev; qemu_irq cpu_intr; qemu_irq *isa_irqs_in; + uint16_t isa_irqs_state; ViaSuperIOState via_sio; MC146818RtcState rtc; PCIIDEState ide; @@ -636,6 +637,14 @@ static void via_isa_set_pci_irq(void *opaque, int irq_= num, int level) pic_level |=3D pci_bus_get_irq_level(bus, i); } } + /* FIXME: workaround for i8259: level sensitive irq not supported */ + if ((s->isa_irqs_state & BIT(pic_irq)) && pic_level) { + qemu_irq_lower(s->isa_irqs_in[pic_irq]); + } else if (pic_level) { + s->isa_irqs_state |=3D BIT(pic_irq); + } else { + s->isa_irqs_state &=3D ~BIT(pic_irq); + } /* Now we change the pic irq level according to the via irq mappings. = */ qemu_set_irq(s->isa_irqs_in[pic_irq], pic_level); } --=20 2.30.8