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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: drjones@redhat.com, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Adds a spe=3D[on/off] option to enable/disable vSPE support in guest vCPU. Note this option is only available for "-cpu host" with KVM mode, and default value is on.=20 Signed-off-by: Haibo Xu --- target/arm/cpu.c | 28 ++++++++++++++++++++++++++++ target/arm/cpu.h | 3 +++=20 2 files changed, 31 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 111579554f..40768b4d19 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1122,6 +1122,29 @@ static void arm_set_pmu(Object *obj, bool value, Err= or **errp) cpu->has_pmu =3D value; } =20 +static bool arm_get_spe(Object *obj, Error **errp) +{ + ARMCPU *cpu =3D ARM_CPU(obj); + + return cpu->has_spe; +} + +static void arm_set_spe(Object *obj, bool value, Error **errp) +{ + ARMCPU *cpu =3D ARM_CPU(obj); + + if (value) { + if (kvm_enabled() && !kvm_arm_spe_supported()) { + error_setg(errp, "'spe' feature not supported by KVM on this h= ost"); + return; + } + set_feature(&cpu->env, ARM_FEATURE_SPE); + } else { + unset_feature(&cpu->env, ARM_FEATURE_SPE); + } + cpu->has_spe =3D value; +} + unsigned int gt_cntfrq_period_ns(ARMCPU *cpu) { /* @@ -1195,6 +1218,11 @@ void arm_cpu_post_init(Object *obj) object_property_add_bool(obj, "pmu", arm_get_pmu, arm_set_pmu); } + if (arm_feature(&cpu->env, ARM_FEATURE_SPE)) { + cpu->has_spe =3D true; + object_property_add_bool(obj, "spe", arm_get_spe, arm_set_spe); + } + /* * Allow user to turn off VFP and Neon support, but only for TCG -- * KVM does not currently allow us to lie to the guest about its diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 9e8ed423ea..fe0ac14386 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -822,6 +822,8 @@ struct ARMCPU { bool has_el3; /* CPU has PMU (Performance Monitor Unit) */ bool has_pmu; + /* CPU has SPE (Statistical Profiling Extension) */ + bool has_spe; /* CPU has VFP */ bool has_vfp; /* CPU has Neon */ @@ -1959,6 +1961,7 @@ enum arm_features { ARM_FEATURE_VBAR, /* has cp15 VBAR */ ARM_FEATURE_M_SECURITY, /* M profile Security Extension */ ARM_FEATURE_M_MAIN, /* M profile Main Extension */ + ARM_FEATURE_SPE, /* has SPE support */ }; static inline int arm_feature(CPUARMState *env, int feature) --=20 2.17.1