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Signed-off-by: Matheus Tavares Bernardino --- target/hexagon/cpu.h | 10 +++------- target/hexagon/cpu_bits.h | 7 +++++++ target/hexagon/cpu.c | 14 +++++++------- target/hexagon/translate.c | 6 +++--- 4 files changed, 20 insertions(+), 17 deletions(-) diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index 77822a48b6..d28beaa92f 100644 --- a/target/hexagon/cpu.h +++ b/target/hexagon/cpu.h @@ -119,19 +119,15 @@ typedef struct HexagonCPUClass { ResettablePhases parent_phases; } HexagonCPUClass; =20 +#include "cpu_bits.h" + struct ArchCPU { CPUState parent_obj; =20 CPUHexagonState env; - - bool lldb_compat; - target_ulong lldb_stack_adjust; - bool short_circuit; - bool ieee_fp_extension; + HexagonCPUConfig cfg; }; =20 -#include "cpu_bits.h" - FIELD(TB_FLAGS, IS_TIGHT_LOOP, 0, 1) =20 G_NORETURN void hexagon_raise_exception_err(CPUHexagonState *env, diff --git a/target/hexagon/cpu_bits.h b/target/hexagon/cpu_bits.h index 19beca81c0..83d13de569 100644 --- a/target/hexagon/cpu_bits.h +++ b/target/hexagon/cpu_bits.h @@ -20,6 +20,13 @@ =20 #include "qemu/bitops.h" =20 +typedef struct HexagonCPUConfig { + bool lldb_compat; + uint32_t lldb_stack_adjust; + bool short_circuit; + bool ieee_fp_extension; +} HexagonCPUConfig; + #define PCALIGN 4 #define PCALIGN_MASK (PCALIGN - 1) =20 diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 8b72a5d3c8..5470d9c7ce 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -50,11 +50,11 @@ static ObjectClass *hexagon_cpu_class_by_name(const cha= r *cpu_model) } =20 static const Property hexagon_cpu_properties[] =3D { - DEFINE_PROP_BOOL("lldb-compat", HexagonCPU, lldb_compat, false), - DEFINE_PROP_UNSIGNED("lldb-stack-adjust", HexagonCPU, lldb_stack_adjus= t, 0, - qdev_prop_uint32, target_ulong), - DEFINE_PROP_BOOL("short-circuit", HexagonCPU, short_circuit, true), - DEFINE_PROP_BOOL("ieee-fp", HexagonCPU, ieee_fp_extension, true), + DEFINE_PROP_BOOL("lldb-compat", HexagonCPU, cfg.lldb_compat, false), + DEFINE_PROP_UNSIGNED("lldb-stack-adjust", HexagonCPU, cfg.lldb_stack_a= djust, + 0, qdev_prop_uint32, target_ulong), + DEFINE_PROP_BOOL("short-circuit", HexagonCPU, cfg.short_circuit, true), + DEFINE_PROP_BOOL("ieee-fp", HexagonCPU, cfg.ieee_fp_extension, true), }; =20 const char * const hexagon_regnames[TOTAL_PER_THREAD_REGS] =3D { @@ -77,7 +77,7 @@ const char * const hexagon_regnames[TOTAL_PER_THREAD_REGS= ] =3D { static target_ulong adjust_stack_ptrs(CPUHexagonState *env, target_ulong a= ddr) { HexagonCPU *cpu =3D env_archcpu(env); - target_ulong stack_adjust =3D cpu->lldb_stack_adjust; + target_ulong stack_adjust =3D cpu->cfg.lldb_stack_adjust; target_ulong stack_start =3D env->stack_start; target_ulong stack_size =3D 0x10000; =20 @@ -181,7 +181,7 @@ static void hexagon_dump(CPUHexagonState *env, FILE *f,= int flags) { HexagonCPU *cpu =3D env_archcpu(env); =20 - if (cpu->lldb_compat) { + if (cpu->cfg.lldb_compat) { /* * When comparing with LLDB, it doesn't step through single-cycle * hardware loops the same way. So, we just skip them here diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index fa8f615a9e..ce3af96675 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -987,8 +987,8 @@ static void hexagon_tr_init_disas_context(DisasContextB= ase *dcbase, ctx->num_hvx_insns =3D 0; ctx->branch_cond =3D TCG_COND_NEVER; ctx->is_tight_loop =3D FIELD_EX32(hex_flags, TB_FLAGS, IS_TIGHT_LOOP); - ctx->short_circuit =3D hex_cpu->short_circuit; - ctx->ieee_fp_extension =3D hex_cpu->ieee_fp_extension; + ctx->short_circuit =3D hex_cpu->cfg.short_circuit; + ctx->ieee_fp_extension =3D hex_cpu->cfg.ieee_fp_extension; } =20 static void hexagon_tr_tb_start(DisasContextBase *db, CPUState *cpu) @@ -1041,7 +1041,7 @@ static void hexagon_tr_translate_packet(DisasContextB= ase *dcbase, CPUState *cpu) * so end the TLB after every packet. */ HexagonCPU *hex_cpu =3D env_archcpu(env); - if (hex_cpu->lldb_compat && qemu_loglevel_mask(CPU_LOG_TB_CPU)) { + if (hex_cpu->cfg.lldb_compat && qemu_loglevel_mask(CPU_LOG_TB_CPU)= ) { ctx->base.is_jmp =3D DISAS_TOO_MANY; } } --=20 2.37.2