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Tsirkin" To: qemu-devel@nongnu.org Cc: Peter Maydell , Salil Mehta , Igor Mammedov , Ani Sinha , Eduardo Habkost , Marcel Apfelbaum , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , Yanan Wang , Zhao Liu Subject: [PULL 60/65] hw/acpi: Update ACPI `_STA` method with QOM vCPU ACPI Hotplug states Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Mailer: git-send-email 2.27.0.106.g8ac3dc51b1 X-Mutt-Fcc: =sent Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -23 X-Spam_score: -2.4 X-Spam_bar: -- X-Spam_report: (-2.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.34, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1730754830982116600 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Salil Mehta Reflect the QOM vCPUs ACPI CPU hotplug states in the `_STA.Present` and and `_STA.Enabled` bits when the guest kernel evaluates the ACPI `_STA` method during initialization, as well as when vCPUs are hot-plugged or hot-unplugged. If the CPU is present then the its `enabled` status can be fetched using architecture-specific code [1]. Reference: [1] Example implementation of architecture-specific hook to fetch CPU `enabled status Link: https://github.com/salil-mehta/qemu/commit/c0b416b11e5af6505e5588= 66f0eb6c9f3709173e Signed-off-by: Salil Mehta Message-Id: <20241103102419.202225-4-salil.mehta@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/core/cpu.h | 1 + hw/acpi/cpu.c | 38 ++++++++++++++++++++++++++++++++++---- 2 files changed, 35 insertions(+), 4 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index e7de77dc6d..db8a6fbc6e 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -159,6 +159,7 @@ struct CPUClass { void (*query_cpu_fast)(CPUState *cpu, CpuInfoFast *value); int64_t (*get_arch_id)(CPUState *cpu); bool (*cpu_persistent_status)(CPUState *cpu); + bool (*cpu_enabled_status)(CPUState *cpu); void (*set_pc)(CPUState *cpu, vaddr value); vaddr (*get_pc)(CPUState *cpu); int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg); diff --git a/hw/acpi/cpu.c b/hw/acpi/cpu.c index 9b03b4292e..23443f09a5 100644 --- a/hw/acpi/cpu.c +++ b/hw/acpi/cpu.c @@ -50,6 +50,18 @@ void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIO= STInfoList ***list) } } =20 +static bool check_cpu_enabled_status(DeviceState *dev) +{ + CPUClass *k =3D dev ? CPU_GET_CLASS(dev) : NULL; + CPUState *cpu =3D CPU(dev); + + if (cpu && (!k->cpu_enabled_status || k->cpu_enabled_status(cpu))) { + return true; + } + + return false; +} + static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size) { uint64_t val =3D 0; @@ -63,10 +75,11 @@ static uint64_t cpu_hotplug_rd(void *opaque, hwaddr add= r, unsigned size) cdev =3D &cpu_st->devs[cpu_st->selector]; switch (addr) { case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */ - val |=3D cdev->cpu ? 1 : 0; + val |=3D check_cpu_enabled_status(DEVICE(cdev->cpu)) ? 1 : 0; val |=3D cdev->is_inserting ? 2 : 0; val |=3D cdev->is_removing ? 4 : 0; val |=3D cdev->fw_remove ? 16 : 0; + val |=3D cdev->cpu ? 32 : 0; trace_cpuhp_acpi_read_flags(cpu_st->selector, val); break; case ACPI_CPU_CMD_DATA_OFFSET_RW: @@ -349,6 +362,7 @@ const VMStateDescription vmstate_cpu_hotplug =3D { #define CPU_REMOVE_EVENT "CRMV" #define CPU_EJECT_EVENT "CEJ0" #define CPU_FW_EJECT_EVENT "CEJF" +#define CPU_PRESENT "CPRS" =20 void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures = opts, build_madt_cpu_fn build_madt_cpu, hwaddr base_addr, @@ -409,7 +423,9 @@ void build_cpus_aml(Aml *table, MachineState *machine, = CPUHotplugFeatures opts, aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1)); /* tell firmware to do device eject, write only */ aml_append(field, aml_named_field(CPU_FW_EJECT_EVENT, 1)); - aml_append(field, aml_reserved_field(3)); + /* 1 if present, read only */ + aml_append(field, aml_named_field(CPU_PRESENT, 1)); + aml_append(field, aml_reserved_field(2)); aml_append(field, aml_named_field(CPU_COMMAND, 8)); aml_append(cpu_ctrl_dev, field); =20 @@ -439,6 +455,7 @@ void build_cpus_aml(Aml *table, MachineState *machine, = CPUHotplugFeatures opts, Aml *ctrl_lock =3D aml_name("%s.%s", cphp_res_path, CPU_LOCK); Aml *cpu_selector =3D aml_name("%s.%s", cphp_res_path, CPU_SELECTO= R); Aml *is_enabled =3D aml_name("%s.%s", cphp_res_path, CPU_ENABLED); + Aml *is_present =3D aml_name("%s.%s", cphp_res_path, CPU_PRESENT); Aml *cpu_cmd =3D aml_name("%s.%s", cphp_res_path, CPU_COMMAND); Aml *cpu_data =3D aml_name("%s.%s", cphp_res_path, CPU_DATA); Aml *ins_evt =3D aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT= ); @@ -467,13 +484,26 @@ void build_cpus_aml(Aml *table, MachineState *machine= , CPUHotplugFeatures opts, { Aml *idx =3D aml_arg(0); Aml *sta =3D aml_local(0); + Aml *ifctx2; + Aml *else_ctx; =20 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); aml_append(method, aml_store(idx, cpu_selector)); aml_append(method, aml_store(zero, sta)); - ifctx =3D aml_if(aml_equal(is_enabled, one)); + ifctx =3D aml_if(aml_equal(is_present, one)); { - aml_append(ifctx, aml_store(aml_int(0xF), sta)); + ifctx2 =3D aml_if(aml_equal(is_enabled, one)); + { + /* cpu is present and enabled */ + aml_append(ifctx2, aml_store(aml_int(0xF), sta)); + } + aml_append(ifctx, ifctx2); + else_ctx =3D aml_else(); + { + /* cpu is present but disabled */ + aml_append(else_ctx, aml_store(aml_int(0xD), sta)); + } + aml_append(ifctx, else_ctx); } aml_append(method, ifctx); aml_append(method, aml_release(ctrl_lock)); --=20 MST