From nobody Wed Nov 27 20:34:30 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1697645289; cv=none; d=zohomail.com; s=zohoarc; b=EA/XXAIaY8oEC2RMzWDx5Ft8juwFXh7dHeR7++uRQ7S7qUJ5hOp3beuWOqsg5HZ64TIhZlKkeZNV9cODYvHbOAWiqYTj/LW+UaiiukSXSG846+KW27JuzFifjo5UzuMdXAWME8zGfFRTaBSso4WuBbBf/A+X0F6vGo2xm7A6A6I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1697645289; h=Content-Type:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=pZy/qcc3rYAioh5DSCyMc5Ebvruw/qgaRKdAdK5HreA=; b=JtoxlDclkWAv7rESp61A86/IYcq98sNYQT3mfSV5VrLI9oyA3Kv3jW8492TuTZSirRyQGC7Lhyjzn8Q693RVReuf6ysmBMv/y3pS8WQsuVBoXuf7QWQjQ6OUVcQTvEhq14IG+XlYc+uqlCAMWQyqq8XYozRLB03N+yb5EsCXevE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1697645289496530.3730252943751; Wed, 18 Oct 2023 09:08:09 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qt8wh-0001EF-9m; Wed, 18 Oct 2023 11:58:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qt8vZ-0007ln-Gz for qemu-devel@nongnu.org; Wed, 18 Oct 2023 11:57:46 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qt8vX-0007LK-FA for qemu-devel@nongnu.org; Wed, 18 Oct 2023 11:57:45 -0400 Received: from mail-lj1-f199.google.com (mail-lj1-f199.google.com [209.85.208.199]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-100-LqHjrpmbMwSmKAMkfyPYzg-1; Wed, 18 Oct 2023 11:57:40 -0400 Received: by mail-lj1-f199.google.com with SMTP id 38308e7fff4ca-2c50ef18b04so46478521fa.1 for ; Wed, 18 Oct 2023 08:57:40 -0700 (PDT) Received: from redhat.com ([2a02:14f:1f2:2037:f34:d61b:7da0:a7be]) by smtp.gmail.com with ESMTPSA id k3-20020a5d4283000000b003232f167df5sm2379130wrq.108.2023.10.18.08.57.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 08:57:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1697644661; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=pZy/qcc3rYAioh5DSCyMc5Ebvruw/qgaRKdAdK5HreA=; b=aJMd5HyzTs6V5GwvEyRaSyN7RONzHB5ZkrRmCItLNpoOMKuHFWLiCphKtbbIMwfqqUUOvL IKFCKHmo/+gyomP9q678E7Mt09L7cBmCuLtspxBFELt8rxBkRkuYsckPCURgebc64I/wtW 48C/2TX9GYC8mKqHshUkoUmp7wUz/84= X-MC-Unique: LqHjrpmbMwSmKAMkfyPYzg-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697644658; x=1698249458; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=pZy/qcc3rYAioh5DSCyMc5Ebvruw/qgaRKdAdK5HreA=; b=qxNge0wQdS0sTq/xew3S5NTotW2had9+e1hzFVdJpQFaIPhWVzJlJiLi9acM8kEFKe HjLkKbHBa3X6isBWSDtCSW6pdMdlNoE4Jw686RiKk8dxa8VmI6kFc+jK/5EyIE8fj/L8 rOfZh4d0RoDY+/uHZXMGrFA+NfwqPPrfo2qJQPgxrlJc7FtFswmCa3Dh8PI1SiBtK17S Y5PNP9oSeBwl6+ljGPHyin+4COD2m/kAtSGZlkz7qJWf9fUDa/XuFeMfIBXTq0nyrkqj f+LUMKA3z5SN6+Iff9ekOVIYtf6rEU2jBvHLmR26V6aGRLVfGrkX3QCdwtG4MiKGVi/q EuoQ== X-Gm-Message-State: AOJu0YxgIuYrI3nxahP8GnMeYkVkrLhiJY6tTHkTJwoW1npsJaPxaNp7 jptP09Nhn7eElsozjndnnh7s9u0JLdxdL/btb8QElh7cjT94hn7SAhjwR7GhT3Ab+H+XsruD90B DERNl1ei52ReIzXPTXGWl4eKsYpnV+yE7VLMkfF2hGvPwbCsaa5nYLFs/7SeHjh1o5xJYmGE= X-Received: by 2002:a2e:be03:0:b0:2c4:feef:84d with SMTP id z3-20020a2ebe03000000b002c4feef084dmr4980152ljq.43.1697644658289; Wed, 18 Oct 2023 08:57:38 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHxCdtpQC5PMLzMdlcPAw3qlA4h4A2ZWW41ReJi6lnaipPeFRvPL1AKjSf/6b5IaJFXXYPtCQ== X-Received: by 2002:a2e:be03:0:b0:2c4:feef:84d with SMTP id z3-20020a2ebe03000000b002c4feef084dmr4980128ljq.43.1697644657996; Wed, 18 Oct 2023 08:57:37 -0700 (PDT) Date: Wed, 18 Oct 2023 11:57:33 -0400 From: "Michael S. Tsirkin" To: qemu-devel@nongnu.org Cc: Peter Maydell , Bernhard Beschow , Paolo Bonzini , Richard Henderson , Eduardo Habkost , Marcel Apfelbaum , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , Aurelien Jarno , =?utf-8?B?SGVydsOp?= Poussineau Subject: [PULL 55/83] hw/isa/piix3: Create power management controller in host device Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Mailer: git-send-email 2.27.0.106.g8ac3dc51b1 X-Mutt-Fcc: =sent Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1697645290891100004 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Bernhard Beschow The power management controller is an integral part of PIIX3 (function 3). = So create it as part of the south bridge. Note that the ACPI function is optional in QEMU. This is why it gets object_initialize_child()'ed in realize rather than in instance_init. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20231007123843.127151-14-shentey@gmail.com> Signed-off-by: Michael S. Tsirkin --- include/hw/southbridge/piix.h | 6 ++++++ hw/i386/pc_piix.c | 24 +++++++++++------------- hw/isa/piix3.c | 15 +++++++++++++++ hw/isa/Kconfig | 1 + 4 files changed, 33 insertions(+), 13 deletions(-) diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 5cd866f1f2..c56ce49fd3 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -13,6 +13,7 @@ #define HW_SOUTHBRIDGE_PIIX_H =20 #include "hw/pci/pci_device.h" +#include "hw/acpi/piix4.h" #include "hw/ide/pci.h" #include "hw/rtc/mc146818rtc.h" #include "hw/usb/hcd-uhci.h" @@ -56,6 +57,9 @@ struct PIIXState { MC146818RtcState rtc; PCIIDEState ide; UHCIState uhci; + PIIX4PMState pm; + + uint32_t smb_io_base; =20 /* Reset Control Register contents */ uint8_t rcr; @@ -63,7 +67,9 @@ struct PIIXState { /* IO memory region for Reset Control Register (PIIX_RCR_IOPORT) */ MemoryRegion rcr_mem; =20 + bool has_acpi; bool has_usb; + bool smm_enabled; }; typedef struct PIIXState PIIX3State; =20 diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 8dcd6851d0..70cffcfe4f 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -50,7 +50,6 @@ #include "hw/i2c/smbus_eeprom.h" #include "exec/memory.h" #include "hw/acpi/acpi.h" -#include "hw/acpi/piix4.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "sysemu/xen.h" @@ -115,7 +114,7 @@ static void pc_init1(MachineState *machine, MemoryRegion *system_io =3D get_system_io(); PCIBus *pci_bus =3D NULL; ISABus *isa_bus; - int piix3_devfn =3D -1; + Object *piix4_pm =3D NULL; qemu_irq smi_irq; GSIState *gsi_state; BusState *idebus[MAX_IDE_BUS]; @@ -266,6 +265,13 @@ static void pc_init1(MachineState *machine, pci_dev =3D pci_new_multifunction(-1, TYPE_PIIX3_DEVICE); object_property_set_bool(OBJECT(pci_dev), "has-usb", machine_usb(machine), &error_abort); + object_property_set_bool(OBJECT(pci_dev), "has-acpi", + x86_machine_is_acpi_enabled(x86ms), + &error_abort); + qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100); + object_property_set_bool(OBJECT(pci_dev), "smm-enabled", + x86_machine_is_smm_enabled(x86ms), + &error_abort); dev =3D DEVICE(pci_dev); for (i =3D 0; i < ISA_NUM_IRQS; i++) { qdev_connect_gpio_out_named(dev, "isa-irqs", i, x86ms->gsi[i]); @@ -286,10 +292,10 @@ static void pc_init1(MachineState *machine, XEN_IOAPIC_NUM_PIRQS); } =20 - piix3_devfn =3D pci_dev->devfn; isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0")); rtc_state =3D ISA_DEVICE(object_resolve_path_component(OBJECT(pci_= dev), "rtc")); + piix4_pm =3D object_resolve_path_component(OBJECT(pci_dev), "pm"); dev =3D DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide= ")); pci_ide_create_devs(PCI_DEVICE(dev)); idebus[0] =3D qdev_get_child_bus(dev, "ide.0"); @@ -360,17 +366,9 @@ static void pc_init1(MachineState *machine, } #endif =20 - if (pcmc->pci_enabled && x86_machine_is_acpi_enabled(X86_MACHINE(pcms)= )) { - PCIDevice *piix4_pm; - + if (piix4_pm) { smi_irq =3D qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); - piix4_pm =3D pci_new(piix3_devfn + 3, TYPE_PIIX4_PM); - qdev_prop_set_uint32(DEVICE(piix4_pm), "smb_io_base", 0xb100); - qdev_prop_set_bit(DEVICE(piix4_pm), "smm-enabled", - x86_machine_is_smm_enabled(x86ms)); - pci_realize_and_unref(piix4_pm, pci_bus, &error_fatal); =20 - qdev_connect_gpio_out(DEVICE(piix4_pm), 0, x86ms->gsi[9]); qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_ir= q); pcms->smbus =3D I2C_BUS(qdev_get_child_bus(DEVICE(piix4_pm), "i2c"= )); /* TODO: Populate SPD eeprom data. */ @@ -382,7 +380,7 @@ static void pc_init1(MachineState *machine, object_property_allow_set_link, OBJ_PROP_LINK_STRONG); object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_P= ROP, - OBJECT(piix4_pm), &error_abort); + piix4_pm, &error_abort); } =20 if (machine->nvdimms_state->is_enabled) { diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index aebc0da23b..5b867df299 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -308,6 +308,18 @@ static void pci_piix3_realize(PCIDevice *dev, Error **= errp) return; } } + + /* Power Management */ + if (d->has_acpi) { + object_initialize_child(OBJECT(d), "pm", &d->pm, TYPE_PIIX4_PM); + qdev_prop_set_int32(DEVICE(&d->pm), "addr", dev->devfn + 3); + qdev_prop_set_uint32(DEVICE(&d->pm), "smb_io_base", d->smb_io_base= ); + qdev_prop_set_bit(DEVICE(&d->pm), "smm-enabled", d->smm_enabled); + if (!qdev_realize(DEVICE(&d->pm), BUS(pci_bus), errp)) { + return; + } + qdev_connect_gpio_out(DEVICE(&d->pm), 0, d->isa_irqs_in[9]); + } } =20 static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope) @@ -343,7 +355,10 @@ static void pci_piix3_init(Object *obj) } =20 static Property pci_piix3_props[] =3D { + DEFINE_PROP_UINT32("smb_io_base", PIIX3State, smb_io_base, 0), + DEFINE_PROP_BOOL("has-acpi", PIIX3State, has_acpi, true), DEFINE_PROP_BOOL("has-usb", PIIX3State, has_usb, true), + DEFINE_PROP_BOOL("smm-enabled", PIIX3State, smm_enabled, false), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index 1076df69ca..17ddb25afc 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -33,6 +33,7 @@ config PC87312 =20 config PIIX3 bool + select ACPI_PIIX4 select I8257 select IDE_PIIX select ISA_BUS --=20 MST