From nobody Mon Feb 9 16:00:04 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=kevinlocke.name ARC-Seal: i=1; a=rsa-sha256; t=1655055257; cv=none; d=zohomail.com; s=zohoarc; b=fAexs+kTaxzsQ/hKbiwQJcJVqi35v/h4qsV5UN4bw+rlTUkKPZWGaB4ISO7RwHgmdy/8VJI0VtbV4wglTxBmCzPztqAMhtxHpDq/OdrS75pCY8t59rrGMhZQXC4tTqx/5nrmvLCUqcUWoa+p0RF/Nsj0OcIAFZMnxUgnvZKJAqA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1655055257; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=s4e6iJUqWVz2F6JGkuFBsTe7/I4WAD09xSprDuANAg4=; b=n2yvd3G1YOAk3+0qlcgrIqyb3jKVOvPIN19BfYHdOE08DG+27Rzpq3/w2cLd40PqQIvbYvKhQFgcX7dvr51wxX9+jNquPlukYfPgOx7ASH6c52YC5vRLfxkoMshJwX0Z+Nhr5MfcZRPOAity16S/yMHuCGIah6TDk6ZHHZczl/4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1655055257746791.8567736833597; Sun, 12 Jun 2022 10:34:17 -0700 (PDT) Received: from localhost ([::1]:33574 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o0RTb-0001AE-R4 for importer@patchew.org; Sun, 12 Jun 2022 13:34:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40702) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o0RS3-0000Qi-Gg for qemu-devel@nongnu.org; Sun, 12 Jun 2022 13:32:39 -0400 Received: from vulcan.kevinlocke.name ([2001:19f0:5:727:1e84:17da:7c52:5ab4]:49037) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o0RS1-0000Nd-CL for qemu-devel@nongnu.org; Sun, 12 Jun 2022 13:32:39 -0400 Received: from kevinolos.kevinlocke.name (unknown [69.145.56.143]) (Authenticated sender: kevin@kevinlocke.name) by vulcan.kevinlocke.name (Postfix) with ESMTPSA id C3FD52F11BED; Sun, 12 Jun 2022 17:32:30 +0000 (UTC) Received: by kevinolos.kevinlocke.name (Postfix, from userid 1000) id 578D01300161; Sun, 12 Jun 2022 11:32:18 -0600 (MDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kevinlocke.name; s=vulcan; t=1655055152; bh=KKChsdFhL+9zZ35E9EUAJWuc5dncH0pRneEq0rRPU2s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ulXGR0tFYQaZd4LjNjrWpmMOMJ9yykR9J/F0p41d/t9JKf3r7e6A3T6ZivkcPQG7v FoDaX2SlUwimPekYAn4HZEILcaGfyCvDjtzH9ArT4U4j3GV/W1ybyDlYW2AWzBCa0I 51UzPFja60lpVH1SY9fv19V8ho3NiQS4cROyeFJw= From: Kevin Locke To: qemu-devel@nongnu.org Cc: Laszlo Ersek , Alex Williamson , Marcel Apfelbaum , Laine Stump , David Gibson Subject: [PATCH v2] docs: add PCIe root bus for VGA compat guideline Date: Sun, 12 Jun 2022 11:32:03 -0600 Message-Id: X-Mailer: git-send-email 2.35.1 In-Reply-To: <922cc3081ff9c986188f881ef4d1cf15bd3adf48.1654739990.git.kevin@kevinlocke.name> References: <922cc3081ff9c986188f881ef4d1cf15bd3adf48.1654739990.git.kevin@kevinlocke.name> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:19f0:5:727:1e84:17da:7c52:5ab4; envelope-from=kevin@kevinlocke.name; helo=vulcan.kevinlocke.name X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @kevinlocke.name) X-ZM-MESSAGEID: 1655055259444100001 Content-Type: text/plain; charset="utf-8" PCI Express devices which use legacy VGA compatibility should be placed on the Root Complex. This simplifies ioport access to VGA registers, which requires use of a special exception bit to work across PCI(e) bridges. It is also necessary for ioport access to VESA BIOS Extension (VBE) registers, which is not forwarded over PCI(e) bridges, even with the special exception bit for VGA register access.[1] Update the PCI Express Guidelines to add these to the list of devices which can be placed directly on the Root Complex. Note that the only PCI Express display devices currently supported (bochs-display and virtio-gpu-pci) do not offer VGA compatibility. Legacy PCI devices (e.g. vga, qxl-vga, virtio-vga) are already documented as allowed on the Root Complex by the first item in the list. However, this item documents an additional consideration for placing devices which was not previously mentioned, and may be relevant for PCIe devices offering VGA compatibility in the future. [1]: https://mail.coreboot.org/hyperkitty/list/seabios@seabios.org/thread/X= G2RN3HKVRDEDTLA2PRELLIENIIH7II7/#XVP3I2KQVZHSTDA4SNVKOITWGRGSDU3F Signed-off-by: Laszlo Ersek Signed-off-by: Kevin Locke --- Changes since v1: * Replace my overly-broad exception for devices requiring ioport access with a list item specifically for PCI Express devices offering VGA Compatibility provided by Laszlo Ersek. * Rewrite the commit message based on my improved understanding of the issue and the improved scope of the change. P.S. Let me know if the Signed-off-by tag is not appropriate for either of us. I'm not clear on the etiquette of including someone else's sign-off, but also don't want to misrepresent myself as the source of your work. docs/pcie.txt | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/docs/pcie.txt b/docs/pcie.txt index 89e3502075..59b26817f9 100644 --- a/docs/pcie.txt +++ b/docs/pcie.txt @@ -48,13 +48,17 @@ Place only the following kinds of devices directly on t= he Root Complex: strangely when PCI Express devices are integrated with the Root Complex. =20 - (2) PCI Express Root Ports (ioh3420), for starting exclusively PCI Exp= ress + (2) Assigned PCI Express GPUs that offer legacy VGA compatibility, and + that such compatibility is expected of (due to booting with SeaBIO= S, + or due to UEFI driver bugs or native OS driver bugs). + + (3) PCI Express Root Ports (ioh3420), for starting exclusively PCI Exp= ress hierarchies. =20 - (3) PCI Express to PCI Bridge (pcie-pci-bridge), for starting legacy P= CI + (4) PCI Express to PCI Bridge (pcie-pci-bridge), for starting legacy P= CI hierarchies. =20 - (4) Extra Root Complexes (pxb-pcie), if multiple PCI Express Root Buses + (5) Extra Root Complexes (pxb-pcie), if multiple PCI Express Root Buses are needed. =20 pcie.0 bus --=20 2.35.1