From nobody Tue Nov 18 09:08:18 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1609283661; cv=none; d=zohomail.com; s=zohoarc; b=QjLv6hKAs9D8V90HoIAbMEsbAx4TB+ua4IvntRx3IakxU197zC08HuVAPXQCTiR3RLPXEply7vm0QysYeVmsvFxmGzjHFuNCDj73FSDR5DCg5fLxDIHZc76uIxW4zBEqP5GF0kdZ6VPmnFz6io56tzG+pQw+FOYsY7sXcHQSpks= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1609283661; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=vAtjD/KSUgK+x2dVtRFxacjIt6Sp35D3XKrZ92aIeac=; b=TK67AZaWtGFhPbNso4je4sKGxp44KDTwFdeQmIwACpPMY7LGzqye1c2CwuirZIe6udwWaQk4DC5gD9DJcuwho7s3Rr48Zk1p6U0uPAAMZYYvNnGKwGduxlhUqCGRiZb8J0v14P+O0C44fVHn33PV+eSN9ixJdv3tyfjxs260stM= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1609283661416542.6720509424849; Tue, 29 Dec 2020 15:14:21 -0800 (PST) Received: from localhost ([::1]:49806 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kuOC4-0005aS-9C for importer@patchew.org; Tue, 29 Dec 2020 18:14:20 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53712) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kuO7u-0008Sy-Ax for qemu-devel@nongnu.org; Tue, 29 Dec 2020 18:10:02 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]:48958) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kuO7n-0006bi-8l for qemu-devel@nongnu.org; Tue, 29 Dec 2020 18:10:01 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 2AE667470EE; Wed, 30 Dec 2020 00:09:52 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 9D4837470E6; Wed, 30 Dec 2020 00:09:51 +0100 (CET) Message-Id: In-Reply-To: References: Subject: [PATCH 3/7] vt82c686: Move superio memory region to SuperIOConfig struct Date: Tue, 29 Dec 2020 23:50:53 +0100 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Huacai Chen , f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Reply-to: BALATON Zoltan From: BALATON Zoltan via Content-Type: text/plain; charset="utf-8" The superio memory region holds the io space index/data registers used to access the superio config registers that are implemented in struct SuperIOConfig. To keep these related things together move the memory region to SuperIOConfig and rename it accordingly. Also remove the unused data member of SuperIOConfig which is not needed as we store actual data values in the regs array. Signed-off-by: BALATON Zoltan --- hw/isa/vt82c686.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index a6f5a0843d..30fe02f4c6 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -29,12 +29,11 @@ typedef struct SuperIOConfig { uint8_t regs[0x100]; uint8_t index; - uint8_t data; + MemoryRegion io; } SuperIOConfig; =20 struct VT82C686BISAState { PCIDevice dev; - MemoryRegion superio; SuperIOConfig superio_cfg; }; =20 @@ -128,8 +127,9 @@ static void vt82c686b_write_config(PCIDevice *d, uint32= _t addr, =20 trace_via_isa_write(addr, val, len); pci_default_write_config(d, addr, val, len); - if (addr =3D=3D 0x85) { /* enable or disable super IO configure */ - memory_region_set_enabled(&s->superio, val & 0x2); + if (addr =3D=3D 0x85) { + /* BIT(1): enable or disable superio config io ports */ + memory_region_set_enabled(&s->superio_cfg.io, val & BIT(1)); } } =20 @@ -311,15 +311,15 @@ static void vt82c686b_realize(PCIDevice *d, Error **e= rrp) } } =20 - memory_region_init_io(&s->superio, OBJECT(d), &superio_cfg_ops, - &s->superio_cfg, "superio", 2); - memory_region_set_enabled(&s->superio, false); + memory_region_init_io(&s->superio_cfg.io, OBJECT(d), &superio_cfg_ops, + &s->superio_cfg, "superio_cfg", 2); + memory_region_set_enabled(&s->superio_cfg.io, false); /* * The floppy also uses 0x3f0 and 0x3f1. * But we do not emulate a floppy, so just set it here. */ memory_region_add_subregion(isa_bus->address_space_io, 0x3f0, - &s->superio); + &s->superio_cfg.io); } =20 static void via_class_init(ObjectClass *klass, void *data) --=20 2.21.3