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Thu, 28 Sep 2023 18:42:08 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1695919335; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type; bh=ETQ4Pkv90xdeE68+qtj2nVNmslQVpcD3SDdJPZ8eTJ0=; b=WBmMc9qqp4Yqy2zUM5gAmZiMfvccqiK+tbFdtLnvMBTf/2r8fVd72FTpXojOrinNBXmK98 HJQf7i54XCLDVUtifUfTbU7nLT2/DNRVQDjussZChLEDoXDG6M/yoCcmhHAgZ66Y7OMO91 B/yvtG/tIzGFiRx7ooZ7DCMekJ8Vrms= X-MC-Unique: bZpFvB9KOk2wGiTbO3LESw-1 Date: Thu, 28 Sep 2023 18:42:08 +0200 (CEST) From: Mikulas Patocka To: Richard Henderson , Yoshinori Sato , Magnus Damm cc: qemu-devel@nongnu.org Subject: [PATCH] target/sh4: fix crashes on signal delivery Message-ID: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.7 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=mpatocka@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1695919400368100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" sh4 uses gUSA (general UserSpace Atomicity) to provide atomicity on CPUs that don't have atomic instructions. A gUSA region that adds 1 to an atomic variable stored in @R2 looks like this: 4004b6: 03 c7 mova 4004c4 ,r0 4004b8: f3 61 mov r15,r1 4004ba: 09 00 nop 4004bc: fa ef mov #-6,r15 4004be: 22 63 mov.l @r2,r3 4004c0: 01 73 add #1,r3 4004c2: 32 22 mov.l r3,@r2 4004c4: 13 6f mov r1,r15 R0 contains a pointer to the end of the gUSA region R1 contains the saved stack pointer R15 contains negative length of the gUSA region When this region is interrupted by a signal, the kernel detects if R15 >=3D -128U. If yes, the kernel rolls back PC to the beginning of the region and restores SP by copying R1 to R15. The problem happens if we are interrupted by a signal at address 4004c4. R15 still holds the value -6, but the atomic value was already written by an instruction at address 4004c2. In this situation we can't undo the gUSA. The function unwind_gusa does nothing, the signal handler attempts to push a signal frame to the address -6 and crashes. This patch fixes it, so that if we are interrupted at the last instruction=20 in a gUSA region, we copy R1 to R15 to restore the correct stack pointer=20 and avoid crashing. There's another bug: if we are interrupted in a delay slot, we save the address of the instruction in the delay slot. We must save the address of the previous instruction. Signed-off-by: Mikulas Patocka Cc: qemu-stable@nongnu.org Reviewed-by: Richard Henderson Reviewed-by: Yoshinori Sato --- linux-user/sh4/signal.c | 8 ++++++++ 1 file changed, 8 insertions(+) Index: qemu/linux-user/sh4/signal.c =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- qemu.orig/linux-user/sh4/signal.c 2023-09-27 19:02:41.000000000 +0200 +++ qemu/linux-user/sh4/signal.c 2023-09-27 19:55:13.000000000 +0200 @@ -104,6 +104,14 @@ static void unwind_gusa(CPUSH4State *reg =20 /* Reset the SP to the saved version in R1. */ regs->gregs[15] =3D regs->gregs[1]; + } else if (regs->gregs[15] >=3D -128u && regs->pc =3D=3D regs->gregs[0= ]) { + /* If we are on the last instruction of a gUSA region, we must res= et + the SP, otherwise we would be pushing the signal context to + invalid memory. */ + regs->gregs[15] =3D regs->gregs[1]; + } else if (regs->flags & TB_FLAG_DELAY_SLOT) { + /* If we are in a delay slot, push the previous instruction. */ + regs->pc -=3D 2; } }