From nobody Mon Feb 9 06:49:35 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 150325180392028.292839070845957; Sun, 20 Aug 2017 10:56:43 -0700 (PDT) Received: from localhost ([::1]:43033 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1djUSo-0002Nc-Mh for importer@patchew.org; Sun, 20 Aug 2017 13:56:42 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39861) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1djUL0-00045a-3C for qemu-devel@nongnu.org; Sun, 20 Aug 2017 13:48:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1djUKw-00055i-Ul for qemu-devel@nongnu.org; Sun, 20 Aug 2017 13:48:38 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:27155) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1djUKw-000541-Eq; Sun, 20 Aug 2017 13:48:34 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id E09C1747DE0; Sun, 20 Aug 2017 19:48:31 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 54047747DC7; Sun, 20 Aug 2017 19:48:31 +0200 (CEST) Message-Id: In-Reply-To: References: From: BALATON Zoltan Date: Sun, 20 Aug 2017 19:23:05 +0200 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:738:2001:2001::2001 Subject: [Qemu-devel] [PATCH 07/15] ppc4xx_i2c: Move to hw/i2c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Francois Revol , Alexander Graf , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: BALATON Zoltan --- default-configs/ppc-softmmu.mak | 1 + default-configs/ppc64-softmmu.mak | 1 + default-configs/ppcemb-softmmu.mak | 1 + hw/i2c/Makefile.objs | 1 + hw/i2c/ppc4xx_i2c.c | 216 +++++++++++++++++++++++++++++++++= ++++ hw/ppc/Makefile.objs | 2 +- hw/ppc/ppc4xx_i2c.c | 216 ---------------------------------= ---- 7 files changed, 221 insertions(+), 217 deletions(-) create mode 100644 hw/i2c/ppc4xx_i2c.c delete mode 100644 hw/ppc/ppc4xx_i2c.c diff --git a/default-configs/ppc-softmmu.mak b/default-configs/ppc-softmmu.= mak index 1f1cd85..d4d44eb 100644 --- a/default-configs/ppc-softmmu.mak +++ b/default-configs/ppc-softmmu.mak @@ -3,6 +3,7 @@ include pci.mak include sound.mak include usb.mak +CONFIG_PPC4XX=3Dy CONFIG_ESCC=3Dy CONFIG_M48T59=3Dy CONFIG_SERIAL=3Dy diff --git a/default-configs/ppc64-softmmu.mak b/default-configs/ppc64-soft= mmu.mak index 46c9599..af32589 100644 --- a/default-configs/ppc64-softmmu.mak +++ b/default-configs/ppc64-softmmu.mak @@ -3,6 +3,7 @@ include pci.mak include sound.mak include usb.mak +CONFIG_PPC4XX=3Dy CONFIG_VIRTIO_VGA=3Dy CONFIG_ESCC=3Dy CONFIG_M48T59=3Dy diff --git a/default-configs/ppcemb-softmmu.mak b/default-configs/ppcemb-so= ftmmu.mak index 94340de..635923a 100644 --- a/default-configs/ppcemb-softmmu.mak +++ b/default-configs/ppcemb-softmmu.mak @@ -3,6 +3,7 @@ include pci.mak include sound.mak include usb.mak +CONFIG_PPC4XX=3Dy CONFIG_M48T59=3Dy CONFIG_SERIAL=3Dy CONFIG_SERIAL_ISA=3Dy diff --git a/hw/i2c/Makefile.objs b/hw/i2c/Makefile.objs index a081b8e..0594dea 100644 --- a/hw/i2c/Makefile.objs +++ b/hw/i2c/Makefile.objs @@ -8,3 +8,4 @@ common-obj-$(CONFIG_EXYNOS4) +=3D exynos4210_i2c.o common-obj-$(CONFIG_IMX_I2C) +=3D imx_i2c.o common-obj-$(CONFIG_ASPEED_SOC) +=3D aspeed_i2c.o obj-$(CONFIG_OMAP) +=3D omap_i2c.o +obj-$(CONFIG_PPC4XX) +=3D ppc4xx_i2c.o diff --git a/hw/i2c/ppc4xx_i2c.c b/hw/i2c/ppc4xx_i2c.c new file mode 100644 index 0000000..5a6bde9 --- /dev/null +++ b/hw/i2c/ppc4xx_i2c.c @@ -0,0 +1,216 @@ +/* + * PPC4xx I2C controller emulation + * + * Copyright (c) 2007 Jocelyn Mayer + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu-common.h" +#include "cpu.h" +#include "hw/hw.h" +#include "hw/i2c/ppc4xx_i2c.h" + +/*#define DEBUG_I2C*/ + +#define PPC4xx_I2C_MEM_SIZE 0x11 + +static uint64_t ppc4xx_i2c_readb(void *opaque, hwaddr addr, unsigned int s= ize) +{ + PPC4xxI2CState *i2c =3D PPC4xx_I2C(opaque); + uint64_t ret; + +#ifdef DEBUG_I2C + printf("%s: addr " TARGET_FMT_plx "\n", __func__, addr); +#endif + switch (addr) { + case 0x00: + /*i2c_readbyte(&i2c->mdata);*/ + ret =3D i2c->mdata; + break; + case 0x02: + ret =3D i2c->sdata; + break; + case 0x04: + ret =3D i2c->lmadr; + break; + case 0x05: + ret =3D i2c->hmadr; + break; + case 0x06: + ret =3D i2c->cntl; + break; + case 0x07: + ret =3D i2c->mdcntl; + break; + case 0x08: + ret =3D i2c->sts; + break; + case 0x09: + ret =3D i2c->extsts; + break; + case 0x0A: + ret =3D i2c->lsadr; + break; + case 0x0B: + ret =3D i2c->hsadr; + break; + case 0x0C: + ret =3D i2c->clkdiv; + break; + case 0x0D: + ret =3D i2c->intrmsk; + break; + case 0x0E: + ret =3D i2c->xfrcnt; + break; + case 0x0F: + ret =3D i2c->xtcntlss; + break; + case 0x10: + ret =3D i2c->directcntl; + break; + default: + ret =3D 0x00; + break; + } +#ifdef DEBUG_I2C + printf("%s: addr " TARGET_FMT_plx " %02" PRIx64 "\n", __func__, addr, = ret); +#endif + + return ret; +} + +static void ppc4xx_i2c_writeb(void *opaque, hwaddr addr, uint64_t value, + unsigned int size) +{ + PPC4xxI2CState *i2c =3D opaque; +#ifdef DEBUG_I2C + printf("%s: addr " TARGET_FMT_plx " val %08" PRIx64 "\n", + __func__, addr, value); +#endif + switch (addr) { + case 0x00: + i2c->mdata =3D value; + /*i2c_sendbyte(&i2c->mdata);*/ + break; + case 0x02: + i2c->sdata =3D value; + break; + case 0x04: + i2c->lmadr =3D value; + break; + case 0x05: + i2c->hmadr =3D value; + break; + case 0x06: + i2c->cntl =3D value; + break; + case 0x07: + i2c->mdcntl =3D value & 0xDF; + break; + case 0x08: + i2c->sts &=3D ~(value & 0x0A); + break; + case 0x09: + i2c->extsts &=3D ~(value & 0x8F); + break; + case 0x0A: + i2c->lsadr =3D value; + break; + case 0x0B: + i2c->hsadr =3D value; + break; + case 0x0C: + i2c->clkdiv =3D value; + break; + case 0x0D: + i2c->intrmsk =3D value; + break; + case 0x0E: + i2c->xfrcnt =3D value & 0x77; + break; + case 0x0F: + i2c->xtcntlss =3D value; + break; + case 0x10: + i2c->directcntl =3D value & 0x7; + break; + } +} + +static const MemoryRegionOps ppc4xx_i2c_ops =3D { + .read =3D ppc4xx_i2c_readb, + .write =3D ppc4xx_i2c_writeb, + .valid.min_access_size =3D 1, + .valid.max_access_size =3D 4, + .impl.min_access_size =3D 1, + .impl.max_access_size =3D 1, + .endianness =3D DEVICE_NATIVE_ENDIAN, +}; + +static void ppc4xx_i2c_reset(DeviceState *s) +{ + PPC4xxI2CState *i2c =3D PPC4xx_I2C(s); + + i2c->mdata =3D 0x00; + i2c->sdata =3D 0x00; + i2c->cntl =3D 0x00; + i2c->mdcntl =3D 0x00; + i2c->sts =3D 0x00; + i2c->extsts =3D 0x00; + i2c->clkdiv =3D 0x00; + i2c->xfrcnt =3D 0x00; + i2c->directcntl =3D 0x0F; +} + +static void ppc4xx_i2c_init(Object *o) +{ + PPC4xxI2CState *s =3D PPC4xx_I2C(o); + + memory_region_init_io(&s->iomem, OBJECT(s), &ppc4xx_i2c_ops, s, + TYPE_PPC4xx_I2C, PPC4xx_I2C_MEM_SIZE); + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem); + sysbus_init_irq(SYS_BUS_DEVICE(s), &s->irq); + s->bus =3D i2c_init_bus(DEVICE(s), "i2c"); +} + +static void ppc4xx_i2c_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->reset =3D ppc4xx_i2c_reset; +} + +static const TypeInfo ppc4xx_i2c_type_info =3D { + .name =3D TYPE_PPC4xx_I2C, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(PPC4xxI2CState), + .instance_init =3D ppc4xx_i2c_init, + .class_init =3D ppc4xx_i2c_class_init, +}; + +static void ppc4xx_i2c_register_types(void) +{ + type_register_static(&ppc4xx_i2c_type_info); +} + +type_init(ppc4xx_i2c_register_types) diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs index 2077216..7efc686 100644 --- a/hw/ppc/Makefile.objs +++ b/hw/ppc/Makefile.objs @@ -13,7 +13,7 @@ endif obj-$(CONFIG_PSERIES) +=3D spapr_rtas_ddw.o # PowerPC 4xx boards obj-y +=3D ppc405_boards.o ppc4xx_devs.o ppc405_uc.o ppc440_bamboo.o -obj-y +=3D ppc4xx_pci.o ppc4xx_i2c.o +obj-y +=3D ppc4xx_pci.o # PReP obj-$(CONFIG_PREP) +=3D prep.o obj-$(CONFIG_PREP) +=3D prep_systemio.o diff --git a/hw/ppc/ppc4xx_i2c.c b/hw/ppc/ppc4xx_i2c.c deleted file mode 100644 index 5a6bde9..0000000 --- a/hw/ppc/ppc4xx_i2c.c +++ /dev/null @@ -1,216 +0,0 @@ -/* - * PPC4xx I2C controller emulation - * - * Copyright (c) 2007 Jocelyn Mayer - * - * Permission is hereby granted, free of charge, to any person obtaining a= copy - * of this software and associated documentation files (the "Software"), t= o deal - * in the Software without restriction, including without limitation the r= ights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included= in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN - * THE SOFTWARE. - */ - -#include "qemu/osdep.h" -#include "qapi/error.h" -#include "qemu-common.h" -#include "cpu.h" -#include "hw/hw.h" -#include "hw/i2c/ppc4xx_i2c.h" - -/*#define DEBUG_I2C*/ - -#define PPC4xx_I2C_MEM_SIZE 0x11 - -static uint64_t ppc4xx_i2c_readb(void *opaque, hwaddr addr, unsigned int s= ize) -{ - PPC4xxI2CState *i2c =3D PPC4xx_I2C(opaque); - uint64_t ret; - -#ifdef DEBUG_I2C - printf("%s: addr " TARGET_FMT_plx "\n", __func__, addr); -#endif - switch (addr) { - case 0x00: - /*i2c_readbyte(&i2c->mdata);*/ - ret =3D i2c->mdata; - break; - case 0x02: - ret =3D i2c->sdata; - break; - case 0x04: - ret =3D i2c->lmadr; - break; - case 0x05: - ret =3D i2c->hmadr; - break; - case 0x06: - ret =3D i2c->cntl; - break; - case 0x07: - ret =3D i2c->mdcntl; - break; - case 0x08: - ret =3D i2c->sts; - break; - case 0x09: - ret =3D i2c->extsts; - break; - case 0x0A: - ret =3D i2c->lsadr; - break; - case 0x0B: - ret =3D i2c->hsadr; - break; - case 0x0C: - ret =3D i2c->clkdiv; - break; - case 0x0D: - ret =3D i2c->intrmsk; - break; - case 0x0E: - ret =3D i2c->xfrcnt; - break; - case 0x0F: - ret =3D i2c->xtcntlss; - break; - case 0x10: - ret =3D i2c->directcntl; - break; - default: - ret =3D 0x00; - break; - } -#ifdef DEBUG_I2C - printf("%s: addr " TARGET_FMT_plx " %02" PRIx64 "\n", __func__, addr, = ret); -#endif - - return ret; -} - -static void ppc4xx_i2c_writeb(void *opaque, hwaddr addr, uint64_t value, - unsigned int size) -{ - PPC4xxI2CState *i2c =3D opaque; -#ifdef DEBUG_I2C - printf("%s: addr " TARGET_FMT_plx " val %08" PRIx64 "\n", - __func__, addr, value); -#endif - switch (addr) { - case 0x00: - i2c->mdata =3D value; - /*i2c_sendbyte(&i2c->mdata);*/ - break; - case 0x02: - i2c->sdata =3D value; - break; - case 0x04: - i2c->lmadr =3D value; - break; - case 0x05: - i2c->hmadr =3D value; - break; - case 0x06: - i2c->cntl =3D value; - break; - case 0x07: - i2c->mdcntl =3D value & 0xDF; - break; - case 0x08: - i2c->sts &=3D ~(value & 0x0A); - break; - case 0x09: - i2c->extsts &=3D ~(value & 0x8F); - break; - case 0x0A: - i2c->lsadr =3D value; - break; - case 0x0B: - i2c->hsadr =3D value; - break; - case 0x0C: - i2c->clkdiv =3D value; - break; - case 0x0D: - i2c->intrmsk =3D value; - break; - case 0x0E: - i2c->xfrcnt =3D value & 0x77; - break; - case 0x0F: - i2c->xtcntlss =3D value; - break; - case 0x10: - i2c->directcntl =3D value & 0x7; - break; - } -} - -static const MemoryRegionOps ppc4xx_i2c_ops =3D { - .read =3D ppc4xx_i2c_readb, - .write =3D ppc4xx_i2c_writeb, - .valid.min_access_size =3D 1, - .valid.max_access_size =3D 4, - .impl.min_access_size =3D 1, - .impl.max_access_size =3D 1, - .endianness =3D DEVICE_NATIVE_ENDIAN, -}; - -static void ppc4xx_i2c_reset(DeviceState *s) -{ - PPC4xxI2CState *i2c =3D PPC4xx_I2C(s); - - i2c->mdata =3D 0x00; - i2c->sdata =3D 0x00; - i2c->cntl =3D 0x00; - i2c->mdcntl =3D 0x00; - i2c->sts =3D 0x00; - i2c->extsts =3D 0x00; - i2c->clkdiv =3D 0x00; - i2c->xfrcnt =3D 0x00; - i2c->directcntl =3D 0x0F; -} - -static void ppc4xx_i2c_init(Object *o) -{ - PPC4xxI2CState *s =3D PPC4xx_I2C(o); - - memory_region_init_io(&s->iomem, OBJECT(s), &ppc4xx_i2c_ops, s, - TYPE_PPC4xx_I2C, PPC4xx_I2C_MEM_SIZE); - sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem); - sysbus_init_irq(SYS_BUS_DEVICE(s), &s->irq); - s->bus =3D i2c_init_bus(DEVICE(s), "i2c"); -} - -static void ppc4xx_i2c_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc =3D DEVICE_CLASS(klass); - - dc->reset =3D ppc4xx_i2c_reset; -} - -static const TypeInfo ppc4xx_i2c_type_info =3D { - .name =3D TYPE_PPC4xx_I2C, - .parent =3D TYPE_SYS_BUS_DEVICE, - .instance_size =3D sizeof(PPC4xxI2CState), - .instance_init =3D ppc4xx_i2c_init, - .class_init =3D ppc4xx_i2c_class_init, -}; - -static void ppc4xx_i2c_register_types(void) -{ - type_register_static(&ppc4xx_i2c_type_info); -} - -type_init(ppc4xx_i2c_register_types) --=20 2.7.6