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Tsirkin" To: qemu-devel@nongnu.org Cc: Peter Maydell , Marcel Apfelbaum Subject: [PULL 10/19] Revert "pcie_sriov: Remove num_vfs from PCIESriovPF" Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Mailer: git-send-email 2.27.0.106.g8ac3dc51b1 X-Mutt-Fcc: =sent Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.126, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1722508721826116600 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This reverts commit cbd9e5120bac3e292eee77b7a2e3692f235a1a26. Signed-off-by: Michael S. Tsirkin --- include/hw/pci/pcie_sriov.h | 1 + hw/pci/pcie_sriov.c | 28 ++++++++-------------------- hw/pci/trace-events | 2 +- 3 files changed, 10 insertions(+), 21 deletions(-) diff --git a/include/hw/pci/pcie_sriov.h b/include/hw/pci/pcie_sriov.h index 5148c5b77d..70649236c1 100644 --- a/include/hw/pci/pcie_sriov.h +++ b/include/hw/pci/pcie_sriov.h @@ -16,6 +16,7 @@ #include "hw/pci/pci.h" =20 typedef struct PCIESriovPF { + uint16_t num_vfs; /* Number of virtual functions created */ uint8_t vf_bar_type[PCI_NUM_REGIONS]; /* Store type for each VF bar = */ PCIDevice **vf; /* Pointer to an array of num_vfs VF devices */ } PCIESriovPF; diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index fae6acea4a..9bd7f8acc3 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -57,6 +57,7 @@ bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, pcie_add_capability(dev, PCI_EXT_CAP_ID_SRIOV, 1, offset, PCI_EXT_CAP_SRIOV_SIZEOF); dev->exp.sriov_cap =3D offset; + dev->exp.sriov_pf.num_vfs =3D 0; dev->exp.sriov_pf.vf =3D NULL; =20 pci_set_word(cfg + PCI_SRIOV_VF_OFFSET, vf_offset); @@ -185,12 +186,6 @@ void pcie_sriov_vf_register_bar(PCIDevice *dev, int re= gion_num, } } =20 -static void clear_ctrl_vfe(PCIDevice *dev) -{ - uint8_t *ctrl =3D dev->config + dev->exp.sriov_cap + PCI_SRIOV_CTRL; - pci_set_word(ctrl, pci_get_word(ctrl) & ~PCI_SRIOV_CTRL_VFE); -} - static void register_vfs(PCIDevice *dev) { uint16_t num_vfs; @@ -200,7 +195,6 @@ static void register_vfs(PCIDevice *dev) assert(sriov_cap > 0); num_vfs =3D pci_get_word(dev->config + sriov_cap + PCI_SRIOV_NUM_VF); if (num_vfs > pci_get_word(dev->config + sriov_cap + PCI_SRIOV_TOTAL_V= F)) { - clear_ctrl_vfe(dev); return; } =20 @@ -209,18 +203,20 @@ static void register_vfs(PCIDevice *dev) for (i =3D 0; i < num_vfs; i++) { pci_set_enabled(dev->exp.sriov_pf.vf[i], true); } + dev->exp.sriov_pf.num_vfs =3D num_vfs; } =20 static void unregister_vfs(PCIDevice *dev) { + uint16_t num_vfs =3D dev->exp.sriov_pf.num_vfs; uint16_t i; - uint8_t *cfg =3D dev->config + dev->exp.sriov_cap; =20 trace_sriov_unregister_vfs(dev->name, PCI_SLOT(dev->devfn), - PCI_FUNC(dev->devfn)); - for (i =3D 0; i < pci_get_word(cfg + PCI_SRIOV_TOTAL_VF); i++) { + PCI_FUNC(dev->devfn), num_vfs); + for (i =3D 0; i < num_vfs; i++) { pci_set_enabled(dev->exp.sriov_pf.vf[i], false); } + dev->exp.sriov_pf.num_vfs =3D 0; } =20 void pcie_sriov_config_write(PCIDevice *dev, uint32_t address, @@ -246,9 +242,6 @@ void pcie_sriov_config_write(PCIDevice *dev, uint32_t a= ddress, } else { unregister_vfs(dev); } - } else if (range_covers_byte(off, len, PCI_SRIOV_NUM_VF)) { - clear_ctrl_vfe(dev); - unregister_vfs(dev); } } =20 @@ -311,7 +304,7 @@ PCIDevice *pcie_sriov_get_pf(PCIDevice *dev) PCIDevice *pcie_sriov_get_vf_at_index(PCIDevice *dev, int n) { assert(!pci_is_vf(dev)); - if (n < pcie_sriov_num_vfs(dev)) { + if (n < dev->exp.sriov_pf.num_vfs) { return dev->exp.sriov_pf.vf[n]; } return NULL; @@ -319,10 +312,5 @@ PCIDevice *pcie_sriov_get_vf_at_index(PCIDevice *dev, = int n) =20 uint16_t pcie_sriov_num_vfs(PCIDevice *dev) { - uint16_t sriov_cap =3D dev->exp.sriov_cap; - uint8_t *cfg =3D dev->config + sriov_cap; - - return sriov_cap && - (pci_get_word(cfg + PCI_SRIOV_CTRL) & PCI_SRIOV_CTRL_VFE) ? - pci_get_word(cfg + PCI_SRIOV_NUM_VF) : 0; + return dev->exp.sriov_pf.num_vfs; } diff --git a/hw/pci/trace-events b/hw/pci/trace-events index e98f575a9d..19643aa8c6 100644 --- a/hw/pci/trace-events +++ b/hw/pci/trace-events @@ -14,7 +14,7 @@ msix_write_config(char *name, bool enabled, bool masked) = "dev %s enabled %d mask =20 # hw/pci/pcie_sriov.c sriov_register_vfs(const char *name, int slot, int function, int num_vfs) = "%s %02x:%x: creating %d vf devs" -sriov_unregister_vfs(const char *name, int slot, int function) "%s %02x:%x= : Unregistering vf devs" +sriov_unregister_vfs(const char *name, int slot, int function, int num_vfs= ) "%s %02x:%x: Unregistering %d vf devs" sriov_config_write(const char *name, int slot, int fun, uint32_t offset, u= int32_t val, uint32_t len) "%s %02x:%x: sriov offset 0x%x val 0x%x len %d" =20 # pcie.c --=20 MST