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Tsirkin" To: qemu-devel@nongnu.org Cc: Peter Maydell , Shiju Jose , Jonathan Cameron , Markus Armbruster , Fan Ni , Eric Blake Subject: [PULL 06/51] hw/cxl/events: Update for rev3.2 common event record format Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Mailer: git-send-email 2.27.0.106.g8ac3dc51b1 X-Mutt-Fcc: =sent Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1770232191069158500 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shiju Jose CXL spec 3.2 section 8.2.9.2.1 Table 8-55, Common Event Record format has updated with optional Maintenance Operation Subclass, LD ID and ID of the device head information. Add updates for the above optional parameters in the related CXL events reporting and in the QMP commands to inject CXL events. Update all related specification references to CXL r3.2 to ensure one consistent source. Signed-off-by: Shiju Jose Signed-off-by: Jonathan Cameron Reviewed-by: Michael S. Tsirkin Acked-by: Markus Armbruster Signed-off-by: Michael S. Tsirkin Message-Id: <20260114142713.617806-3-Jonathan.Cameron@huawei.com> --- hw/cxl/cxl-events.c | 3 +- hw/cxl/cxl-mailbox-utils.c | 3 +- hw/mem/cxl_type3.c | 70 ++++++++++++++++++++++++++++++++----- hw/mem/cxl_type3_stubs.c | 24 +++++++++++-- include/hw/cxl/cxl_device.h | 7 +++- include/hw/cxl/cxl_events.h | 15 ++++++-- qapi/cxl.json | 21 ++++++++--- 7 files changed, 122 insertions(+), 21 deletions(-) diff --git a/hw/cxl/cxl-events.c b/hw/cxl/cxl-events.c index 7583dd9162..5356dfb5b3 100644 --- a/hw/cxl/cxl-events.c +++ b/hw/cxl/cxl-events.c @@ -271,7 +271,8 @@ void cxl_create_dc_event_records_for_extents(CXLType3De= v *ct3d, &dynamic_capacity_uuid, (1 << CXL_EVENT_TYPE_INFO), sizeof(event_rec), - cxl_device_get_timestamp(&ct3d->cxl_dstate)); + cxl_device_get_timestamp(&ct3d->cxl_dstate), + 0, 0, 0, 0, 0, 0, 0, 0); event_rec.type =3D type; event_rec.validity_flags =3D 1; event_rec.host_id =3D 0; diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index a4bd49e113..a64b8ba535 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -3994,7 +3994,8 @@ static CXLRetCode cmd_fm_set_dc_region_config(const s= truct cxl_cmd *cmd, &dynamic_capacity_uuid, (1 << CXL_EVENT_TYPE_INFO), sizeof(dcEvent), - cxl_device_get_timestamp(&ct3d->cxl_dstate)); + cxl_device_get_timestamp(&ct3d->cxl_dstate), + 0, 0, 0, 0, 0, 0, 0, 0); dcEvent.type =3D DC_EVENT_REGION_CONFIG_UPDATED; dcEvent.validity_flags =3D 1; dcEvent.host_id =3D 0; diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 7e309af935..e5248ba4b6 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -1662,12 +1662,39 @@ void qmp_cxl_inject_correctable_error(const char *p= ath, CxlCorErrorType type, =20 void cxl_assign_event_header(CXLEventRecordHdr *hdr, const QemuUUID *uuid, uint32_t flags, - uint8_t length, uint64_t timestamp) + uint8_t length, uint64_t timestamp, + bool has_maint_op_class, uint8_t maint_op_cla= ss, + bool has_maint_op_subclass, + uint8_t maint_op_subclass, + bool has_ld_id, uint16_t ld_id, + bool has_head_id, uint8_t head_id) { - st24_le_p(&hdr->flags, flags); hdr->length =3D length; memcpy(&hdr->id, uuid, sizeof(hdr->id)); stq_le_p(&hdr->timestamp, timestamp); + + if (has_maint_op_class) { + hdr->maint_op_class =3D maint_op_class; + } else { + hdr->maint_op_class =3D 0; + } + + if (has_maint_op_subclass) { + flags |=3D CXL_EVENT_REC_FLAGS_MAINT_OP_SUBCLASS_VALID; + hdr->maint_op_subclass =3D maint_op_subclass; + } + + if (has_ld_id) { + flags |=3D CXL_EVENT_REC_FLAGS_LD_ID_VALID; + stw_le_p(&hdr->ld_id, ld_id); + } + + if (has_head_id) { + flags |=3D CXL_EVENT_REC_FLAGS_HEAD_ID_VALID; + hdr->head_id =3D head_id; + } + + st24_le_p(&hdr->flags, flags); } =20 static const QemuUUID gen_media_uuid =3D { @@ -1776,7 +1803,13 @@ static void cxl_maintenance_insert(CXLType3Dev *ct3d= , uint64_t dpa, =20 /* Component ID is device specific. Define this as a string. */ void qmp_cxl_inject_general_media_event(const char *path, CxlEventLog log, - uint8_t flags, uint64_t dpa, + uint32_t flags, bool has_maint_op_= class, + uint8_t maint_op_class, + bool has_maint_op_subclass, + uint8_t maint_op_subclass, + bool has_ld_id, uint16_t ld_id, + bool has_head_id, uint8_t head_id, + uint64_t dpa, uint8_t descriptor, uint8_t type, uint8_t transaction_type, bool has_channel, uint8_t channel, @@ -1819,7 +1852,10 @@ void qmp_cxl_inject_general_media_event(const char *= path, CxlEventLog log, =20 memset(&gem, 0, sizeof(gem)); cxl_assign_event_header(hdr, &gen_media_uuid, flags, sizeof(gem), - cxl_device_get_timestamp(&ct3d->cxl_dstate)); + cxl_device_get_timestamp(&ct3d->cxl_dstate), + has_maint_op_class, maint_op_class, + has_maint_op_subclass, maint_op_subclass, + has_ld_id, ld_id, has_head_id, head_id); =20 stq_le_p(&gem.phys_addr, dpa); gem.descriptor =3D descriptor; @@ -1872,7 +1908,13 @@ void qmp_cxl_inject_general_media_event(const char *= path, CxlEventLog log, #define CXL_DRAM_VALID_COLUMN BIT(6) #define CXL_DRAM_VALID_CORRECTION_MASK BIT(7) =20 -void qmp_cxl_inject_dram_event(const char *path, CxlEventLog log, uint8_t = flags, +void qmp_cxl_inject_dram_event(const char *path, CxlEventLog log, + uint32_t flags, + bool has_maint_op_class, uint8_t maint_op_c= lass, + bool has_maint_op_subclass, + uint8_t maint_op_subclass, + bool has_ld_id, uint16_t ld_id, + bool has_head_id, uint8_t head_id, uint64_t dpa, uint8_t descriptor, uint8_t type, uint8_t transaction_type, bool has_channel, uint8_t channel, @@ -1920,7 +1962,10 @@ void qmp_cxl_inject_dram_event(const char *path, Cxl= EventLog log, uint8_t flags, =20 memset(&dram, 0, sizeof(dram)); cxl_assign_event_header(hdr, &dram_uuid, flags, sizeof(dram), - cxl_device_get_timestamp(&ct3d->cxl_dstate)); + cxl_device_get_timestamp(&ct3d->cxl_dstate), + has_maint_op_class, maint_op_class, + has_maint_op_subclass, maint_op_subclass, + has_ld_id, ld_id, has_head_id, head_id); stq_le_p(&dram.phys_addr, dpa); dram.descriptor =3D descriptor; dram.type =3D type; @@ -1991,7 +2036,13 @@ void qmp_cxl_inject_dram_event(const char *path, Cxl= EventLog log, uint8_t flags, } =20 void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log, - uint8_t flags, uint8_t type, + uint32_t flags, bool has_maint_op_= class, + uint8_t maint_op_class, + bool has_maint_op_subclass, + uint8_t maint_op_subclass, + bool has_ld_id, uint16_t ld_id, + bool has_head_id, uint8_t head_id, + uint8_t type, uint8_t health_status, uint8_t media_status, uint8_t additional_status, @@ -2030,7 +2081,10 @@ void qmp_cxl_inject_memory_module_event(const char *= path, CxlEventLog log, =20 memset(&module, 0, sizeof(module)); cxl_assign_event_header(hdr, &memory_module_uuid, flags, sizeof(module= ), - cxl_device_get_timestamp(&ct3d->cxl_dstate)); + cxl_device_get_timestamp(&ct3d->cxl_dstate), + has_maint_op_class, maint_op_class, + has_maint_op_subclass, maint_op_subclass, + has_ld_id, ld_id, has_head_id, head_id); =20 module.type =3D type; module.health_status =3D health_status; diff --git a/hw/mem/cxl_type3_stubs.c b/hw/mem/cxl_type3_stubs.c index c1a5e4a7c1..91b1478114 100644 --- a/hw/mem/cxl_type3_stubs.c +++ b/hw/mem/cxl_type3_stubs.c @@ -14,7 +14,13 @@ #include "qapi/qapi-commands-cxl.h" =20 void qmp_cxl_inject_general_media_event(const char *path, CxlEventLog log, - uint8_t flags, uint64_t dpa, + uint32_t flags, bool has_maint_op_= class, + uint8_t maint_op_class, + bool has_maint_op_subclass, + uint8_t maint_op_subclass, + bool has_ld_id, uint16_t ld_id, + bool has_head_id, uint8_t head_id, + uint64_t dpa, uint8_t descriptor, uint8_t type, uint8_t transaction_type, bool has_channel, uint8_t channel, @@ -23,7 +29,13 @@ void qmp_cxl_inject_general_media_event(const char *path= , CxlEventLog log, const char *component_id, Error **errp) {} =20 -void qmp_cxl_inject_dram_event(const char *path, CxlEventLog log, uint8_t = flags, +void qmp_cxl_inject_dram_event(const char *path, CxlEventLog log, + uint32_t flags, + bool has_maint_op_class, uint8_t maint_op_c= lass, + bool has_maint_op_subclass, + uint8_t maint_op_subclass, + bool has_ld_id, uint16_t ld_id, + bool has_head_id, uint8_t head_id, uint64_t dpa, uint8_t descriptor, uint8_t type, uint8_t transaction_type, bool has_channel, uint8_t channel, @@ -38,7 +50,13 @@ void qmp_cxl_inject_dram_event(const char *path, CxlEven= tLog log, uint8_t flags, Error **errp) {} =20 void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log, - uint8_t flags, uint8_t type, + uint32_t flags, bool has_maint_op_= class, + uint8_t maint_op_class, + bool has_maint_op_subclass, + uint8_t maint_op_subclass, + bool has_ld_id, uint16_t ld_id, + bool has_head_id, uint8_t head_id, + uint8_t type, uint8_t health_status, uint8_t media_status, uint8_t additional_status, diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index 55797a9ec3..d5906afb19 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -868,7 +868,12 @@ bool ct3_test_region_block_backed(CXLType3Dev *ct3d, u= int64_t dpa, uint64_t len); void cxl_assign_event_header(CXLEventRecordHdr *hdr, const QemuUUID *uuid, uint32_t flags, - uint8_t length, uint64_t timestamp); + uint8_t length, uint64_t timestamp, + bool has_maint_op_class, uint8_t maint_op_cla= ss, + bool has_maint_op_subclass, + uint8_t maint_op_subclass, + bool has_ld_id, uint16_t ld_id, + bool has_head_id, uint8_t head_id); void cxl_create_dc_event_records_for_extents(CXLType3Dev *ct3d, CXLDCEventType type, CXLDCExtentRaw extents[], diff --git a/include/hw/cxl/cxl_events.h b/include/hw/cxl/cxl_events.h index 8a660c7a62..a88fbab751 100644 --- a/include/hw/cxl/cxl_events.h +++ b/include/hw/cxl/cxl_events.h @@ -29,9 +29,15 @@ typedef enum CXLEventLogType { =20 /* * Common Event Record Format - * CXL r3.1 section 8.2.9.2.1: Event Records; Table 8-43 + * CXL r3.2 section 8.2.10.2.1: Event Records; Table 8-55 */ -#define CXL_EVENT_REC_HDR_RES_LEN 0xf +#define CXL_EVENT_REC_FLAGS_PERMANENT_COND BIT(2) +#define CXL_EVENT_REC_FLAGS_MAINT_NEEDED BIT(3) +#define CXL_EVENT_REC_FLAGS_PERF_DEGRADED BIT(4) +#define CXL_EVENT_REC_FLAGS_HW_REPLACEMENT_NEEDED BIT(5) +#define CXL_EVENT_REC_FLAGS_MAINT_OP_SUBCLASS_VALID BIT(6) +#define CXL_EVENT_REC_FLAGS_LD_ID_VALID BIT(7) +#define CXL_EVENT_REC_FLAGS_HEAD_ID_VALID BIT(8) typedef struct CXLEventRecordHdr { QemuUUID id; uint8_t length; @@ -40,7 +46,10 @@ typedef struct CXLEventRecordHdr { uint16_t related_handle; uint64_t timestamp; uint8_t maint_op_class; - uint8_t reserved[CXL_EVENT_REC_HDR_RES_LEN]; + uint8_t maint_op_subclass; + uint16_t ld_id; + uint8_t head_id; + uint8_t reserved[0xb]; } QEMU_PACKED CXLEventRecordHdr; =20 #define CXL_EVENT_RECORD_DATA_LENGTH 0x50 diff --git a/qapi/cxl.json b/qapi/cxl.json index 55a088586e..82001c0591 100644 --- a/qapi/cxl.json +++ b/qapi/cxl.json @@ -33,20 +33,33 @@ ## # @CXLCommonEventBase: # -# Common event base for a CXL Event (CXL r3.0 8.2.9.2.1 -# Table 8-42 Common Event Record Format). +# Common event base for a CXL Event (CXL r3.2 8.2.10.2.1 +# Table 8-55 Common Event Record Format). # # @path: CXL type 3 device canonical QOM path # # @log: event log to add the event to # -# @flags: Event Record Flags. See CXL r3.0 Table 8-42 Common Event +# @flags: Event Record Flags. See CXL r3.2 Table 8-55 Common Event # Record Format, Event Record Flags for subfield definitions. # +# @maint-op-class: Maintenance operation class the device requests to +# initiate. +# +# @maint-op-subclass: Maintenance operation subclass the device +# requests to initiate. +# +# @ld-id: Logical Device (LD) ID of LD from where the event +# originated. +# +# @head-id: ID of the device head from where the event originated. +# # Since: 8.1 ## { 'struct': 'CXLCommonEventBase', - 'data': { 'path': 'str', 'log': 'CxlEventLog', 'flags': 'uint8' } } + 'data': { 'path': 'str', 'log': 'CxlEventLog', 'flags': 'uint32', + '*maint-op-class':'uint8', '*maint-op-subclass':'uint8', + '*ld-id':'uint16', '*head-id':'uint8' } } =20 ## # @CXLGeneralMediaEvent: --=20 MST