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bh=Qr4LxFhzKN7PRWdcb8mdVTFUALkjEPigd4DmsAECq8A=; b=e4u5rO4R3OZpoWeoX5EvYtVweQ4h/aLyNsn9VdzsN+I+8zzd8MyaC/TDNCCy0Cmb8UZbUmtqUIGQ0I0G/t4VCUoL84KnslvXuUKAUvb8pv78MSRr1X5s8qkqjmD6vkjgOWXbXhS75z29zsiBFp5Y65Ytx9L+9pQwFa1UvYqCHGFFdZjy8oWrMs4NlMJCh0hx1RX5V6S+l1r7u1dzUUrTmZS7JAp1dOTEybabirerbTp68wT7IklPSmw/kp3AJN34ScsYB20txN5uwb7fLrNqYgTJEpAWwnspDZDBfRk3f7Uj6q+yRo4L1dnkj/3gaDGMz/x6CdvIpmGhyf3B3/cgQw== From: andrew Yuan To: "philmd@linaro.org" , "edgar.iglesias@gmail.com" , "alistair@alistair23.me" , "jasowang@redhat.com" , "peter.maydell@linaro.org" , "qemu-arm@nongnu.org" , "qemu-devel@nongnu.org" Subject: =?utf-8?B?562U5aSNOiBbUEFUQ0ggdjJdIGh3L25ldDogY2FkZW5jZV9nZW06IGZlYXQ6?= =?utf-8?B?IGFkZCBsb2dpYyBmb3IgdGhlIERJU0FCTEVfTUFTSyBiaXQgaW4gdHlwZTJf?= =?utf-8?B?Y29tcGFyZV94X3dvcmRfMQ==?= Thread-Topic: [PATCH v2] hw/net: cadence_gem: feat: add logic for the DISABLE_MASK bit in type2_compare_x_word_1 Thread-Index: AQHbUcg3/1u76TWO1kOYcgQ8V7PmPbLs7yhQ Date: Thu, 19 Dec 2024 03:53:53 +0000 Message-ID: References: <20241219034304.747-1-andrew.yuan@jaguarmicro.com> In-Reply-To: <20241219034304.747-1-andrew.yuan@jaguarmicro.com> Accept-Language: en-US Content-Language: zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=jaguarmicro.com; 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envelope-from=andrew.yuan@jaguarmicro.com; helo=APC01-TYZ-obe.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @jaguarmicro.com) X-ZM-MESSAGEID: 1734580498838116600 Sorry, I made a mistake. I sent an incorrect patch. Suggested-by: Philippe Mathieu-Daud=C3=A9 -----=E9=82=AE=E4=BB=B6=E5=8E=9F=E4=BB=B6----- =E5=8F=91=E4=BB=B6=E4=BA=BA: andrew Yuan =20 =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2024=E5=B9=B412=E6=9C=8819=E6=97=A5 1= 1:43 =E6=94=B6=E4=BB=B6=E4=BA=BA: philmd@linaro.org; edgar.iglesias@gmail.com; a= listair@alistair23.me; jasowang@redhat.com; peter.maydell@linaro.org; qemu-= arm@nongnu.org; qemu-devel@nongnu.org =E6=8A=84=E9=80=81: andrew Yuan =E4=B8=BB=E9=A2=98: [PATCH v2] hw/net: cadence_gem: feat: add logic for the= DISABLE_MASK bit in type2_compare_x_word_1 From: Andrew Yuan As in the Cadence IP for Gigabit Ethernet MAC Part Number: IP7014 IP Rev: R= 1p12 - Doc Rev: 1.3 User Guide, if the DISABLE_MASK bit in type2_compare_x_= word_1 is set, mask_value in type2_compare_x_word_0 is used as an additiona= l 2 byte Compare Value Signed-off-by: Andrew Yuan Suggested-by: Philippe Mathieu-Daud=C3=A9 --- hw/net/cadence_gem.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 3fce01315f..= 897331c5ef 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c @@ -909,8 +909,8 @@ static int get_queue_from_screen(CadenceGEMState *s, ui= nt8_t *rxbuf_ptr, =20 /* Compare A, B, C */ for (j =3D 0; j < 3; j++) { - uint32_t cr0, cr1, mask, compare; - uint16_t rx_cmp; + uint32_t cr0, cr1, mask, compare, disable_mask; + uint32_t rx_cmp; int offset; int cr_idx =3D extract32(reg, R_SCREENING_TYPE2_REG0_COMPARE_A= _SHIFT + j * 6, R_SCREENING_TYPE2_REG0_COMPARE_A_LENGTH= ); @@ -946,9 +946,23 @@ static int get_queue_from_screen(CadenceGEMState *s, u= int8_t *rxbuf_ptr, break; } =20 - rx_cmp =3D rxbuf_ptr[offset] << 8 | rxbuf_ptr[offset]; - mask =3D FIELD_EX32(cr0, TYPE2_COMPARE_0_WORD_0, MASK_VALUE); - compare =3D FIELD_EX32(cr0, TYPE2_COMPARE_0_WORD_0, COMPARE_VA= LUE); + disable_mask =3D + FIELD_EX32(cr1, TYPE2_COMPARE_0_WORD_1, DISABLE_MASK); + if (disable_mask) { + /* + * If disable_mask is set, + * mask_value is used as an additional 2 byte Compare Valu= e. + * To simple, set mask =3D 0xFFFFFFFF, if disable_mask is = set. + */ + rx_cmp =3D ldl_le_p(rxbuf_ptr[offset]); + mask =3D 0xFFFFFFFF; + compare =3D cr0; + } else { + rx_cmp =3D lduw_le_p(rxbuf_ptr[offset]); + mask =3D FIELD_EX32(cr0, TYPE2_COMPARE_0_WORD_0, MASK_VALU= E); + compare =3D + FIELD_EX32(cr0, TYPE2_COMPARE_0_WORD_0, COMPARE_VALUE); + } =20 if ((rx_cmp & mask) =3D=3D (compare & mask)) { matched =3D true; -- 2.25.1