From nobody Sat Apr 27 15:41:07 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1605540672; cv=none; d=zohomail.com; s=zohoarc; b=SPuEOL+52K5fvH5zAs/cjsBICR4MqMf67E67j2l9yrgB7wygcI9Ws/ceH4YIYWegtGXSuWsRUTbq7p1mFvVXCsAaYlq0kxNs+I9Qnj4vpuupbMPXTqNb5fT99LolR0GxuVxml8pc0MOzmeI8yYGKfiUHcCIrIRax46RXTV83WCw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1605540672; h=Content-Type:Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:To; bh=2OeIXsCueKgeot6j8X63ZcWV9rbNFM0cnVvrMjCk3IM=; b=cr8F+CMJwen0/PVTIXLxyHiDRd8bd2npV8oacPIi5lzZh+davlAz6Itm4ZOa+ZmUZ+y6t4EUpKFw8ku1KmH+KDvUtLpTawHPJQCfNFLok0NMGodAEKi4/a88QbFy0ZMOhUf55zTdff3FaC1R8bgztm3f0ZwuoYChwfl/VxNLRk0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1605540672576260.9088415839867; Mon, 16 Nov 2020 07:31:12 -0800 (PST) Received: from localhost ([::1]:50348 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kegTG-00063L-Gd for importer@patchew.org; Mon, 16 Nov 2020 10:31:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:41102) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kegAl-0008Nz-Cm; Mon, 16 Nov 2020 10:12:04 -0500 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:37631) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kegAi-0004g7-Va; Mon, 16 Nov 2020 10:12:03 -0500 Received: by mail-wr1-x444.google.com with SMTP id b6so19069561wrt.4; Mon, 16 Nov 2020 07:11:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:from:date:message-id:subject:to:cc; bh=2OeIXsCueKgeot6j8X63ZcWV9rbNFM0cnVvrMjCk3IM=; b=S+XrU/b8s498aNSbtZfj397Jgbv2PahWOgjrrTx9LjGRHYk+P8gqSNHMmpYN2/z6Gv MvdVFa1DfAbiTxFqPo0vlN3QCM9QlsNCLaZ+6WrsmeErkX9uMP6LOKVUt66TpovZJxfA 9Al/sRpSOpECnojtPrgXKzaT8Yc9ZS5dVbdx9GCxntzHuVeoeUhnyWsRwjFkD7bhxbPr kBf+nt/JAYp1IKWAUMWox/slU8daJeMCHB5b6h/ZncbF4Km5QPX0tYlyS2o/3pnZMDxj tvXHTUYl1Js/7BQ9aXhFcB4ItqcEACudTbuLRdm3Zkt02ZFMkittPHkemr94//LdbrA/ FX+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to:cc; bh=2OeIXsCueKgeot6j8X63ZcWV9rbNFM0cnVvrMjCk3IM=; b=HS2Zn2WZyyChZCynMHGTAmqwRI6E7IBnCzg7m41DQqGrydsmpQEZFFD7EA82a/HK0Z 9X1k5FmeyGTx7hio/Lkxz8jfJJ41WQ4eCYnt+glzmhNueeydyrl7VGDrbVHKbqkeMcXR q82IvPeGHsHCyM4T11mmiDC8lzzqrDlnTZjjNFRGSDo0VhwlEAOJSv/RHLdHRS+k4j2s aYOnKc+yZR+Z3B+gLSwfzPddfsF3xhPvPUHjTiAYbFrEh9n/32THwnDqvSkcUrENMbbL qkNd+1L5vyXuJC7AvgaSM3xTjVRxC1/m2kyRCCpbwttzpChDQm5nU0DGgBAqwi9M9FXt 7BXA== X-Gm-Message-State: AOAM533d4RO2DS1dA/VJlLIphmMChhBH/uUug3ADPMLB9KGo3mMOn/5R PisdJz2N1vIybK/uDswqX74xNp/QKNRRU9NuiSwx29MAaX4= X-Google-Smtp-Source: ABdhPJx3inApbFvWGkdtCsgjn8/Gxqeap7rB9cdKRNoNwqJBlOHnK3xkYQJgzIANNXQq5Uo0/9PIthVom7F5NdtHZxY= X-Received: by 2002:adf:e512:: with SMTP id j18mr21025959wrm.390.1605539518279; Mon, 16 Nov 2020 07:11:58 -0800 (PST) MIME-Version: 1.0 From: Tadej Pecar Date: Mon, 16 Nov 2020 16:11:47 +0100 Message-ID: Subject: [PATCH] hw/char/cmsdk-apb-uart: Fix rx interrupt handling To: qemu-devel@nongnu.org Content-Type: multipart/alternative; boundary="000000000000a8f1a405b43acc3f" Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::444; envelope-from=tpecar95@gmail.com; helo=mail-wr1-x444.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Previously, the RX interrupt got missed if:
- the chara= cter backend provided the next character before the RX IRQ Handler
=C2= =A0 managed to clear the currently served interrupt.
- the character bac= kend provided the next character while the RX interrupt
=C2=A0 was disab= led. Enabling the interrupt did not trigger the interrupt
=C2=A0 even if= the RXFULL status bit was set.

Signed-off-by: Tadej P <tpecar95@gmail.com>
---
=C2=A0h= w/char/cmsdk-apb-uart.c | 54 ++++++++++++++++++++++++++++------------
= =C2=A0hw/char/trace-events =C2=A0 =C2=A0 | =C2=A01 +
=C2=A02 files chang= ed, 39 insertions(+), 16 deletions(-)

diff --git a/hw/char/cmsdk-apb= -uart.c b/hw/char/cmsdk-apb-uart.c
index 626b68f2ec..1b361bc4d6 100644--- a/hw/char/cmsdk-apb-uart.c
+++ b/hw/char/cmsdk-apb-uart.c
@@ -9= 6,19 +96,34 @@ static void uart_update_parameters(CMSDKAPBUART *s)
=C2= =A0
=C2=A0static void cmsdk_apb_uart_update(CMSDKAPBUART *s)
=C2=A0{<= br>- =C2=A0 =C2=A0/* update outbound irqs, including handling the way the r= xo and txo
- =C2=A0 =C2=A0 * interrupt status bits are just logical AND = of the overrun bit in
- =C2=A0 =C2=A0 * STATE and the overrun interrupt = enable bit in CTRL.
+ =C2=A0 =C2=A0/*
+ =C2=A0 =C2=A0 * update outbou= nd irqs
+ =C2=A0 =C2=A0 * (
+ =C2=A0 =C2=A0 * =C2=A0 =C2=A0 state =C2= =A0 =C2=A0 [rxo, =C2=A0txo, =C2=A0rxbf, txbf ] at bit [3, 2, 1, 0]
+ =C2= =A0 =C2=A0 * =C2=A0 | intstatus [rxo, =C2=A0txo, =C2=A0rx, =C2=A0 tx =C2=A0= ] at bit [3, 2, 1, 0]
+ =C2=A0 =C2=A0 * )
+ =C2=A0 =C2=A0 * & ct= rl =C2=A0 =C2=A0 =C2=A0 =C2=A0[rxoe, txoe, rxe, =C2=A0txe =C2=A0] at bit [5= , 4, 3, 2]
+ =C2=A0 =C2=A0 * =3D masked_intstatus
+ =C2=A0 =C2=A0 *+ =C2=A0 =C2=A0 * state: status register
+ =C2=A0 =C2=A0 * intstatus: = pending interrupts and is sticky (has to be cleared by sw)
+ =C2=A0 =C2= =A0 * masked_intstatus: masked (by ctrl) pending interrupts
+ =C2=A0 =C2= =A0 *
+ =C2=A0 =C2=A0 * intstatus [rxo, txo, rx] bits are set here
+ = =C2=A0 =C2=A0 * intstatus [tx] is managed in uart_transmit
=C2=A0 =C2=A0= =C2=A0 */
- =C2=A0 =C2=A0uint32_t omask =3D (R_INTSTATUS_RXO_MASK | R_I= NTSTATUS_TXO_MASK);
- =C2=A0 =C2=A0s->intstatus &=3D ~omask;
-= =C2=A0 =C2=A0s->intstatus |=3D (s->state & (s->ctrl >> = 2) & omask);
-
- =C2=A0 =C2=A0qemu_set_irq(s->txint, !!(s->= intstatus & R_INTSTATUS_TX_MASK));
- =C2=A0 =C2=A0qemu_set_irq(s->= ;rxint, !!(s->intstatus & R_INTSTATUS_RX_MASK));
- =C2=A0 =C2=A0q= emu_set_irq(s->txovrint, !!(s->intstatus & R_INTSTATUS_TXO_MASK))= ;
- =C2=A0 =C2=A0qemu_set_irq(s->rxovrint, !!(s->intstatus & R= _INTSTATUS_RXO_MASK));
- =C2=A0 =C2=A0qemu_set_irq(s->uartint, !!(s-&= gt;intstatus));
+ =C2=A0 =C2=A0s->intstatus |=3D s->state &+ =C2=A0 =C2=A0 =C2=A0 =C2=A0(R_INTSTATUS_RXO_MASK | R_INTSTATUS_TXO_MASK = | R_INTSTATUS_RX_MASK);
+
+ =C2=A0 =C2=A0uint32_t masked_intstatus = =3D s->intstatus & (s->ctrl >> 2);
+
+ =C2=A0 =C2=A0t= race_cmsdk_apb_uart_update(s->state, s->intstatus, masked_intstatus);=
+
+ =C2=A0 =C2=A0qemu_set_irq(s->txint, =C2=A0 =C2=A0!!(masked_in= tstatus & R_INTSTATUS_TX_MASK));
+ =C2=A0 =C2=A0qemu_set_irq(s->r= xint, =C2=A0 =C2=A0!!(masked_intstatus & R_INTSTATUS_RX_MASK));
+ = =C2=A0 =C2=A0qemu_set_irq(s->txovrint, !!(masked_intstatus & R_INTST= ATUS_TXO_MASK));
+ =C2=A0 =C2=A0qemu_set_irq(s->rxovrint, !!(masked_i= ntstatus & R_INTSTATUS_RXO_MASK));
+ =C2=A0 =C2=A0qemu_set_irq(s->= ;uartint, =C2=A0!!(masked_intstatus));
=C2=A0}
=C2=A0
=C2=A0static= int uart_can_receive(void *opaque)
@@ -144,9 +159,11 @@ static void uar= t_receive(void *opaque, const uint8_t *buf, int size)
=C2=A0
=C2=A0 = =C2=A0 =C2=A0s->rxbuf =3D *buf;
=C2=A0 =C2=A0 =C2=A0s->state |=3D = R_STATE_RXFULL_MASK;
- =C2=A0 =C2=A0if (s->ctrl & R_CTRL_RX_INTEN= _MASK) {
- =C2=A0 =C2=A0 =C2=A0 =C2=A0s->intstatus |=3D R_INTSTATUS_R= X_MASK;
- =C2=A0 =C2=A0}
+
+ =C2=A0 =C2=A0/*
+ =C2=A0 =C2=A0 * = Handled in cmsdk_apb_uart_update, in order to properly handle
+ =C2=A0 = =C2=A0 * pending rx interrupt when rxen gets enabled
+ =C2=A0 =C2=A0 */<= br>=C2=A0 =C2=A0 =C2=A0cmsdk_apb_uart_update(s);
=C2=A0}
=C2=A0
@@= -278,7 +295,12 @@ static void uart_write(void *opaque, hwaddr offset, uint= 64_t value,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 * is then reflected into = the intstatus value by the update function).
=C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 */
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0s->state &=3D ~(valu= e & (R_INTSTATUS_TXO_MASK | R_INTSTATUS_RXO_MASK));
- =C2=A0 =C2=A0 = =C2=A0 =C2=A0s->intstatus &=3D ~value;
+
+ =C2=A0 =C2=A0 =C2= =A0 =C2=A0/*
+ =C2=A0 =C2=A0 =C2=A0 =C2=A0 * Clear rx interrupt status o= nly if no pending character
+ =C2=A0 =C2=A0 =C2=A0 =C2=A0 * (no buffer f= ull asserted).
+ =C2=A0 =C2=A0 =C2=A0 =C2=A0 */
+ =C2=A0 =C2=A0 =C2= =A0 =C2=A0s->intstatus &=3D ~value | (s->state & R_STATE_RXFU= LL_MASK);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0cmsdk_apb_uart_update(s);=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0break;
=C2=A0 =C2=A0 =C2=A0case A_BAU= DDIV:
diff --git a/hw/char/trace-events b/hw/char/trace-events
index = 81026f6612..0821c8eb3a 100644
--- a/hw/char/trace-events
+++ b/hw/cha= r/trace-events
@@ -68,6 +68,7 @@ pl011_put_fifo_full(void) "FIFO no= w full, RXFF set"
=C2=A0pl011_baudrate_change(unsigned int baudrate= , uint64_t clock, uint32_t ibrd, uint32_t fbrd) "new baudrate %u (clk:= %" PRIu64 "hz, ibrd: %" PRIu32 ", fbrd: %" PRIu32= ")"
=C2=A0
=C2=A0# cmsdk-apb-uart.c
+cmsdk_apb_uart_upd= ate(uint32_t state, uint32_t intstatus, uint32_t masked_intstatus) "CM= SDK APB UART update: state 0x%x intstatus 0x%x masked_intstatus 0x%x"<= br>=C2=A0cmsdk_apb_uart_read(uint64_t offset, uint64_t data, unsigned size)= "CMSDK APB UART read: offset 0x%" PRIx64 " data 0x%" P= RIx64 " size %u"
=C2=A0cmsdk_apb_uart_write(uint64_t offset, u= int64_t data, unsigned size) "CMSDK APB UART write: offset 0x%" P= RIx64 " data 0x%" PRIx64 " size %u"
=C2=A0cmsdk_apb_= uart_reset(void) "CMSDK APB UART: reset"
--
2.29.2

<= /div> --000000000000a8f1a405b43acc3f--