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Tsirkin" To: qemu-devel@nongnu.org Cc: Peter Maydell , Bernhard Beschow , Paolo Bonzini , Richard Henderson , Eduardo Habkost , Marcel Apfelbaum Subject: [PULL v2 66/78] hw/i386/pc_piix: Make PIIX4 south bridge usable in PC machine Message-ID: <99b70606c925aeab7cb446ec432dae3e90224124.1697739629.git.mst@redhat.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Mailer: git-send-email 2.27.0.106.g8ac3dc51b1 X-Mutt-Fcc: =sent Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1697744690596100003 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Bernhard Beschow QEMU's PIIX3 implementation actually models the real PIIX4, but with differ= ent PCI IDs. Usually, guests deal just fine with it. Still, in order to provide= a more consistent illusion to guests, allow QEMU's PIIX4 implementation to be= used in the PC machine. Signed-off-by: Bernhard Beschow Message-Id: <20231007123843.127151-30-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/i386/pc.h | 2 + hw/i386/pc.c | 1 + hw/i386/pc_piix.c | 61 +++++++++++++++++++++++++++- docs/system/target-i386-desc.rst.inc | 8 ++++ 4 files changed, 71 insertions(+), 1 deletion(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index bec38cb92c..29a9724524 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -42,6 +42,7 @@ typedef struct PCMachineState { uint64_t max_ram_below_4g; OnOffAuto vmport; SmbiosEntryPointType smbios_entry_point_type; + const char *south_bridge; =20 bool acpi_build_enabled; bool smbus_enabled; @@ -92,6 +93,7 @@ struct PCMachineClass { /* Device configuration: */ bool pci_enabled; bool kvmclock_enabled; + const char *default_south_bridge; =20 /* Compat options: */ =20 diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 355e1b7cf6..6293f57a0c 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1706,6 +1706,7 @@ static void pc_machine_initfn(Object *obj) #endif /* CONFIG_VMPORT */ pcms->max_ram_below_4g =3D 0; /* use default */ pcms->smbios_entry_point_type =3D pcmc->default_smbios_ep_type; + pcms->south_bridge =3D pcmc->default_south_bridge; =20 /* acpi build is enabled by default if machine supports it */ pcms->acpi_build_enabled =3D pcmc->has_acpi_build; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index e38942a3c3..334d9a0299 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -262,7 +262,7 @@ static void pc_init1(MachineState *machine, DeviceState *dev; size_t i; =20 - pci_dev =3D pci_new_multifunction(-1, TYPE_PIIX3_DEVICE); + pci_dev =3D pci_new_multifunction(-1, pcms->south_bridge); object_property_set_bool(OBJECT(pci_dev), "has-usb", machine_usb(machine), &error_abort); object_property_set_bool(OBJECT(pci_dev), "has-acpi", @@ -394,6 +394,56 @@ static void pc_init1(MachineState *machine, } } =20 +typedef enum PCSouthBridgeOption { + PC_SOUTH_BRIDGE_OPTION_PIIX3, + PC_SOUTH_BRIDGE_OPTION_PIIX4, + PC_SOUTH_BRIDGE_OPTION_MAX, +} PCSouthBridgeOption; + +static const QEnumLookup PCSouthBridgeOption_lookup =3D { + .array =3D (const char *const[]) { + [PC_SOUTH_BRIDGE_OPTION_PIIX3] =3D TYPE_PIIX3_DEVICE, + [PC_SOUTH_BRIDGE_OPTION_PIIX4] =3D TYPE_PIIX4_PCI_DEVICE, + }, + .size =3D PC_SOUTH_BRIDGE_OPTION_MAX +}; + +#define NotifyVmexitOption_str(val) \ + qapi_enum_lookup(&NotifyVmexitOption_lookup, (val)) + +static int pc_get_south_bridge(Object *obj, Error **errp) +{ + PCMachineState *pcms =3D PC_MACHINE(obj); + int i; + + for (i =3D 0; i < PCSouthBridgeOption_lookup.size; i++) { + if (g_strcmp0(PCSouthBridgeOption_lookup.array[i], + pcms->south_bridge) =3D=3D 0) { + return i; + } + } + + error_setg(errp, "Invalid south bridge value set"); + return 0; +} + +static void pc_set_south_bridge(Object *obj, int value, Error **errp) +{ + PCMachineState *pcms =3D PC_MACHINE(obj); + + if (value < 0) { + error_setg(errp, "Value can't be negative"); + return; + } + + if (value >=3D PCSouthBridgeOption_lookup.size) { + error_setg(errp, "Value too big"); + return; + } + + pcms->south_bridge =3D PCSouthBridgeOption_lookup.array[value]; +} + /* Looking for a pc_compat_2_4() function? It doesn't exist. * pc_compat_*() functions that run on machine-init time and * change global QEMU state are deprecated. Please don't create @@ -473,6 +523,8 @@ static void pc_xen_hvm_init(MachineState *machine) static void pc_i440fx_machine_options(MachineClass *m) { PCMachineClass *pcmc =3D PC_MACHINE_CLASS(m); + ObjectClass *oc =3D OBJECT_CLASS(m); + pcmc->default_south_bridge =3D TYPE_PIIX3_DEVICE; pcmc->pci_root_uid =3D 0; pcmc->default_cpu_version =3D 1; =20 @@ -484,6 +536,13 @@ static void pc_i440fx_machine_options(MachineClass *m) m->no_parallel =3D !module_object_class_by_name(TYPE_ISA_PARALLEL); machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE); + + object_class_property_add_enum(oc, "x-south-bridge", "PCSouthBridgeOpt= ion", + &PCSouthBridgeOption_lookup, + pc_get_south_bridge, + pc_set_south_bridge); + object_class_property_set_description(oc, "x-south-bridge", + "Use a different south bridge than PI= IX3"); } =20 static void pc_i440fx_8_2_machine_options(MachineClass *m) diff --git a/docs/system/target-i386-desc.rst.inc b/docs/system/target-i386= -desc.rst.inc index 7d1fffacbe..5ebbcda9db 100644 --- a/docs/system/target-i386-desc.rst.inc +++ b/docs/system/target-i386-desc.rst.inc @@ -71,3 +71,11 @@ machine property, i.e. |qemu_system_x86| some.img \ -audiodev ,id=3D \ -machine pcspk-audiodev=3D + +Machine-specific options +~~~~~~~~~~~~~~~~~~~~~~~~ + +It supports the following machine-specific options: + +- ``x-south-bridge=3DPIIX3|piix4-isa`` (Experimental option to select a pa= rticular + south bridge. Default: ``PIIX3``) --=20 MST