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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.71.153.144; envelope-from=prvs=7197bd837=alistair.francis@wdc.com; helo=esa5.hgst.iphmx.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair.francis@wdc.com, bmeng.cn@gmail.com, palmer@dabbelt.com, alistair23@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Alistair Francis Reviewed-by: Richard Henderson --- target/riscv/cpu_bits.h | 11 ----------- target/riscv/cpu_helper.c | 21 ++++++++++++++++----- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h index 969dd05eae..8caab23b62 100644 --- a/target/riscv/cpu_bits.h +++ b/target/riscv/cpu_bits.h @@ -207,17 +207,6 @@ #define CSR_HTIMEDELTA 0x605 #define CSR_HTIMEDELTAH 0x615 =20 -#if defined(TARGET_RISCV32) -#define HGATP_MODE SATP32_MODE -#define HGATP_VMID SATP32_ASID -#define HGATP_PPN SATP32_PPN -#endif -#if defined(TARGET_RISCV64) -#define HGATP_MODE SATP64_MODE -#define HGATP_VMID SATP64_ASID -#define HGATP_PPN SATP64_PPN -#endif - /* Virtual CSRs */ #define CSR_VSSTATUS 0x200 #define CSR_VSIE 0x204 diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 21c54ef561..6446af5de0 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -411,8 +411,13 @@ static int get_physical_address(CPURISCVState *env, hw= addr *physical, } widened =3D 0; } else { - base =3D (hwaddr)get_field(env->hgatp, HGATP_PPN) << PGSHIFT; - vm =3D get_field(env->hgatp, HGATP_MODE); + if (riscv_cpu_is_32bit(env)) { + base =3D (hwaddr)get_field(env->hgatp, SATP32_PPN) << PGSHIFT; + vm =3D get_field(env->hgatp, SATP32_MODE); + } else { + base =3D (hwaddr)get_field(env->hgatp, SATP64_PPN) << PGSHIFT; + vm =3D get_field(env->hgatp, SATP64_MODE); + } widened =3D 2; } /* status.SUM will be ignored if execute on background */ @@ -621,9 +626,15 @@ static void raise_mmu_exception(CPURISCVState *env, ta= rget_ulong address, get_field(env->satp, SATP_MODE) !=3D VM_1_10_MBARE && !pmp_violation; } else { - page_fault_exceptions =3D - get_field(env->hgatp, HGATP_MODE) !=3D VM_1_10_MBARE && - !pmp_violation; + if (riscv_cpu_is_32bit(env)) { + page_fault_exceptions =3D + get_field(env->hgatp, SATP32_MODE) !=3D VM_1_10_MBARE && + !pmp_violation; + } else { + page_fault_exceptions =3D + get_field(env->hgatp, SATP64_MODE) !=3D VM_1_10_MBARE && + !pmp_violation; + } } switch (access_type) { case MMU_INST_FETCH: --=20 2.31.0