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Signed-off-by: Kohei Tokunaga --- tcg/wasm32.c | 5 ++- tcg/wasm32/tcg-target-reg-bits.h | 8 +--- tcg/wasm32/tcg-target.c.inc | 69 +++----------------------------- 3 files changed, 9 insertions(+), 73 deletions(-) diff --git a/tcg/wasm32.c b/tcg/wasm32.c index 4bc53d76d0..b238ccf6d6 100644 --- a/tcg/wasm32.c +++ b/tcg/wasm32.c @@ -370,8 +370,9 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, unsigned i, s, n; =20 tci_args_nl(insn, tb_ptr, &len, &ptr); - func =3D ((void **)ptr)[0]; - cif =3D ((void **)ptr)[1]; + tcg_target_ulong *data =3D (tcg_target_ulong *)ptr; + func =3D (void *)data[0]; + cif =3D (void *)data[1]; =20 n =3D cif->nargs; for (i =3D s =3D 0; i < n; ++i) { diff --git a/tcg/wasm32/tcg-target-reg-bits.h b/tcg/wasm32/tcg-target-reg-b= its.h index dcb1a203f8..375feccf91 100644 --- a/tcg/wasm32/tcg-target-reg-bits.h +++ b/tcg/wasm32/tcg-target-reg-bits.h @@ -7,12 +7,6 @@ #ifndef TCG_TARGET_REG_BITS_H #define TCG_TARGET_REG_BITS_H =20 -#if UINTPTR_MAX =3D=3D UINT32_MAX -# define TCG_TARGET_REG_BITS 32 -#elif UINTPTR_MAX =3D=3D UINT64_MAX -# define TCG_TARGET_REG_BITS 64 -#else -# error Unknown pointer size for tci target -#endif +#define TCG_TARGET_REG_BITS 64 =20 #endif diff --git a/tcg/wasm32/tcg-target.c.inc b/tcg/wasm32/tcg-target.c.inc index ea9131e6fe..9fad96d0fd 100644 --- a/tcg/wasm32/tcg-target.c.inc +++ b/tcg/wasm32/tcg-target.c.inc @@ -30,15 +30,9 @@ /* Used for function call generation. */ #define TCG_TARGET_CALL_STACK_OFFSET 0 #define TCG_TARGET_STACK_ALIGN 8 -#if TCG_TARGET_REG_BITS =3D=3D 32 -# define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_EVEN -# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN -# define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_EVEN -#else -# define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL -# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL -# define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL -#endif +#define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL +#define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL #define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL =20 typedef uint32_t tcg_insn_unit_tci; @@ -3083,39 +3077,6 @@ static const TCGOutOpMovcond outop_movcond =3D { .out =3D tgen_movcond, }; =20 -static void tgen_brcond2(TCGContext *s, TCGCond cond, TCGReg al, TCGReg ah, - TCGArg bl, bool const_bl, - TCGArg bh, bool const_bh, TCGLabel *l) -{ - tcg_out_op_rrrrrc(s, INDEX_op_setcond2_i32, TCG_REG_TMP, - al, ah, bl, bh, cond); - tcg_out_op_rl(s, INDEX_op_brcond, TCG_REG_TMP, l); -} - -#if TCG_TARGET_REG_BITS !=3D 32 -__attribute__((unused)) -#endif -static const TCGOutOpBrcond2 outop_brcond2 =3D { - .base.static_constraint =3D C_O0_I4(r, r, r, r), - .out =3D tgen_brcond2, -}; - -static void tgen_setcond2(TCGContext *s, TCGCond cond, TCGReg ret, - TCGReg al, TCGReg ah, - TCGArg bl, bool const_bl, - TCGArg bh, bool const_bh) -{ - tcg_out_op_rrrrrc(s, INDEX_op_setcond2_i32, ret, al, ah, bl, bh, cond); -} - -#if TCG_TARGET_REG_BITS !=3D 32 -__attribute__((unused)) -#endif -static const TCGOutOpSetcond2 outop_setcond2 =3D { - .base.static_constraint =3D C_O1_I4(r, r, r, r, r), - .out =3D tgen_setcond2, -}; - static void tcg_out_mb(TCGContext *s, unsigned a0) { tcg_out_op_v(s, INDEX_op_mb); @@ -3242,18 +3203,8 @@ static const TCGOutOpQemuLdSt outop_qemu_ld =3D { .out =3D tgen_qemu_ld, }; =20 -static void tgen_qemu_ld2(TCGContext *s, TCGType type, TCGReg datalo, - TCGReg datahi, TCGReg addr, MemOpIdx oi) -{ - tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_TMP, oi); - tcg_out_op_rrrr(s, INDEX_op_qemu_ld2, datalo, datahi, addr, TCG_REG_TM= P); -} - static const TCGOutOpQemuLdSt2 outop_qemu_ld2 =3D { - .base.static_constraint =3D - TCG_TARGET_REG_BITS =3D=3D 64 ? C_NotImplemented : C_O2_I1(r, r, r= ), - .out =3D - TCG_TARGET_REG_BITS =3D=3D 64 ? NULL : tgen_qemu_ld2, + .base.static_constraint =3D C_NotImplemented, }; =20 static void tgen_qemu_st(TCGContext *s, TCGType type, TCGReg data, @@ -3268,18 +3219,8 @@ static const TCGOutOpQemuLdSt outop_qemu_st =3D { .out =3D tgen_qemu_st, }; =20 -static void tgen_qemu_st2(TCGContext *s, TCGType type, TCGReg datalo, - TCGReg datahi, TCGReg addr, MemOpIdx oi) -{ - tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_TMP, oi); - tcg_out_op_rrrr(s, INDEX_op_qemu_st2, datalo, datahi, addr, TCG_REG_TM= P); -} - static const TCGOutOpQemuLdSt2 outop_qemu_st2 =3D { - .base.static_constraint =3D - TCG_TARGET_REG_BITS =3D=3D 64 ? C_NotImplemented : C_O0_I3(r, r, r= ), - .out =3D - TCG_TARGET_REG_BITS =3D=3D 64 ? NULL : tgen_qemu_st2, + .base.static_constraint =3D C_NotImplemented, }; =20 static void tcg_out_st(TCGContext *s, TCGType type, TCGReg val, TCGReg bas= e, --=20 2.43.0