From nobody Fri Dec 19 20:54:27 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1635527668360940.5667888938975; Fri, 29 Oct 2021 10:14:28 -0700 (PDT) Received: from localhost ([::1]:41006 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mgVSV-00056t-D9 for importer@patchew.org; Fri, 29 Oct 2021 13:14:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49416) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mgUwA-0007iP-6n for qemu-devel@nongnu.org; Fri, 29 Oct 2021 12:41:02 -0400 Received: from zero.eik.bme.hu ([152.66.115.2]:51122) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mgUvr-0006SD-Dd for qemu-devel@nongnu.org; Fri, 29 Oct 2021 12:41:01 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id B85D5756192; Fri, 29 Oct 2021 18:40:27 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id C79E87561B9; Fri, 29 Oct 2021 18:40:26 +0200 (CEST) Message-Id: <8ca22ea35d96c611c27bf2fa5e66b4f832410a4a.1635524617.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v5 22/25] hw/timer/sh_timer: Rename sh_timer_state to SHTimerState Date: Fri, 29 Oct 2021 18:23:36 +0200 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Richard Henderson , Magnus Damm , Yoshinori Sato Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1635527670145000001 According to coding style types should be camel case, also remove unneded casts from void *. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- The tmu012_state is left for now, that's the real exported object with SHTimerState being an internal object for a single timer. I'll come back to this when QOM-ifying so only handled SHTimerState in this patch. hw/timer/sh_timer.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c index e1b6145df8..2038adfb0a 100644 --- a/hw/timer/sh_timer.c +++ b/hw/timer/sh_timer.c @@ -45,11 +45,11 @@ typedef struct { int feat; int enabled; qemu_irq irq; -} sh_timer_state; +} SHTimerState; =20 /* Check all active timers, and schedule the next timer interrupt. */ =20 -static void sh_timer_update(sh_timer_state *s) +static void sh_timer_update(SHTimerState *s) { int new_level =3D s->int_level && (s->tcr & TIMER_TCR_UNIE); =20 @@ -62,7 +62,7 @@ static void sh_timer_update(sh_timer_state *s) =20 static uint32_t sh_timer_read(void *opaque, hwaddr offset) { - sh_timer_state *s =3D (sh_timer_state *)opaque; + SHTimerState *s =3D opaque; =20 switch (offset >> 2) { case OFFSET_TCOR: @@ -85,7 +85,7 @@ static uint32_t sh_timer_read(void *opaque, hwaddr offset) static void sh_timer_write(void *opaque, hwaddr offset, uint32_t value) { - sh_timer_state *s =3D (sh_timer_state *)opaque; + SHTimerState *s =3D opaque; int freq; =20 switch (offset >> 2) { @@ -200,7 +200,7 @@ static void sh_timer_write(void *opaque, hwaddr offset, =20 static void sh_timer_start_stop(void *opaque, int enable) { - sh_timer_state *s =3D (sh_timer_state *)opaque; + SHTimerState *s =3D opaque; =20 trace_sh_timer_start_stop(enable, s->enabled); ptimer_transaction_begin(s->timer); @@ -216,14 +216,14 @@ static void sh_timer_start_stop(void *opaque, int ena= ble) =20 static void sh_timer_tick(void *opaque) { - sh_timer_state *s =3D (sh_timer_state *)opaque; + SHTimerState *s =3D opaque; s->int_level =3D s->enabled; sh_timer_update(s); } =20 static void *sh_timer_init(uint32_t freq, int feat, qemu_irq irq) { - sh_timer_state *s; + SHTimerState *s; =20 s =3D g_malloc0(sizeof(*s)); s->freq =3D freq; @@ -259,7 +259,7 @@ typedef struct { static uint64_t tmu012_read(void *opaque, hwaddr offset, unsigned size) { - tmu012_state *s =3D (tmu012_state *)opaque; + tmu012_state *s =3D opaque; =20 trace_sh_timer_read(offset); if (offset >=3D 0x20) { @@ -289,7 +289,7 @@ static uint64_t tmu012_read(void *opaque, hwaddr offset, static void tmu012_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { - tmu012_state *s =3D (tmu012_state *)opaque; + tmu012_state *s =3D opaque; =20 trace_sh_timer_write(offset, value); if (offset >=3D 0x20) { --=20 2.21.4