From nobody Wed Oct 23 01:39:23 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 760F71BD50B for ; Tue, 1 Oct 2024 07:04:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727766252; cv=none; b=FZD/sTuwisd6gob8zu/5ksIucHW/2Plz2V84NWL8TZonYDhhmTxl4IrB4VSgjoZFhaRF5r/FwPAMQrJwid7bvoBDYw6P0si5jYiuHI2+9khPSC4SuVa6shF0smUhIzUzBWCrdnDaQics8fYyB0MolodGMzZci4AgnrhpXa9Xogg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727766252; c=relaxed/simple; bh=+WtTbHUT4iomth9t7xJ9WDT5mR2fPZd0bO/qGgVR9tM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=i641pcZB7ieIyicmjhnBWxtkC6TeNsgYEgjfpUn39TpHS7n5y6IRIKfhhB8q4d37ppnh1ybFAvUNNg3Jl9F3BiV0YL/F8mJqkGhJ/lq9OJCP8pA7JEFnq10h1B6YtQW8T/Phtg0lrWx7yfTihY7Z1VH+awn60sbOxu3B9qiXgKk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=HgmzsIvm; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="HgmzsIvm" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0C1BFC4CEDA; Tue, 1 Oct 2024 07:04:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1727766252; bh=+WtTbHUT4iomth9t7xJ9WDT5mR2fPZd0bO/qGgVR9tM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HgmzsIvm5QyXVzHLRaeBRKGpkQJrMe/MLnxCciIFIsBApB3e3K7ZHsbmocw3fuanZ etV4wAB0vARrPBdx+eMRIDhivDKJmw76U0c1+qZ3dkpIhqhKZ0yvNW6/UENFUBszb5 NeNobPOuTFA9uQMoCMJEIz2EvuO2g2CzlbHScQ6mqT4uwBMchJxP+DzdZ8HX4VDtkY f/lXr10EJJRtuWg1GXhE45SAgRJ7QSRCvvIt6B4MTQ5f3KoTZU9SnH8nY7kYJ2GqXK Ftuo09HWmVwcy4ryIIIgyXBFIya3rl4BQI2LeCqUS6fOP3G/5kkp+ur3LoynoJ3gzh rJeKufAR9GLVQ== Received: from mchehab by mail.kernel.org with local (Exim 4.98) (envelope-from ) id 1svWvY-00000001V10-2ucP; Tue, 01 Oct 2024 09:04:08 +0200 From: Mauro Carvalho Chehab To: Igor Mammedov Cc: Mauro Carvalho Chehab , "Michael S. Tsirkin" , Ani Sinha , Dongjiu Geng , linux-kernel@vger.kernel.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org, Jonathan Cameron Subject: [PATCH v2 10/15] acpi/ghes: move offset calculus to a separate function Date: Tue, 1 Oct 2024 09:03:47 +0200 Message-ID: <84226f5976fd29e23ce47d3a5cd311821c8111f8.1727766088.git.mchehab+huawei@kernel.org> X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: Mauro Carvalho Chehab Content-Type: text/plain; charset="utf-8" Currently, CPER address location is calculated as an offset of the hardware_errors table. It is also badly named, as the offset actually used is the address where the CPER data starts, and not the beginning of the error source. Move the logic which calculates such offset to a separate function, in preparation for a patch that will be changing the logic to calculate it from the HEST table. While here, properly name the variable which stores the cper address. Signed-off-by: Mauro Carvalho Chehab Reviewed-by: Jonathan Cameron --- hw/acpi/ghes.c | 50 +++++++++++++++++++++++++++++++------------------- 1 file changed, 31 insertions(+), 19 deletions(-) diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c index 628fa9b22f4b..900f1571bc97 100644 --- a/hw/acpi/ghes.c +++ b/hw/acpi/ghes.c @@ -378,11 +378,36 @@ void acpi_ghes_add_fw_cfg(AcpiGhesState *ags, FWCfgSt= ate *s, ags->present =3D true; } =20 +static void get_ghes_offsets(uint64_t ghes_addr, + uint64_t *cper_addr, + uint64_t *read_ack_register_addr) +{ + if (!ghes_addr) { + return; + } + + /* + * non-HEST version supports only one source, so no need to change + * the start offset based on the source ID. Also, we can't validate + * the source ID, as it is stored inside the HEST table. + */ + + cpu_physical_memory_read(ghes_addr, cper_addr, + sizeof(*cper_addr)); + + *cper_addr =3D le64_to_cpu(*cper_addr); + + /* + * As the current version supports only one source, the ack offset is + * just sizeof(uint64_t). + */ + *read_ack_register_addr =3D ghes_addr + sizeof(uint64_t); +} + void ghes_record_cper_errors(const void *cper, size_t len, uint16_t source_id, Error **errp) { - uint64_t error_block_addr, read_ack_register_addr, read_ack_register = =3D 0; - uint64_t start_addr; + uint64_t cper_addr =3D 0, read_ack_register_addr =3D 0, read_ack_regis= ter; AcpiGedState *acpi_ged_state; AcpiGhesState *ags; =20 @@ -396,27 +421,14 @@ void ghes_record_cper_errors(const void *cper, size_t= len, g_assert(acpi_ged_state); ags =3D &acpi_ged_state->ghes_state; =20 - /* - * Current version supports only one source, as assured during table b= uild, - * so no need to change the start offset based on the source ID. - */ - start_addr =3D le64_to_cpu(ags->ghes_addr_le); + get_ghes_offsets(le64_to_cpu(ags->ghes_addr_le), + &cper_addr, &read_ack_register_addr); =20 - cpu_physical_memory_read(start_addr, &error_block_addr, - sizeof(error_block_addr)); - - error_block_addr =3D le64_to_cpu(error_block_addr); - if (!error_block_addr) { + if (!cper_addr) { error_setg(errp, "can not find Generic Error Status Block"); return; } =20 - /* - * As the current version supports only one source, the ack offset is - * just sizeof(uint64_t). - */ - read_ack_register_addr =3D start_addr + sizeof(uint64_t); - cpu_physical_memory_read(read_ack_register_addr, &read_ack_register, sizeof(read_ack_register)= ); =20 @@ -437,7 +449,7 @@ void ghes_record_cper_errors(const void *cper, size_t l= en, &read_ack_register, sizeof(uint64_t)); =20 /* Write the generic error data entry into guest memory */ - cpu_physical_memory_write(error_block_addr, cper, len); + cpu_physical_memory_write(cper_addr, cper, len); =20 return; } --=20 2.46.0