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Tsirkin" To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 04/19] Revert "virtio-pci: Implement SR-IOV PF" Message-ID: <67f5b279fc72e43ccdee20a1a1e54cb51e24f06a.1722508478.git.mst@redhat.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Mailer: git-send-email 2.27.0.106.g8ac3dc51b1 X-Mutt-Fcc: =sent Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.126, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1722508637483116600 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This reverts commit 3f868ffb0bae0c4feafabe34a371cded57fe3806. Signed-off-by: Michael S. Tsirkin --- include/hw/virtio/virtio-pci.h | 1 - hw/virtio/virtio-pci.c | 20 +++++--------------- 2 files changed, 5 insertions(+), 16 deletions(-) diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h index 34539f2f67..9e67ba38c7 100644 --- a/include/hw/virtio/virtio-pci.h +++ b/include/hw/virtio/virtio-pci.h @@ -152,7 +152,6 @@ struct VirtIOPCIProxy { uint32_t modern_io_bar_idx; uint32_t modern_mem_bar_idx; int config_cap; - uint16_t last_pcie_cap_offset; uint32_t flags; bool disable_modern; bool ignore_backend_features; diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 0c8fcc5627..9534730bba 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1955,7 +1955,6 @@ static void virtio_pci_device_plugged(DeviceState *d,= Error **errp) uint8_t *config; uint32_t size; VirtIODevice *vdev =3D virtio_bus_get_device(bus); - int16_t res; =20 /* * Virtio capabilities present without @@ -2101,14 +2100,6 @@ static void virtio_pci_device_plugged(DeviceState *d= , Error **errp) pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar_idx, PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar); } - - res =3D pcie_sriov_pf_init_from_user_created_vfs(&proxy->pci_dev, - proxy->last_pcie_cap_of= fset, - errp); - if (res > 0) { - proxy->last_pcie_cap_offset +=3D res; - virtio_add_feature(&vdev->host_features, VIRTIO_F_SR_IOV); - } } =20 static void virtio_pci_device_unplugged(DeviceState *d) @@ -2196,7 +2187,7 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Er= ror **errp) =20 if (pcie_port && pci_is_express(pci_dev)) { int pos; - proxy->last_pcie_cap_offset =3D PCI_CONFIG_SPACE_SIZE; + uint16_t last_pcie_cap_offset =3D PCI_CONFIG_SPACE_SIZE; =20 pos =3D pcie_endpoint_cap_init(pci_dev, 0); assert(pos > 0); @@ -2216,9 +2207,9 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Er= ror **errp) pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3); =20 if (proxy->flags & VIRTIO_PCI_FLAG_AER) { - pcie_aer_init(pci_dev, PCI_ERR_VER, proxy->last_pcie_cap_offse= t, + pcie_aer_init(pci_dev, PCI_ERR_VER, last_pcie_cap_offset, PCI_ERR_SIZEOF, NULL); - proxy->last_pcie_cap_offset +=3D PCI_ERR_SIZEOF; + last_pcie_cap_offset +=3D PCI_ERR_SIZEOF; } =20 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) { @@ -2243,9 +2234,9 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Er= ror **errp) } =20 if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { - pcie_ats_init(pci_dev, proxy->last_pcie_cap_offset, + pcie_ats_init(pci_dev, last_pcie_cap_offset, proxy->flags & VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED); - proxy->last_pcie_cap_offset +=3D PCI_EXT_CAP_ATS_SIZEOF; + last_pcie_cap_offset +=3D PCI_EXT_CAP_ATS_SIZEOF; } =20 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) { @@ -2272,7 +2263,6 @@ static void virtio_pci_exit(PCIDevice *pci_dev) bool pcie_port =3D pci_bus_is_express(pci_get_bus(pci_dev)) && !pci_bus_is_root(pci_get_bus(pci_dev)); =20 - pcie_sriov_pf_exit(&proxy->pci_dev); msix_uninit_exclusive_bar(pci_dev); if (proxy->flags & VIRTIO_PCI_FLAG_AER && pcie_port && pci_is_express(pci_dev)) { --=20 MST