From nobody Tue Feb 10 21:40:10 2026 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=oracle.com Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1549781742975453.45644895656096; Sat, 9 Feb 2019 22:55:42 -0800 (PST) Received: from localhost ([127.0.0.1]:55668 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gsj1W-0007lr-1P for importer@patchew.org; Sun, 10 Feb 2019 01:55:30 -0500 Received: from eggs.gnu.org ([209.51.188.92]:51124) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gsizp-0006s4-AV for qemu-devel@nongnu.org; Sun, 10 Feb 2019 01:53:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gsizl-0000GB-GE for qemu-devel@nongnu.org; Sun, 10 Feb 2019 01:53:43 -0500 Received: from aserp2130.oracle.com ([141.146.126.79]:33670) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gsizh-00009o-E0 for qemu-devel@nongnu.org; Sun, 10 Feb 2019 01:53:38 -0500 Received: from pps.filterd (aserp2130.oracle.com [127.0.0.1]) by aserp2130.oracle.com (8.16.0.27/8.16.0.27) with SMTP id x1A6rKHX145338; Sun, 10 Feb 2019 06:53:20 GMT Received: from userv0021.oracle.com (userv0021.oracle.com [156.151.31.71]) by aserp2130.oracle.com with ESMTP id 2qhre51t44-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Sun, 10 Feb 2019 06:53:20 +0000 Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by userv0021.oracle.com (8.14.4/8.14.4) with ESMTP id x1A6rJYe008501 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Sun, 10 Feb 2019 06:53:19 GMT Received: from abhmp0018.oracle.com (abhmp0018.oracle.com [141.146.116.24]) by userv0121.oracle.com (8.14.4/8.13.8) with ESMTP id x1A6rJkp014414; Sun, 10 Feb 2019 06:53:19 GMT Received: from abi.no.oracle.com (/10.172.144.123) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Sun, 10 Feb 2019 06:53:18 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=corp-2018-07-02; bh=JhyUHyg20xm0hj08rhWqvd8JCx3+gFnVSaMgH7ND4+8=; b=brKgsG+8TpqALehkf28CL0YbF90d1zl1HNCnvBTjMRkuT74YJX6a3HNmU++4Eofy60PB 5ukVa8hVdUxNqyUw/a0OtsdWyQ3umwk5dUwwpUmNc2yAspgtw6Nv0XcQHWeTdUfRwpTM 8sBhdl9++aw9Dkwjs6X418962b0B91Vo3752AgasWAVn4tF+5nd5TQjc5Hk44rRnW4Hh 34BMAyHyUYVS5dt1fGvSRpnVEqBI7fVrruyAg/vAOkomEGrgJnxiFEFPzcgkmnMgxRNA v01+VIhkd/C3PYkg3i+Nor2Y1HznxTPBwhcOkD83Y2vrkOjL5yTg7RMXY0f0bq4xsWKy qg== From: Knut Omang To: qemu-devel@nongnu.org Date: Sun, 10 Feb 2019 07:52:59 +0100 Message-Id: <636bd37834daa1cc4c42462aeccd0de17aa370bf.1549779509.git-series.knut.omang@oracle.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=9162 signatures=668683 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1902100052 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 141.146.126.79 Subject: [Qemu-devel] [PATCH v3 1/2] pcie: Add a simple PCIe ACS (Access Control Services) helper function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S . Tsirkin" , Tal Attaly , Knut Omang , Alex Williamson , Elijah Shakkour , Stefan Hajnoczi Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Add a helper function to add PCIe capability for Access Control Services (A= CS) ACS support in the associated root port is a prerequisite to be able to do passthrough of individual functions of a device with VFIO without Alex Williamson's pcie_acs_override kernel patch or similar in the guest. Endpoints may also implement an ACS capability, but with limited features. Signed-off-by: Knut Omang Reviewed-by: Marcel Apfelbaum --- hw/pci/pcie.c | 29 +++++++++++++++++++++++++++++ include/hw/pci/pcie.h | 6 ++++++ include/hw/pci/pcie_regs.h | 4 ++++ 3 files changed, 39 insertions(+) diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index 230478f..509632f 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -742,6 +742,14 @@ bool pcie_cap_is_arifwd_enabled(const PCIDevice *dev) PCI_EXP_DEVCTL2_ARI; } =20 +/* Access Control Services (ACS) */ +void pcie_cap_acs_reset(PCIDevice *dev) +{ + if (dev->exp.acs_cap) { + pci_set_word(dev->config + dev->exp.acs_cap + PCI_ACS_CTRL, 0); + } +} + /************************************************************************** * pci express extended capability list management functions * uint16_t ext_cap_id (16 bit) @@ -906,3 +914,24 @@ void pcie_ats_init(PCIDevice *dev, uint16_t offset) =20 pci_set_word(dev->wmask + dev->exp.ats_cap + PCI_ATS_CTRL, 0x800f); } + +/* ACS (Access Control Services) */ +void pcie_acs_init(PCIDevice *dev, uint16_t offset) +{ + bool is_pcie_slot =3D !!object_dynamic_cast(OBJECT(dev), TYPE_PCIE_SLO= T); + uint16_t cap_bits =3D 0; + + pcie_add_capability(dev, PCI_EXT_CAP_ID_ACS, PCI_ACS_VER, offset, + PCI_ACS_SIZEOF); + dev->exp.acs_cap =3D offset; + + if (is_pcie_slot) { + /* Endpoints may also implement ACS, but these capabilities are */ + /* only valid for slots: */ + cap_bits =3D + PCI_ACS_SV | PCI_ACS_TB | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF; + } + + pci_set_word(dev->config + offset + PCI_ACS_CAP, cap_bits); + pci_set_word(dev->wmask + offset + PCI_ACS_CTRL, cap_bits); +} diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h index 5b82a0d..4c40711 100644 --- a/include/hw/pci/pcie.h +++ b/include/hw/pci/pcie.h @@ -79,6 +79,9 @@ struct PCIExpressDevice { =20 /* Offset of ATS capability in config space */ uint16_t ats_cap; + + /* ACS */ + uint16_t acs_cap; }; =20 #define COMPAT_PROP_PCP "power_controller_present" @@ -116,6 +119,8 @@ void pcie_cap_flr_init(PCIDevice *dev); void pcie_cap_flr_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, int len); =20 +void pcie_cap_acs_reset(PCIDevice *dev); + /* ARI forwarding capability and control */ void pcie_cap_arifwd_init(PCIDevice *dev); void pcie_cap_arifwd_reset(PCIDevice *dev); @@ -129,6 +134,7 @@ void pcie_add_capability(PCIDevice *dev, void pcie_sync_bridge_lnk(PCIDevice *dev); =20 void pcie_ari_init(PCIDevice *dev, uint16_t offset, uint16_t nextfn); +void pcie_acs_init(PCIDevice *dev, uint16_t offset); void pcie_dev_ser_num_init(PCIDevice *dev, uint16_t offset, uint64_t ser_n= um); void pcie_ats_init(PCIDevice *dev, uint16_t offset); =20 diff --git a/include/hw/pci/pcie_regs.h b/include/hw/pci/pcie_regs.h index ad4e780..1db86b0 100644 --- a/include/hw/pci/pcie_regs.h +++ b/include/hw/pci/pcie_regs.h @@ -175,4 +175,8 @@ typedef enum PCIExpLinkWidth { PCI_ERR_COR_INTERNAL | \ PCI_ERR_COR_HL_OVERFLOW) =20 +/* ACS */ +#define PCI_ACS_VER 0x1 +#define PCI_ACS_SIZEOF 8 + #endif /* QEMU_PCIE_REGS_H */ --=20 git-series 0.9.1