From nobody Mon Feb 9 16:21:12 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 151975792596336.24765821393305; Tue, 27 Feb 2018 10:58:45 -0800 (PST) Received: from localhost ([::1]:39424 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eqkSa-0001o7-OG for importer@patchew.org; Tue, 27 Feb 2018 13:58:44 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53711) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eqkR4-0000uS-VO for qemu-devel@nongnu.org; Tue, 27 Feb 2018 13:57:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eqkR1-0007hc-NL for qemu-devel@nongnu.org; Tue, 27 Feb 2018 13:57:11 -0500 Received: from mail-dm3nam03on0077.outbound.protection.outlook.com ([104.47.41.77]:18399 helo=NAM03-DM3-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eqkR1-0007hC-5n for qemu-devel@nongnu.org; Tue, 27 Feb 2018 13:57:07 -0500 Received: from SN4PR0201CA0020.namprd02.prod.outlook.com (10.161.238.158) by BN6PR02MB2258.namprd02.prod.outlook.com (10.168.253.140) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.548.13; Tue, 27 Feb 2018 18:57:04 +0000 Received: from CY1NAM02FT058.eop-nam02.prod.protection.outlook.com (2a01:111:f400:7e45::203) by SN4PR0201CA0020.outlook.office365.com (2603:10b6:803:2b::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.548.13 via Frontend Transport; Tue, 27 Feb 2018 18:57:04 +0000 Received: from xsj-pvapsmtpgw02 (149.199.60.100) by CY1NAM02FT058.mail.protection.outlook.com (10.152.74.149) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.20.527.18 via Frontend Transport; Tue, 27 Feb 2018 18:57:01 +0000 Received: from unknown-38-66.xilinx.com ([149.199.38.66]:59108 helo=xsj-pvapsmtp01) by xsj-pvapsmtpgw02 with esmtp (Exim 4.63) (envelope-from ) id 1eqkQv-0006gb-37; Tue, 27 Feb 2018 10:57:01 -0800 Received: from [127.0.0.1] (helo=localhost) by xsj-pvapsmtp01 with smtp (Exim 4.63) (envelope-from ) id 1eqkQv-0005k0-0A; Tue, 27 Feb 2018 10:57:01 -0800 Received: from xsj-pvapsmtp01 (mailhost.xilinx.com [149.199.38.66]) by xsj-smtp-dlp2.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id w1RIurbO007645; Tue, 27 Feb 2018 10:56:53 -0800 Received: from [172.19.2.220] (helo=xsjalistai50.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1eqkQn-0005gL-6q; Tue, 27 Feb 2018 10:56:53 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=xilinx.onmicrosoft.com; s=selector1-xilinx-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=wWyaNoDr0duRtZJyOBmZ9NbVU4Zqx5RMNqW5FiKyqPw=; b=2PiUBjYtbESGyLcqYNAL/s+YCfoOtSskGHKDSksU20cqEGN9ldyXz1bkRDHLX53eSKQbetGQ0aVDK50gn+DqADJ9sGyRr850lvQUi50wYyD4OJTgScKk5OnYNc8vG/BoiMWymtrQUi1D/JtJn7YyhKDwX+aDTDkxpc9OYX1uxlY= Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates 149.199.60.100 as permitted sender) receiver=protection.outlook.com; client-ip=149.199.60.100; helo=xsj-pvapsmtpgw02; From: Alistair Francis To: , Date: Tue, 27 Feb 2018 10:52:16 -0800 Message-ID: <5d1e6ad5ae486f3a9c947ca8e7f2aa120368f93c.1519755964.git.alistair.francis@xilinx.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.100; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(396003)(376002)(39860400002)(39380400002)(346002)(2980300002)(438002)(189003)(199004)(106002)(4326008)(23676004)(36756003)(9786002)(6346003)(59450400001)(54906003)(110136005)(316002)(7696005)(50226002)(5820100001)(39060400002)(2870700001)(478600001)(47776003)(36386004)(81166006)(81156014)(2906002)(6666003)(8936002)(106466001)(2950100002)(118296001)(77096007)(50466002)(26005)(76176011)(8676002)(5660300001)(305945005)(356003)(63266004)(186003)(336011)(107986001)(5001870100001); DIR:OUT; SFP:1101; SCL:1; SRVR:BN6PR02MB2258; H:xsj-pvapsmtpgw02; FPR:; SPF:Pass; PTR:unknown-60-100.xilinx.com,xapps1.xilinx.com; MX:1; A:1; LANG:en; X-Microsoft-Exchange-Diagnostics: 1; CY1NAM02FT058; 1:g/9BnjYxsn6cv4mc34yUMj9J5IZ4wZ0qCIL6dgAjlB8u5JZ4GiZqhvfMaAvodfKBoFQGbL4lCIJreSyvPuZl581BsLwKsjKtzPLpA0piUZgKldaUzQCbhwkfDZuD83h4 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 2bbc61a7-ef5e-435d-abad-08d57e13e410 X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(7020095)(4652020)(4534165)(4627221)(201703031133081)(201702281549075)(5600026)(4604075)(4608076)(2017052603307)(7153060); SRVR:BN6PR02MB2258; X-Microsoft-Exchange-Diagnostics: 1; BN6PR02MB2258; 3:pCbd9V1KO250QJDS/IKywMAz698nkf93RvGmgy8Pjkl1KaoN2SdZSsI4Q9hqHATGSNSsbA00kTNr6R+3UoGWoT5fIG/1mF1kwJFLV1dIRWJSax9rb3bMxJUU2qgPrIPkDhAXf5j5+6F7cYSoZW5Mq4dfWxFStnN0LkiM/d3gDFtB3j7FHPkXHvW+6ydrWhHrRospVzWPv14Zt2Vtccd4AuP0DWPGfxLEqNXkfhgKRAnPpco9GWw/dgdc5LtrESwxcW7TJAzWqq9bCXNS/nqRjEJHFmzsJ/+KvWXAfXISTQSIVIcNZwdfwobtQ+i0ZUUFixjIMrJFjrL3jrXCZEfiN/B3QYn3B3bAiSrgeSVpKpg=; 25:XwXhJbl3o97cpf0YtTfU22xtt6iOESoTbK/RKQIE+DCU0tCaw/NrUifJX2bPFil4AeApDKvcmVw+yfMdjCCvtmaIp0r4GGQbU40Wy8lSSkk57S2PlKK/HOqwSwkVOhoe47yewfHzi3DBalcN6DTDJ5qzPBoHDUt9DGBNLkcttzu9p8eBKK6rgPNLCJ3102XyGkkr0EyDLMdYr4olJzF5BmEnZfearZYqRybFt12zIgWJRJR/OaO2dhff246RyufVZUVoUit9itn0BBjGqy+TClQuM4SxH+sFtgbnnU9LKTT9omUrHcuFFUwHAk9btnE9uGTiMC9WFRkqgaW1+hKSxQ== X-MS-TrafficTypeDiagnostic: BN6PR02MB2258: X-Microsoft-Exchange-Diagnostics: 1; BN6PR02MB2258; 31:R1ciXeUuSsUEN9k10Yo7iY0NwuhzqNYHwFp8050QjtdBcDyTCJxsmcKAXO8xwqzLQSP5w7pOcYtrFz7QxUvMkZBP15y6YyMuldcUV4mfO4x72vA4IXj5Rt8aNtJ8FQzf8O8xeg1nNHbp511bbkIKK0RzGwxb2AVUF3rQYHdJdHP92a9QVb/RIFD44BS7mA2qc106HxdYZrza/mVqq6DWc6P7EcJxG4Z0dKThnDGLHFI=; 20:CeYNHTORLCYVmr+/YE/RQU1lPlq77PkGBxVpMHRE9EK3RvYp2k7lWy6KGiJcY9tFVCylr+wpkmAzKj9Mp7sO4wQLyQbrdtNKHdHK+hlQNDJzovOP0P7udCghk5FtaficFvmXHvPV6BScREJH6RNzkAwE7aCNiqJHZDWMBJL+CcP7CglbIwE/1mOnfTDXvSGYzGUAiPw1TsleeeE6FQIAoNK9Gd/luv+HbH7h9Ojn3uHdSMYhc465d42QMxA8t9V7TECKi6fS4i+MPP847SM9pSxXHmCwXgmMJ9UFK99xyXCbUNnERtGDHL5mzivqZEkEuOkR/q1avGkpoEnXZgNTdwFtxZVpOR+VcAm8lV6gUU/yoiaatOT67GTWUpOJ3vqh4aKCoCKQyRhn1OKfdvKkXuWajr176J3EP4djDO7/8frmVoLEkLoDLaHNUU8KPaXJyi8j7neExZ/koS1TKnfqaqiyG1GRbrij+CAAEPfUHLHO1IPI5mA0E8p/iHiYo9Pr X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(192813158149592); X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(8211001083)(6040501)(2401047)(8121501046)(5005006)(93006095)(93004095)(3002001)(10201501046)(3231220)(944501200)(6055026)(6041288)(20161123558120)(20161123562045)(20161123564045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123560045)(6072148)(201708071742011); SRVR:BN6PR02MB2258; BCL:0; PCL:0; RULEID:; SRVR:BN6PR02MB2258; X-Microsoft-Exchange-Diagnostics: 1; BN6PR02MB2258; 4:yd1AX0FPO5qX2KcMRm3ebvIBLv4bXmAf5iIZ6EZZprkIJGSLJ0PGj6D5sHgEp263Y6ZqOPdoO+9O80J208Vx3Z51m7DkBV+7V89ObGh/sYNSebCqFEvqFTGpJ9RCyAhFwO0ws0PeR6mebRjmBNapfURsqJHAhzGvDVn5gXRLY8CEYsDdIpFytrBc2UMZlKTxfgM6TkQ9YLu/27SSyEOUAbcnDDijeGSL5rqhAjVdnPwjeuRA+oAlg4slHvPXc6lecUaNXY4cgzlYQcX3gsSUFe6qBohugUmIsRU+/wvC1jxnpjNCBI52D987JLIsnh6D X-Forefront-PRVS: 05961EBAFC X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; BN6PR02MB2258; 23:pEMAO7nSlLQYSAnk9E1n+QN1HxZv/kE7I53XTa8HW?= =?us-ascii?Q?pr9fU1/Ot3Slhj47/t8YsZm4cnkaHG4L/3ThnRDavUzHSe939UMAIop5aBZg?= =?us-ascii?Q?u9sYJw/0A2Heh23kEfgb+vJVNZPkj7AB80RYAaNaPV9DI5m0P4kzsZiYw4Ir?= =?us-ascii?Q?4xes8nSTNfXKgCw81F3x6RbBd6fFTGQDpWEtzPzrVUDKU18ALyXaEQyJ9/1K?= =?us-ascii?Q?vbKRUVgDvkEziJ709hGGFk0v9sP6C80F6W9zFtv4mLRE9MP3JV8I3iq+hE3d?= =?us-ascii?Q?9qmLBsenHhQUy/+Vlos4oq13E2VHmJXXGvFiLyVAV88UeX8YPb/jzFBlOxZk?= =?us-ascii?Q?qkikaPjz+KnxbqBVshYNmBoWdPTKsDL3F9svqO/7HLpdv2pNc55IGvntF1wH?= =?us-ascii?Q?BeEvMgRyzRI21NzOfpm9BzaNlgwEe0DF1VWUEch0EGG7prReUvuP6z53feV+?= =?us-ascii?Q?bzBvi1J/s+h58n8i5YPpfR/RI1n7r0llORvHD3nsZrfYpTxYRVAFkR0+XRJv?= =?us-ascii?Q?/svFaeVMdyWeq6hreovtTCcpd6Iu4jTfghDzuDWCVjkRJgtGPNthhP8oqp+g?= =?us-ascii?Q?idQCmSwFHYWK8BU1khrozA1/pCEAmsfpp47mIQ7x9G4ZrgT/k4D7T4OGulBd?= =?us-ascii?Q?ofRUFtNulVzp7UODIg3K2aYffa0toA5KuXYrZZpGERJGdkZkLxLxKpi4+QxJ?= =?us-ascii?Q?lovPOYtD97khqatwyDxQdflBmLqKP+qOyLGw5JfgB7VdaEY8NQehVKZiHfiw?= =?us-ascii?Q?Ne/PoYmzaC7QR/RmhWcBBRwp6bkznSwqWm7cTDFLJ47yaU+2k7os1w0qBGtK?= =?us-ascii?Q?fe6E4inxFT9wyStwshjnhuHUOY2WaEUTBKAR8ZsiqeyskREw20zfzl0awXHn?= =?us-ascii?Q?qX2QEJaeqQn7pItmp7odRC8ebngcvVL9TY7vKcmqdTtVsDD3kByfjfAyhaYB?= =?us-ascii?Q?KONAzuT2CviDOpOuA7pVWFKUCtHY8wGOX9d3AOQDVWhD7PzGwThEuRI3T3i4?= =?us-ascii?Q?LwaxSjEz9RHJcdkGk9K+OJGpliZx+oiYZsfmI2P0sJKCAn0+UdWGF5a7PoFI?= =?us-ascii?Q?MNBdkr2vwN5GEpH1EG7IhFp7u+9IuUsAzxMB6bnWXqUXOTDK4RzZO5PoHChz?= =?us-ascii?Q?vp6Yx989rCbgV8MAomudEQRq2IPtOG3?= X-Microsoft-Exchange-Diagnostics: 1; BN6PR02MB2258; 6:F3bJtwSbFW0ZkWF/sS8M9qtCX47ICs9anJNpXchiSLQs+1W9htWCLrghy17jYZgvnJ/YOfB7zvZaJgs0DdO43PFYQqET/SwIBKrDb2UCeg4ktXsJP0LEHAdPGuyEuZoaoj0+OcA+k/mjFBEz02XsyglWrRdSLDpjDxLmVY3Lr1dch4c6Q0ajkwlBTpaljvd8ZTDNhNCEWpXK+C38+We0NhlhRDxBjyYe1hBVl9/eiBwj7/lzyGMtxuvaEc2+s+DP8K4IgqqiGRHHWR8uSpByEY6D86peDLk/TgAFd3hNQVjEBLYqSOgX7G8Ovs1LdEnfnT3ii24KrXwkeRnmGsm8XeU89khx5SffD31FvxnFhWw=; 5:a6jmEF6+0P9VzGX2goaPC/sw3mVeFJI8Pc8WwWYtnBgzC90kKVGHyH2co/bFddFrtMH9maMIaBUXrUB3plDcc+vWghtRdnmgT11TWVIVY490Ze6ef+OWn7WIZTh0kkMuo0E8tguDPEqU+QUlkGBEOcntJRPhQSNWuzTXHcxnDAQ=; 24:s7AaJwhve7znBH7x7ucjzp/Pny2jKgf1evJL/2rjq1WhMd01Xfo/kuab6xXA1KOArC1gl7x+/Cy6juLvlRi2aUYyl4HYxvxgtGbTTQCKWfI=; 7:lCpm5KgUGwv9uD4W5fAFznzqKhrwU+4p7qZsAm+hLdd9AcqIoxarIjRssaqesinAvVbpzskMgKcEQxrGGaarZ0O8WjjzTCDkPpXqai5sHWxLuGXi5VkdhXL3GQXszX7HSohqJRPM+qCE7pAWZw3Rbc0llnb1s6j5HL4rbzSHvP6SF9t4XcpmT92UhL2Ei48/csyDFTB6gmlc2DyDrh/mggyk7I1h/YuCUDchE00NcxjXVHutzrZKdQLfSv07RsUJ SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Feb 2018 18:57:01.8725 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2bbc61a7-ef5e-435d-abad-08d57e13e410 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.100]; Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR02MB2258 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 104.47.41.77 Subject: [Qemu-devel] [PATCH v7 1/3] xlnx-zynqmp-rtc: Initial commit X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, alistair23@gmail.com, edgar.iglesias@gmail.com, f4bug@amsat.org, alistair.francis@xilinx.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Initial commit of the ZynqMP RTC device. Signed-off-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- v5: - Don't use intermediate val V2: - Delete unused realise function - Remove DB_PRINT() include/hw/timer/xlnx-zynqmp-rtc.h | 84 +++++++++++++++ hw/timer/xlnx-zynqmp-rtc.c | 214 +++++++++++++++++++++++++++++++++= ++++ hw/timer/Makefile.objs | 1 + 3 files changed, 299 insertions(+) create mode 100644 include/hw/timer/xlnx-zynqmp-rtc.h create mode 100644 hw/timer/xlnx-zynqmp-rtc.c diff --git a/include/hw/timer/xlnx-zynqmp-rtc.h b/include/hw/timer/xlnx-zyn= qmp-rtc.h new file mode 100644 index 0000000000..87649836cc --- /dev/null +++ b/include/hw/timer/xlnx-zynqmp-rtc.h @@ -0,0 +1,84 @@ +/* + * QEMU model of the Xilinx ZynqMP Real Time Clock (RTC). + * + * Copyright (c) 2017 Xilinx Inc. + * + * Written-by: Alistair Francis + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ + +#include "hw/register.h" + +#define TYPE_XLNX_ZYNQMP_RTC "xlnx-zynmp.rtc" + +#define XLNX_ZYNQMP_RTC(obj) \ + OBJECT_CHECK(XlnxZynqMPRTC, (obj), TYPE_XLNX_ZYNQMP_RTC) + +REG32(SET_TIME_WRITE, 0x0) +REG32(SET_TIME_READ, 0x4) +REG32(CALIB_WRITE, 0x8) + FIELD(CALIB_WRITE, FRACTION_EN, 20, 1) + FIELD(CALIB_WRITE, FRACTION_DATA, 16, 4) + FIELD(CALIB_WRITE, MAX_TICK, 0, 16) +REG32(CALIB_READ, 0xc) + FIELD(CALIB_READ, FRACTION_EN, 20, 1) + FIELD(CALIB_READ, FRACTION_DATA, 16, 4) + FIELD(CALIB_READ, MAX_TICK, 0, 16) +REG32(CURRENT_TIME, 0x10) +REG32(CURRENT_TICK, 0x14) + FIELD(CURRENT_TICK, VALUE, 0, 16) +REG32(ALARM, 0x18) +REG32(RTC_INT_STATUS, 0x20) + FIELD(RTC_INT_STATUS, ALARM, 1, 1) + FIELD(RTC_INT_STATUS, SECONDS, 0, 1) +REG32(RTC_INT_MASK, 0x24) + FIELD(RTC_INT_MASK, ALARM, 1, 1) + FIELD(RTC_INT_MASK, SECONDS, 0, 1) +REG32(RTC_INT_EN, 0x28) + FIELD(RTC_INT_EN, ALARM, 1, 1) + FIELD(RTC_INT_EN, SECONDS, 0, 1) +REG32(RTC_INT_DIS, 0x2c) + FIELD(RTC_INT_DIS, ALARM, 1, 1) + FIELD(RTC_INT_DIS, SECONDS, 0, 1) +REG32(ADDR_ERROR, 0x30) + FIELD(ADDR_ERROR, STATUS, 0, 1) +REG32(ADDR_ERROR_INT_MASK, 0x34) + FIELD(ADDR_ERROR_INT_MASK, MASK, 0, 1) +REG32(ADDR_ERROR_INT_EN, 0x38) + FIELD(ADDR_ERROR_INT_EN, MASK, 0, 1) +REG32(ADDR_ERROR_INT_DIS, 0x3c) + FIELD(ADDR_ERROR_INT_DIS, MASK, 0, 1) +REG32(CONTROL, 0x40) + FIELD(CONTROL, BATTERY_DISABLE, 31, 1) + FIELD(CONTROL, OSC_CNTRL, 24, 4) + FIELD(CONTROL, SLVERR_ENABLE, 0, 1) +REG32(SAFETY_CHK, 0x50) + +#define XLNX_ZYNQMP_RTC_R_MAX (R_SAFETY_CHK + 1) + +typedef struct XlnxZynqMPRTC { + SysBusDevice parent_obj; + MemoryRegion iomem; + qemu_irq irq_rtc_int; + qemu_irq irq_addr_error_int; + + uint32_t regs[XLNX_ZYNQMP_RTC_R_MAX]; + RegisterInfo regs_info[XLNX_ZYNQMP_RTC_R_MAX]; +} XlnxZynqMPRTC; diff --git a/hw/timer/xlnx-zynqmp-rtc.c b/hw/timer/xlnx-zynqmp-rtc.c new file mode 100644 index 0000000000..707f145027 --- /dev/null +++ b/hw/timer/xlnx-zynqmp-rtc.c @@ -0,0 +1,214 @@ +/* + * QEMU model of the Xilinx ZynqMP Real Time Clock (RTC). + * + * Copyright (c) 2017 Xilinx Inc. + * + * Written-by: Alistair Francis + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "hw/sysbus.h" +#include "hw/register.h" +#include "qemu/bitops.h" +#include "qemu/log.h" +#include "hw/timer/xlnx-zynqmp-rtc.h" + +#ifndef XLNX_ZYNQMP_RTC_ERR_DEBUG +#define XLNX_ZYNQMP_RTC_ERR_DEBUG 0 +#endif + +static void rtc_int_update_irq(XlnxZynqMPRTC *s) +{ + bool pending =3D s->regs[R_RTC_INT_STATUS] & ~s->regs[R_RTC_INT_MASK]; + qemu_set_irq(s->irq_rtc_int, pending); +} + +static void addr_error_int_update_irq(XlnxZynqMPRTC *s) +{ + bool pending =3D s->regs[R_ADDR_ERROR] & ~s->regs[R_ADDR_ERROR_INT_MAS= K]; + qemu_set_irq(s->irq_addr_error_int, pending); +} + +static void rtc_int_status_postw(RegisterInfo *reg, uint64_t val64) +{ + XlnxZynqMPRTC *s =3D XLNX_ZYNQMP_RTC(reg->opaque); + rtc_int_update_irq(s); +} + +static uint64_t rtc_int_en_prew(RegisterInfo *reg, uint64_t val64) +{ + XlnxZynqMPRTC *s =3D XLNX_ZYNQMP_RTC(reg->opaque); + + s->regs[R_RTC_INT_MASK] &=3D (uint32_t) ~val64; + rtc_int_update_irq(s); + return 0; +} + +static uint64_t rtc_int_dis_prew(RegisterInfo *reg, uint64_t val64) +{ + XlnxZynqMPRTC *s =3D XLNX_ZYNQMP_RTC(reg->opaque); + + s->regs[R_RTC_INT_MASK] |=3D (uint32_t) val64; + rtc_int_update_irq(s); + return 0; +} + +static void addr_error_postw(RegisterInfo *reg, uint64_t val64) +{ + XlnxZynqMPRTC *s =3D XLNX_ZYNQMP_RTC(reg->opaque); + addr_error_int_update_irq(s); +} + +static uint64_t addr_error_int_en_prew(RegisterInfo *reg, uint64_t val64) +{ + XlnxZynqMPRTC *s =3D XLNX_ZYNQMP_RTC(reg->opaque); + + s->regs[R_ADDR_ERROR_INT_MASK] &=3D (uint32_t) ~val64; + addr_error_int_update_irq(s); + return 0; +} + +static uint64_t addr_error_int_dis_prew(RegisterInfo *reg, uint64_t val64) +{ + XlnxZynqMPRTC *s =3D XLNX_ZYNQMP_RTC(reg->opaque); + + s->regs[R_ADDR_ERROR_INT_MASK] |=3D (uint32_t) val64; + addr_error_int_update_irq(s); + return 0; +} + +static const RegisterAccessInfo rtc_regs_info[] =3D { + { .name =3D "SET_TIME_WRITE", .addr =3D A_SET_TIME_WRITE, + },{ .name =3D "SET_TIME_READ", .addr =3D A_SET_TIME_READ, + .ro =3D 0xffffffff, + },{ .name =3D "CALIB_WRITE", .addr =3D A_CALIB_WRITE, + },{ .name =3D "CALIB_READ", .addr =3D A_CALIB_READ, + .ro =3D 0x1fffff, + },{ .name =3D "CURRENT_TIME", .addr =3D A_CURRENT_TIME, + .ro =3D 0xffffffff, + },{ .name =3D "CURRENT_TICK", .addr =3D A_CURRENT_TICK, + .ro =3D 0xffff, + },{ .name =3D "ALARM", .addr =3D A_ALARM, + },{ .name =3D "RTC_INT_STATUS", .addr =3D A_RTC_INT_STATUS, + .w1c =3D 0x3, + .post_write =3D rtc_int_status_postw, + },{ .name =3D "RTC_INT_MASK", .addr =3D A_RTC_INT_MASK, + .reset =3D 0x3, + .ro =3D 0x3, + },{ .name =3D "RTC_INT_EN", .addr =3D A_RTC_INT_EN, + .pre_write =3D rtc_int_en_prew, + },{ .name =3D "RTC_INT_DIS", .addr =3D A_RTC_INT_DIS, + .pre_write =3D rtc_int_dis_prew, + },{ .name =3D "ADDR_ERROR", .addr =3D A_ADDR_ERROR, + .w1c =3D 0x1, + .post_write =3D addr_error_postw, + },{ .name =3D "ADDR_ERROR_INT_MASK", .addr =3D A_ADDR_ERROR_INT_MASK, + .reset =3D 0x1, + .ro =3D 0x1, + },{ .name =3D "ADDR_ERROR_INT_EN", .addr =3D A_ADDR_ERROR_INT_EN, + .pre_write =3D addr_error_int_en_prew, + },{ .name =3D "ADDR_ERROR_INT_DIS", .addr =3D A_ADDR_ERROR_INT_DIS, + .pre_write =3D addr_error_int_dis_prew, + },{ .name =3D "CONTROL", .addr =3D A_CONTROL, + .reset =3D 0x1000000, + .rsvd =3D 0x70fffffe, + },{ .name =3D "SAFETY_CHK", .addr =3D A_SAFETY_CHK, + } +}; + +static void rtc_reset(DeviceState *dev) +{ + XlnxZynqMPRTC *s =3D XLNX_ZYNQMP_RTC(dev); + unsigned int i; + + for (i =3D 0; i < ARRAY_SIZE(s->regs_info); ++i) { + register_reset(&s->regs_info[i]); + } + + rtc_int_update_irq(s); + addr_error_int_update_irq(s); +} + +static const MemoryRegionOps rtc_ops =3D { + .read =3D register_read_memory, + .write =3D register_write_memory, + .endianness =3D DEVICE_LITTLE_ENDIAN, + .valid =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + }, +}; + +static void rtc_init(Object *obj) +{ + XlnxZynqMPRTC *s =3D XLNX_ZYNQMP_RTC(obj); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); + RegisterInfoArray *reg_array; + + memory_region_init(&s->iomem, obj, TYPE_XLNX_ZYNQMP_RTC, + XLNX_ZYNQMP_RTC_R_MAX * 4); + reg_array =3D + register_init_block32(DEVICE(obj), rtc_regs_info, + ARRAY_SIZE(rtc_regs_info), + s->regs_info, s->regs, + &rtc_ops, + XLNX_ZYNQMP_RTC_ERR_DEBUG, + XLNX_ZYNQMP_RTC_R_MAX * 4); + memory_region_add_subregion(&s->iomem, + 0x0, + ®_array->mem); + sysbus_init_mmio(sbd, &s->iomem); + sysbus_init_irq(sbd, &s->irq_rtc_int); + sysbus_init_irq(sbd, &s->irq_addr_error_int); +} + +static const VMStateDescription vmstate_rtc =3D { + .name =3D TYPE_XLNX_ZYNQMP_RTC, + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (VMStateField[]) { + VMSTATE_UINT32_ARRAY(regs, XlnxZynqMPRTC, XLNX_ZYNQMP_RTC_R_MAX), + VMSTATE_END_OF_LIST(), + } +}; + +static void rtc_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->reset =3D rtc_reset; + dc->vmsd =3D &vmstate_rtc; +} + +static const TypeInfo rtc_info =3D { + .name =3D TYPE_XLNX_ZYNQMP_RTC, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(XlnxZynqMPRTC), + .class_init =3D rtc_class_init, + .instance_init =3D rtc_init, +}; + +static void rtc_register_types(void) +{ + type_register_static(&rtc_info); +} + +type_init(rtc_register_types) diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs index 8c19eac3b6..8b27a4b7ef 100644 --- a/hw/timer/Makefile.objs +++ b/hw/timer/Makefile.objs @@ -21,6 +21,7 @@ common-obj-$(CONFIG_IMX) +=3D imx_epit.o common-obj-$(CONFIG_IMX) +=3D imx_gpt.o common-obj-$(CONFIG_LM32) +=3D lm32_timer.o common-obj-$(CONFIG_MILKYMIST) +=3D milkymist-sysctl.o +common-obj-$(CONFIG_XLNX_ZYNQMP) +=3D xlnx-zynqmp-rtc.o =20 obj-$(CONFIG_ALTERA_TIMER) +=3D altera_timer.o obj-$(CONFIG_EXYNOS4) +=3D exynos4210_mct.o --=20 2.14.1