From nobody Fri Dec 19 20:55:32 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1635527569073133.36805016327185; Fri, 29 Oct 2021 10:12:49 -0700 (PDT) Received: from localhost ([::1]:35774 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mgVQu-0001SX-54 for importer@patchew.org; Fri, 29 Oct 2021 13:12:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49412) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mgUw9-0007h4-SQ for qemu-devel@nongnu.org; Fri, 29 Oct 2021 12:41:01 -0400 Received: from zero.eik.bme.hu ([152.66.115.2]:51126) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mgUw3-0006Tz-2O for qemu-devel@nongnu.org; Fri, 29 Oct 2021 12:41:01 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id CE3037561B9; Fri, 29 Oct 2021 18:40:27 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id D5C7B7561C4; Fri, 29 Oct 2021 18:40:26 +0200 (CEST) Message-Id: <5bf2c7b39eed0aa8a2497e7d2dfcf91355d849ae.1635524617.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v5 25/25] hw/timer/sh_timer: Remove use of hw_error Date: Fri, 29 Oct 2021 18:23:36 +0200 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Richard Henderson , Magnus Damm , Yoshinori Sato Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1635527569345100001 Content-Type: text/plain; charset="utf-8" The hw_error function calls abort and is not meant to be used by devices. Use qemu_log_mask instead to log and ignore invalid accesses. Also fix format strings to allow dropping type casts of hwaddr and use __func__ instead of hard coding function name in the message which were wrong in two cases. Signed-off-by: BALATON Zoltan --- hw/timer/sh_timer.c | 40 +++++++++++++++++++++++++--------------- 1 file changed, 25 insertions(+), 15 deletions(-) diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c index a6445092e4..8a586f2c4a 100644 --- a/hw/timer/sh_timer.c +++ b/hw/timer/sh_timer.c @@ -10,7 +10,7 @@ =20 #include "qemu/osdep.h" #include "exec/memory.h" -#include "hw/hw.h" +#include "qemu/log.h" #include "hw/irq.h" #include "hw/sh4/sh.h" #include "hw/timer/tmu012.h" @@ -75,11 +75,10 @@ static uint32_t sh_timer_read(void *opaque, hwaddr offs= et) if (s->feat & TIMER_FEAT_CAPT) { return s->tcpr; } - /* fall through */ - default: - hw_error("sh_timer_read: Bad offset %x\n", (int)offset); - return 0; } + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIx "\n", + __func__, offset); + return 0; } =20 static void sh_timer_write(void *opaque, hwaddr offset, uint32_t value) @@ -134,7 +133,8 @@ static void sh_timer_write(void *opaque, hwaddr offset,= uint32_t value) } /* fallthrough */ default: - hw_error("sh_timer_write: Reserved TPSC value\n"); + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Reserved TPSC value\n", __func__); } switch ((value & TIMER_TCR_CKEG) >> 3) { case 0: @@ -147,7 +147,8 @@ static void sh_timer_write(void *opaque, hwaddr offset,= uint32_t value) } /* fallthrough */ default: - hw_error("sh_timer_write: Reserved CKEG value\n"); + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Reserved CKEG value\n", __func__); } switch ((value & TIMER_TCR_ICPE) >> 6) { case 0: @@ -159,7 +160,8 @@ static void sh_timer_write(void *opaque, hwaddr offset,= uint32_t value) } /* fallthrough */ default: - hw_error("sh_timer_write: Reserved ICPE value\n"); + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Reserved ICPE value\n", __func__); } if ((value & TIMER_TCR_UNF) =3D=3D 0) { s->int_level =3D 0; @@ -168,13 +170,15 @@ static void sh_timer_write(void *opaque, hwaddr offse= t, uint32_t value) value &=3D ~TIMER_TCR_UNF; =20 if ((value & TIMER_TCR_ICPF) && (!(s->feat & TIMER_FEAT_CAPT))) { - hw_error("sh_timer_write: Reserved ICPF value\n"); + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Reserved ICPF value\n", __func__); } =20 value &=3D ~TIMER_TCR_ICPF; /* capture not supported */ =20 if (value & TIMER_TCR_RESERVED) { - hw_error("sh_timer_write: Reserved TCR bits set\n"); + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Reserved TCR bits set\n", __func__); } s->tcr =3D value; ptimer_set_limit(s->timer, s->tcor, 0); @@ -192,7 +196,8 @@ static void sh_timer_write(void *opaque, hwaddr offset,= uint32_t value) } /* fallthrough */ default: - hw_error("sh_timer_write: Bad offset %x\n", (int)offset); + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, off= set); } sh_timer_update(s); } @@ -262,7 +267,9 @@ static uint64_t tmu012_read(void *opaque, hwaddr offset= , unsigned size) trace_sh_timer_read(offset); if (offset >=3D 0x20) { if (!(s->feat & TMU012_FEAT_3CHAN)) { - hw_error("tmu012_write: Bad channel offset %x\n", (int)offset); + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Bad channel offset 0x%" HWADDR_PRIx "\n", + __func__, offset); } return sh_timer_read(s->timer[2], offset - 0x20); } @@ -280,7 +287,8 @@ static uint64_t tmu012_read(void *opaque, hwaddr offset= , unsigned size) return s->tocr; } =20 - hw_error("tmu012_write: Bad offset %x\n", (int)offset); + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, offset); return 0; } =20 @@ -292,7 +300,9 @@ static void tmu012_write(void *opaque, hwaddr offset, trace_sh_timer_write(offset, value); if (offset >=3D 0x20) { if (!(s->feat & TMU012_FEAT_3CHAN)) { - hw_error("tmu012_write: Bad channel offset %x\n", (int)offset); + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Bad channel offset 0x%" HWADDR_PRIx "\n", + __func__, offset); } sh_timer_write(s->timer[2], offset - 0x20, value); return; @@ -315,7 +325,7 @@ static void tmu012_write(void *opaque, hwaddr offset, sh_timer_start_stop(s->timer[2], value & (1 << 2)); } else { if (value & (1 << 2)) { - hw_error("tmu012_write: Bad channel\n"); + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad channel\n", __func= __); } } =20 --=20 2.21.4