From nobody Mon Feb 9 03:00:06 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1666958283587313.213564157016; Fri, 28 Oct 2022 04:58:03 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ooNyw-000224-Hv; Fri, 28 Oct 2022 07:57:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ooNyb-0001jI-8G; Fri, 28 Oct 2022 07:56:43 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ooNyQ-0006MU-A1; Fri, 28 Oct 2022 07:56:40 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id C596875A160; Fri, 28 Oct 2022 13:56:28 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id A3C2475A15D; Fri, 28 Oct 2022 13:56:28 +0200 (CEST) Message-Id: <5b53c70438dfb46837af8a094e753706b06c4ec6.1666957578.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v6 12/19] mac_nvram: Use NVRAM_SIZE constant To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Mark Cave-Ayland Date: Fri, 28 Oct 2022 13:56:28 +0200 (CEST) X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1666958284743100001 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The NVRAM_SIZE constant was defined but not used. Rename it to MACIO_NVRAM_SIZE to match the device model and use it where appropriate. Signed-off-by: BALATON Zoltan Reviewed-by: Mark Cave-Ayland --- hw/misc/macio/macio.c | 2 +- hw/ppc/mac_newworld.c | 4 ++-- include/hw/nvram/mac_nvram.h | 3 +-- 3 files changed, 4 insertions(+), 5 deletions(-) diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index 93a7c7bbc8..08dbdd7fc0 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -226,7 +226,7 @@ static void macio_oldworld_init(Object *obj) =20 object_initialize_child(OBJECT(s), "nvram", &os->nvram, TYPE_MACIO_NVR= AM); dev =3D DEVICE(&os->nvram); - qdev_prop_set_uint32(dev, "size", 0x2000); + qdev_prop_set_uint32(dev, "size", MACIO_NVRAM_SIZE); qdev_prop_set_uint32(dev, "it_shift", 4); =20 for (i =3D 0; i < 2; i++) { diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index eb597bbe20..6b2d781dea 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -450,12 +450,12 @@ static void ppc_core99_init(MachineState *machine) nvram_addr =3D 0xFFE00000; } dev =3D qdev_new(TYPE_MACIO_NVRAM); - qdev_prop_set_uint32(dev, "size", 0x2000); + qdev_prop_set_uint32(dev, "size", MACIO_NVRAM_SIZE); qdev_prop_set_uint32(dev, "it_shift", 1); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr); nvr =3D MACIO_NVRAM(dev); - pmac_format_nvram_partition(nvr, 0x2000); + pmac_format_nvram_partition(nvr, MACIO_NVRAM_SIZE); /* No PCI init: the BIOS will do it */ =20 dev =3D qdev_new(TYPE_FW_CFG_MEM); diff --git a/include/hw/nvram/mac_nvram.h b/include/hw/nvram/mac_nvram.h index baa9f6a5a6..b780aca470 100644 --- a/include/hw/nvram/mac_nvram.h +++ b/include/hw/nvram/mac_nvram.h @@ -29,9 +29,8 @@ #include "exec/memory.h" #include "hw/sysbus.h" =20 -#define NVRAM_SIZE 0x2000 +#define MACIO_NVRAM_SIZE 0x2000 =20 -/* Mac NVRAM */ #define TYPE_MACIO_NVRAM "macio-nvram" OBJECT_DECLARE_SIMPLE_TYPE(MacIONVRAMState, MACIO_NVRAM) =20 --=20 2.30.6