From nobody Tue Nov 18 10:39:19 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1609586836; cv=none; d=zohomail.com; s=zohoarc; b=fiyk7MzI79vMcDj5XrJCJPFdxIRWlx5qZJJ8UwVqjWjDF30OEEiq/NmwEwqfjRiUpyXKL4m/teod70qQdHgwvyQ6JqN8xdkEvtFPwhfZjuJvjaoof+jcgTjEZKmbfi1MWB0X2ILu9Cs/88Y165V2SbJW7Cse3fRwnajt6KoXa/Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1609586836; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=tbVUmNzBV7zhUU9oGA/AdDO7pwxbQIzS6IstyLWRfbk=; b=eRT6u6/pBCp4UtJqNsMMX+SgbJJJe8f18IygraQeSCreVNlfYOvx7rNwPE+ptz1V3jwNWSf5OwQs5ij8lbXIZkZLyVuylnE4YlcR+TRwPDNlhKOQ08qo4GjrLpWutYeMvOYHOU5Z3dbD3xK04VzNXfbT8A/MHM9wyJBHoWxAHOk= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1609586836602606.8697489142903; Sat, 2 Jan 2021 03:27:16 -0800 (PST) Received: from localhost ([::1]:55456 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kvf3z-0008Hj-Bf for importer@patchew.org; Sat, 02 Jan 2021 06:27:15 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33312) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kver8-0000zi-6D for qemu-devel@nongnu.org; Sat, 02 Jan 2021 06:13:58 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]:56517) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kver2-00079f-Q2 for qemu-devel@nongnu.org; Sat, 02 Jan 2021 06:13:57 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 1DFFA747616; Sat, 2 Jan 2021 12:13:32 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 3C65F747638; Sat, 2 Jan 2021 12:13:30 +0100 (CET) Message-Id: <5a27334fdd569a4b737d3bf18cbd66bc55dc912f.1609584216.git.balaton@eik.bme.hu> In-Reply-To: References: Subject: [PATCH 23/24] vt82c686: Add VT8231_SUPERIO based on VIA_SUPERIO Date: Sat, 02 Jan 2021 11:43:35 +0100 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Huacai Chen , f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Reply-to: BALATON Zoltan From: BALATON Zoltan via Content-Type: text/plain; charset="utf-8" The VT8231 south bridge is very similar to VT82C686B but there are some differences in register addresses and functionality, e.g. the VT8231 only has one serial port. This commit adds VT8231_SUPERIO subclass based on the abstract VIA_SUPERIO class to emulate the superio part of VT8231. Signed-off-by: BALATON Zoltan --- hw/isa/vt82c686.c | 121 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 121 insertions(+) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index a755896b8e..0390782d1d 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -489,6 +489,126 @@ static const TypeInfo vt82c686b_superio_info =3D { }; =20 =20 +#define TYPE_VT8231_SUPERIO "vt8231-superio" + +static void vt8231_superio_cfg_write(void *opaque, hwaddr addr, + uint64_t data, unsigned size) +{ + ViaSuperIOState *sc =3D opaque; + uint8_t idx =3D sc->regs[0]; + + if (addr =3D=3D 0) { /* config index register */ + sc->regs[0] =3D data; + return; + } + + /* config data register */ + trace_via_superio_write(idx, data); + switch (idx) { + case 0x00 ... 0xdf: + case 0xe7 ... 0xef: + case 0xf0 ... 0xf1: + case 0xf5: + case 0xf8: + case 0xfd: + /* ignore write to read only registers */ + return; + case 0xf2: /* Function select */ + { + data &=3D 0x17; + if (data & BIT(2)) { /* Serial port enable */ + ISADevice *dev =3D sc->superio.serial[0]; + if (!memory_region_is_mapped(sc->serial_io[0])) { + memory_region_add_subregion(isa_address_space_io(dev), + dev->ioport_id, sc->serial_io[= 0]); + } + } else { + MemoryRegion *io =3D isa_address_space_io(sc->superio.serial[0= ]); + if (memory_region_is_mapped(sc->serial_io[0])) { + memory_region_del_subregion(io, sc->serial_io[0]); + } + } + break; + } + case 0xf4: /* Serial port io base address */ + { + data &=3D 0xfe; + sc->superio.serial[0]->ioport_id =3D data << 2; + if (memory_region_is_mapped(sc->serial_io[0])) { + memory_region_set_address(sc->serial_io[0], data << 2); + } + break; + } + default: + qemu_log_mask(LOG_UNIMP, + "via_superio_cfg: unimplemented register 0x%x\n", id= x); + break; + } + sc->regs[idx] =3D data; +} + +static const MemoryRegionOps vt8231_superio_cfg_ops =3D { + .read =3D via_superio_cfg_read, + .write =3D vt8231_superio_cfg_write, + .endianness =3D DEVICE_NATIVE_ENDIAN, + .impl =3D { + .min_access_size =3D 1, + .max_access_size =3D 1, + }, +}; + +static void vt8231_superio_reset(DeviceState *dev) +{ + ViaSuperIOState *s =3D VIA_SUPERIO(dev); + + memset(s->regs, 0, sizeof(s->regs)); + /* Device ID */ + s->regs[0xf0] =3D 0x3c; + /* Device revision */ + s->regs[0xf1] =3D 0x01; + /* Function select - all disabled */ + vt8231_superio_cfg_write(s, 0, 0xf2, 1); + vt8231_superio_cfg_write(s, 1, 0x03, 1); + /* Serial port base addr */ + vt8231_superio_cfg_write(s, 0, 0xf4, 1); + vt8231_superio_cfg_write(s, 1, 0xfe, 1); + /* Parallel port base addr */ + vt8231_superio_cfg_write(s, 0, 0xf6, 1); + vt8231_superio_cfg_write(s, 1, 0xde, 1); + /* Floppy ctrl base addr */ + vt8231_superio_cfg_write(s, 0, 0xf7, 1); + vt8231_superio_cfg_write(s, 1, 0xfc, 1); + + vt8231_superio_cfg_write(s, 0, 0, 1); +} + +static void vt8231_superio_init(Object *obj) +{ + VIA_SUPERIO(obj)->io_ops =3D &vt8231_superio_cfg_ops; +} + +static void vt8231_superio_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + ISASuperIOClass *sc =3D ISA_SUPERIO_CLASS(klass); + + dc->reset =3D vt8231_superio_reset; + sc->serial.count =3D 1; + sc->parallel.count =3D 1; + sc->ide.count =3D 0; /* emulated by via-ide */ + sc->floppy.count =3D 1; +} + +static const TypeInfo vt8231_superio_info =3D { + .name =3D TYPE_VT8231_SUPERIO, + .parent =3D TYPE_VIA_SUPERIO, + .instance_size =3D sizeof(ViaSuperIOState), + .instance_init =3D vt8231_superio_init, + .class_size =3D sizeof(ISASuperIOClass), + .class_init =3D vt8231_superio_class_init, +}; + + OBJECT_DECLARE_SIMPLE_TYPE(VT82C686BISAState, VT82C686B_ISA) =20 struct VT82C686BISAState { @@ -612,6 +732,7 @@ static void vt82c686b_register_types(void) type_register_static(&vt8231_pm_info); type_register_static(&via_superio_info); type_register_static(&vt82c686b_superio_info); + type_register_static(&vt8231_superio_info); type_register_static(&via_info); } =20 --=20 2.21.3