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Mon, 2 Dec 2024 20:27:14 +0100 (CET) Received: (qmail 7226 invoked by uid 990); 2 Dec 2024 19:27:14 -0000 Received: from unknown (HELO unkown) (::1) by skiff.uberspace.de (Haraka/3.0.1) with ESMTPSA; Mon, 02 Dec 2024 20:27:14 +0100 Authentication-Results: skiff.uberspace.de; auth=pass (plain) From: Julian Ganz To: qemu-devel@nongnu.org Cc: Julian Ganz , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo Subject: [RFC PATCH v3 08/11] target/mips: call plugin trap callbacks Date: Mon, 2 Dec 2024 20:26:49 +0100 Message-ID: <5a165b308d75718e185806607df583596270181d.1733063076.git.neither@nut.email> X-Mailer: git-send-email 2.45.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Bar: ----- X-Rspamd-Report: REPLY(-4) BAYES_HAM(-2.996924) MID_CONTAINS_FROM(1) MIME_GOOD(-0.1) R_MISSING_CHARSET(0.5) X-Rspamd-Score: -5.596924 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=nut.email; s=uberspace; h=from:to:cc:subject:date; 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helo=mailgate02.uberspace.is X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @nut.email) X-ZM-MESSAGEID: 1733167780313116600 Content-Type: text/plain; charset="utf-8" We recently introduced API for registering callbacks for trap related events as well as the corresponding hook functions. Due to differences between architectures, the latter need to be called from target specific code. This change places hooks for MIPS targets. --- target/mips/tcg/sysemu/tlb_helper.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/target/mips/tcg/sysemu/tlb_helper.c b/target/mips/tcg/sysemu/t= lb_helper.c index e98bb95951..2b19975d53 100644 --- a/target/mips/tcg/sysemu/tlb_helper.c +++ b/target/mips/tcg/sysemu/tlb_helper.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" #include "qemu/bitops.h" +#include "qemu/plugin.h" =20 #include "cpu.h" #include "internal.h" @@ -1033,6 +1034,7 @@ void mips_cpu_do_interrupt(CPUState *cs) bool update_badinstr =3D 0; target_ulong offset; int cause =3D -1; + uint64_t last_pc =3D env->active_tc.PC; =20 if (qemu_loglevel_mask(CPU_LOG_INT) && cs->exception_index !=3D EXCP_EXT_INTERRUPT) { @@ -1051,6 +1053,7 @@ void mips_cpu_do_interrupt(CPUState *cs) cs->exception_index =3D EXCP_NONE; mips_semihosting(env); env->active_tc.PC +=3D env->error_code; + qemu_plugin_vcpu_hostcall_cb(cs, last_pc, env->active_tc.PC); return; case EXCP_DSS: env->CP0_Debug |=3D 1 << CP0DB_DSS; @@ -1335,6 +1338,14 @@ void mips_cpu_do_interrupt(CPUState *cs) env->CP0_Status, env->CP0_Cause, env->CP0_BadVAddr, env->CP0_DEPC); } + switch (cs->exception_index) { + case EXCP_NMI: + case EXCP_EXT_INTERRUPT: + qemu_plugin_vcpu_interrupt_cb(cs, last_pc, env->active_tc.PC); + break; + default: + qemu_plugin_vcpu_exception_cb(cs, last_pc, env->active_tc.PC); + } cs->exception_index =3D EXCP_NONE; } =20 --=20 2.45.2