From nobody Tue Dec 16 08:17:57 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540136335532887.6300239102142; Sun, 21 Oct 2018 08:38:55 -0700 (PDT) Received: from localhost ([::1]:59279 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gEFoc-0003hE-Aw for importer@patchew.org; Sun, 21 Oct 2018 11:38:54 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45288) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gEFkt-0000VR-26 for qemu-devel@nongnu.org; Sun, 21 Oct 2018 11:35:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gEFkp-00022S-Tj for qemu-devel@nongnu.org; Sun, 21 Oct 2018 11:35:03 -0400 Received: from pio-pvt-msa3.bahnhof.se ([79.136.2.42]:40653) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gEFkp-000225-MM for qemu-devel@nongnu.org; Sun, 21 Oct 2018 11:34:59 -0400 Received: from localhost (localhost [127.0.0.1]) by pio-pvt-msa3.bahnhof.se (Postfix) with ESMTP id A61F53F4F6; Sun, 21 Oct 2018 17:34:53 +0200 (CEST) Received: from pio-pvt-msa3.bahnhof.se ([127.0.0.1]) by localhost (pio-pvt-msa3.bahnhof.se [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OzGICP80RJ1A; Sun, 21 Oct 2018 17:34:47 +0200 (CEST) Received: from localhost (h-41-252.A163.priv.bahnhof.se [46.59.41.252]) (Authenticated sender: mb547485) by pio-pvt-msa3.bahnhof.se (Postfix) with ESMTPA id BEBD83F48B; Sun, 21 Oct 2018 17:34:46 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at bahnhof.se Date: Sun, 21 Oct 2018 17:34:46 +0200 From: Fredrik Noring To: Aleksandar Markovic , "Maciej W. Rozycki" , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= Message-ID: <52c64a08783f9258b3f4bc9dcfa1f41a46236cc3.1540134918.git.noring@nocrew.org> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 79.136.2.42 Subject: [Qemu-devel] [PATCH v8 09/38] target/mips: Define R5900 MMI3 opcode constants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Richard Henderson , qemu-devel@nongnu.org, =?utf-8?Q?J=C3=BCrgen?= Urban , Petar Jovanovic , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Signed-off-by: Fredrik Noring --- target/mips/translate.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index bd51443ac1..3c6a2c99a6 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -2323,6 +2323,45 @@ enum { TX79_MMI2_PROT3W =3D (0x1F << 6) | TX79_MMI_CLASS_MMI2, }; =20 +/* + * TX79 Multimedia Instructions with opcode field =3D MMI and bits 5..0 = =3D MMI3: + * + * 31 26 10 6 5 0 + * +--------+----------------------+--------+--------+ + * | MMI | |function| MMI3 | + * +--------+----------------------+--------+--------+ + * + * function bits 7..6 + * bits | 0 | 1 | 2 | 3 + * 10..8 | 00 | 01 | 10 | 11 + * -------+-------+-------+-------+------- + * 0 000 |PMADDUW| * | * | PSRAVW + * 1 001 | * | * | * | * + * 2 010 | PMTHI | PMTLO | PINTEH| * + * 3 011 |PMULTUW| PDIVUW| PCPYUD| * + * 4 100 | * | * | POR | PNOR + * 5 101 | * | * | * | * + * 6 110 | * | * | PEXCH | PCPYH + * 7 111 | * | * | PEXCW | * + */ + +#define MASK_TX79_MMI3(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF)) +enum { + TX79_MMI3_PMADDUW =3D (0x00 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PSRAVW =3D (0x03 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PMTHI =3D (0x08 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PMTLO =3D (0x09 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PINTEH =3D (0x0A << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PMULTUW =3D (0x0C << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PDIVUW =3D (0x0D << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PCPYUD =3D (0x0E << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_POR =3D (0x12 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PNOR =3D (0x13 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PEXCH =3D (0x1A << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PCPYH =3D (0x1B << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PEXCW =3D (0x1E << 6) | TX79_MMI_CLASS_MMI3, +}; + /* global register indices */ static TCGv cpu_gpr[32], cpu_PC; static TCGv cpu_HI[MIPS_DSP_ACC], cpu_LO[MIPS_DSP_ACC]; --=20 2.18.1