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IronPort-SDR: SGKARZi5oC/plm2ntz5o/fx+Xoflf+n1iC9G/7ATANkqrYv2OsZqZBwI3XRjghAxw3CIM+3/Rq gjUz4TkzSeSbuAxsjvPhMP+yRS0k1Q31UsB6am66FWHLSwQGrr5GkciDw3GHhvXuNrQw6vJf+I 3lY3xMU4012T02M7YB1cSn/5c157z4CQMH/831CClyJmK2UMQ8SjfW5nxbW8phi/sa14Pd04U+ qBsU5ehl74NnnPWI8IDO/01HmeFpWJVemPxauMabwcEN+/eudJYF29K03ngPS51176ZYyDia7G TAQ= X-IronPort-AV: E=Sophos;i="5.77,328,1596470400"; d="scan'208";a="258699511" IronPort-SDR: tLZ6q7HqHRSSlKJ57jRsl/JefF+adAlg9nYL/6NBNvluD2dSH6c8ho/zR1OJM76V6j5rk8M2PW SclGgEhYZVnQ== IronPort-SDR: MyilKsbWK4ebXnlC0Ky/FtZHq2eFo5M+VJj9EjUtbldKYU6KRaO8Ed0JI/eNsddncOQNWjmDl6 ymsOPG3GR6qA== WDCIronportException: Internal From: Alistair Francis To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH v1 4/4] hw/riscv: Load the kernel after the firmware Date: Fri, 2 Oct 2020 08:31:13 -0700 Message-Id: <4f272c9fab34bedc34b22adb8f9e2fb2dbd338d2.1601652616.git.alistair.francis@wdc.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Signed-off-by: Alistair Francis --- include/hw/riscv/boot.h | 1 + hw/riscv/boot.c | 10 +++++----- hw/riscv/opentitan.c | 3 ++- hw/riscv/sifive_e.c | 3 ++- hw/riscv/sifive_u.c | 13 +++++++++++-- hw/riscv/spike.c | 14 +++++++++++--- hw/riscv/virt.c | 14 +++++++++++--- 7 files changed, 43 insertions(+), 15 deletions(-) diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index 2975ed1a31..85d3227ea6 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -34,6 +34,7 @@ target_ulong riscv_load_firmware(const char *firmware_fil= ename, hwaddr firmware_load_addr, symbol_fn_t sym_cb); target_ulong riscv_load_kernel(const char *kernel_filename, + target_ulong firmware_end_addr, symbol_fn_t sym_cb); hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size, uint64_t kernel_entry, hwaddr *start); diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index 5dea644f47..f8e55ca16a 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -33,10 +33,8 @@ #include =20 #if defined(TARGET_RISCV32) -# define KERNEL_BOOT_ADDRESS 0x80400000 #define fw_dynamic_info_data(__val) cpu_to_le32(__val) #else -# define KERNEL_BOOT_ADDRESS 0x80200000 #define fw_dynamic_info_data(__val) cpu_to_le64(__val) #endif =20 @@ -123,7 +121,9 @@ target_ulong riscv_load_firmware(const char *firmware_f= ilename, exit(1); } =20 -target_ulong riscv_load_kernel(const char *kernel_filename, symbol_fn_t sy= m_cb) +target_ulong riscv_load_kernel(const char *kernel_filename, + target_ulong kernel_start_addr, + symbol_fn_t sym_cb) { uint64_t kernel_entry; =20 @@ -138,9 +138,9 @@ target_ulong riscv_load_kernel(const char *kernel_filen= ame, symbol_fn_t sym_cb) return kernel_entry; } =20 - if (load_image_targphys_as(kernel_filename, KERNEL_BOOT_ADDRESS, + if (load_image_targphys_as(kernel_filename, kernel_start_addr, ram_size, NULL) > 0) { - return KERNEL_BOOT_ADDRESS; + return kernel_start_addr; } =20 error_report("could not load kernel '%s'", kernel_filename); diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 0531bd879b..cc758b78b8 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -75,7 +75,8 @@ static void opentitan_board_init(MachineState *machine) } =20 if (machine->kernel_filename) { - riscv_load_kernel(machine->kernel_filename, NULL); + riscv_load_kernel(machine->kernel_filename, + memmap[IBEX_DEV_RAM].base, NULL); } } =20 diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index fcfac16816..59bac4cc9a 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -114,7 +114,8 @@ static void sifive_e_machine_init(MachineState *machine) memmap[SIFIVE_E_DEV_MROM].base, &address_space_m= emory); =20 if (machine->kernel_filename) { - riscv_load_kernel(machine->kernel_filename, NULL); + riscv_load_kernel(machine->kernel_filename, + memmap[SIFIVE_E_DEV_DTIM].base, NULL); } } =20 diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 5f3ad9bc0f..08b0a3937d 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -415,6 +415,7 @@ static void sifive_u_machine_init(MachineState *machine) MemoryRegion *main_mem =3D g_new(MemoryRegion, 1); MemoryRegion *flash0 =3D g_new(MemoryRegion, 1); target_ulong start_addr =3D memmap[SIFIVE_U_DEV_DRAM].base; + target_ulong firmware_end_addr, kernel_start_addr; uint32_t start_addr_hi32 =3D 0x00000000; int i; uint32_t fdt_load_addr; @@ -474,10 +475,18 @@ static void sifive_u_machine_init(MachineState *machi= ne) break; } =20 - riscv_find_and_load_firmware(machine, BIOS_FILENAME, start_addr, NULL); + firmware_end_addr =3D riscv_find_and_load_firmware(machine, BIOS_FILEN= AME, + start_addr, NULL); =20 if (machine->kernel_filename) { - kernel_entry =3D riscv_load_kernel(machine->kernel_filename, NULL); + if (riscv_is_32_bit(machine)) { + kernel_start_addr =3D QEMU_ALIGN_UP(firmware_end_addr, 0x40000= 0); + } else { + kernel_start_addr =3D QEMU_ALIGN_UP(firmware_end_addr, 0x20000= 0); + } + + kernel_entry =3D riscv_load_kernel(machine->kernel_filename, + kernel_start_addr, NULL); =20 if (machine->initrd_filename) { hwaddr start; diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 3fd152a035..280fb1f328 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -195,6 +195,7 @@ static void spike_board_init(MachineState *machine) MemoryRegion *system_memory =3D get_system_memory(); MemoryRegion *main_mem =3D g_new(MemoryRegion, 1); MemoryRegion *mask_rom =3D g_new(MemoryRegion, 1); + target_ulong firmware_end_addr, kernel_start_addr; uint32_t fdt_load_addr; uint64_t kernel_entry; char *soc_name; @@ -261,12 +262,19 @@ static void spike_board_init(MachineState *machine) memory_region_add_subregion(system_memory, memmap[SPIKE_MROM].base, mask_rom); =20 - riscv_find_and_load_firmware(machine, BIOS_FILENAME, - memmap[SPIKE_DRAM].base, - htif_symbol_callback); + firmware_end_addr =3D riscv_find_and_load_firmware(machine, BIOS_FILEN= AME, + memmap[SPIKE_DRAM].ba= se, + htif_symbol_callback); =20 if (machine->kernel_filename) { + if (riscv_is_32_bit(machine)) { + kernel_start_addr =3D QEMU_ALIGN_UP(firmware_end_addr, 0x40000= 0); + } else { + kernel_start_addr =3D QEMU_ALIGN_UP(firmware_end_addr, 0x20000= 0); + } + kernel_entry =3D riscv_load_kernel(machine->kernel_filename, + kernel_start_addr, htif_symbol_callback); =20 if (machine->initrd_filename) { diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 41bd2f38ba..bf22d28eef 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -493,6 +493,7 @@ static void virt_machine_init(MachineState *machine) char *plic_hart_config, *soc_name; size_t plic_hart_config_len; target_ulong start_addr =3D memmap[VIRT_DRAM].base; + target_ulong firmware_end_addr, kernel_start_addr; uint32_t fdt_load_addr; uint64_t kernel_entry; DeviceState *mmio_plic, *virtio_plic, *pcie_plic; @@ -602,11 +603,18 @@ static void virt_machine_init(MachineState *machine) memory_region_add_subregion(system_memory, memmap[VIRT_MROM].base, mask_rom); =20 - riscv_find_and_load_firmware(machine, BIOS_FILENAME, - memmap[VIRT_DRAM].base, NULL); + firmware_end_addr =3D riscv_find_and_load_firmware(machine, BIOS_FILEN= AME, + start_addr, NULL); =20 if (machine->kernel_filename) { - kernel_entry =3D riscv_load_kernel(machine->kernel_filename, NULL); + if (riscv_is_32_bit(machine)) { + kernel_start_addr =3D QEMU_ALIGN_UP(firmware_end_addr, 0x40000= 0); + } else { + kernel_start_addr =3D QEMU_ALIGN_UP(firmware_end_addr, 0x20000= 0); + } + + kernel_entry =3D riscv_load_kernel(machine->kernel_filename, + kernel_start_addr, NULL); =20 if (machine->initrd_filename) { hwaddr start; --=20 2.28.0