From nobody Mon Nov 25 09:26:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1716765574632626.2892294115125; Sun, 26 May 2024 16:19:34 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sBN5x-0000JC-UK; Sun, 26 May 2024 19:16:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sBN5g-0006zp-DR; Sun, 26 May 2024 19:15:51 -0400 Received: from zero.eik.bme.hu ([152.66.115.2]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sBN5a-00045v-8M; Sun, 26 May 2024 19:15:48 -0400 Received: from zero.eik.bme.hu (localhost [127.0.0.1]) by zero.eik.bme.hu (Postfix) with ESMTP id 1417C4E6550; Mon, 27 May 2024 01:13:19 +0200 (CEST) Received: from zero.eik.bme.hu ([127.0.0.1]) by zero.eik.bme.hu (zero.eik.bme.hu [127.0.0.1]) (amavisd-new, port 10028) with ESMTP id zbROn7g7TIro; Mon, 27 May 2024 01:13:17 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 2482E4E6551; Mon, 27 May 2024 01:13:17 +0200 (CEST) X-Virus-Scanned: amavisd-new at eik.bme.hu Message-Id: <4cdbb66fc918f00f51e6fb6266e1b0714496b266.1716763435.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH 40/43] target/ppc: Change parameter type of ppc64_v3_radix() MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Nicholas Piggin , Daniel Henrique Barboza Date: Mon, 27 May 2024 01:13:17 +0200 (CEST) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1716765575767100001 Content-Type: text/plain; charset="utf-8" This function takes PowerPCCPU but only needs the env from it. Change its parameter to CPUPPCState *env. Signed-off-by: BALATON Zoltan Acked-by: Nicholas Piggin --- hw/ppc/spapr_rtas.c | 2 +- target/ppc/mmu-book3s-v3.h | 4 ++-- target/ppc/mmu_common.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index f329693c55..38e94fc0d7 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -177,7 +177,7 @@ static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMa= chineState *spapr, * New cpus are expected to start in the same radix/hash mode * as the existing CPUs */ - if (ppc64_v3_radix(callcpu)) { + if (ppc64_v3_radix(&callcpu->env)) { lpcr |=3D LPCR_UPRT | LPCR_GTSE | LPCR_HR; } else { lpcr &=3D ~(LPCR_UPRT | LPCR_GTSE | LPCR_HR); diff --git a/target/ppc/mmu-book3s-v3.h b/target/ppc/mmu-book3s-v3.h index be66e26604..e52129ff7f 100644 --- a/target/ppc/mmu-book3s-v3.h +++ b/target/ppc/mmu-book3s-v3.h @@ -75,9 +75,9 @@ bool ppc64_v3_get_pate(PowerPCCPU *cpu, target_ulong lpid, * dig out the partition table in the fast path. This is * also how the HW uses it. */ -static inline bool ppc64_v3_radix(PowerPCCPU *cpu) +static inline bool ppc64_v3_radix(CPUPPCState *env) { - return !!(cpu->env.spr[SPR_LPCR] & LPCR_HR); + return !!(env->spr[SPR_LPCR] & LPCR_HR); } =20 #endif /* TARGET_PPC64 */ diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index b45eb64f6e..ab055ca96b 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -565,7 +565,7 @@ void dump_mmu(CPUPPCState *env) dump_slb(env_archcpu(env)); break; case POWERPC_MMU_3_00: - if (ppc64_v3_radix(env_archcpu(env))) { + if (ppc64_v3_radix(env)) { qemu_log_mask(LOG_UNIMP, "%s: the PPC64 MMU is unsupported\n", __func__); } else { @@ -810,7 +810,7 @@ bool ppc_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessT= ype access_type, switch (cpu->env.mmu_model) { #if defined(TARGET_PPC64) case POWERPC_MMU_3_00: - if (ppc64_v3_radix(cpu)) { + if (ppc64_v3_radix(&cpu->env)) { return ppc_radix64_xlate(cpu, eaddr, access_type, raddrp, psizep, protp, mmu_idx, guest_visible= ); } --=20 2.30.9