From nobody Tue Nov 18 10:37:43 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1609587257; cv=none; d=zohomail.com; s=zohoarc; b=jzFrpCBmXLb+G9+KwLvEB4DODdRdIDN2P8Whnj74glbFX5kHn+9wcICo65jwsLlbpFchlaWr7Dz3OjRt7OKiaoXuyJ/c5k6aq5fS+nQi9vt/kqBYxPdqqr0trSPONoYVUc8j//88TY/E/hpXgc2Cm4nyosI8zzJd06Aqcjn3pk4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1609587257; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=fwWBqLXMLJPLanVITzkKURFYk7rkIxz57YzCuQKPLIc=; b=EDwFJCpeOvegsAb0hVKxHcdCaVw+ZDg+7MiKtyGV+HOu5V85Qj0TRB70FOJjXr3X1l7Sjecj7SkOY7SDffajeJiEbPy47uz/dl0+52RwmcZS0YGq3sKu26ypY/0irJZ6vH88Dtlh4Xrd45WSNzUvFBng8ChkS8y66lFF+L76FdU= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1609587257159279.24261678389064; Sat, 2 Jan 2021 03:34:17 -0800 (PST) Received: from localhost ([::1]:46710 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kvfAm-00080u-1Q for importer@patchew.org; Sat, 02 Jan 2021 06:34:16 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33326) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kverC-00012a-5Y for qemu-devel@nongnu.org; Sat, 02 Jan 2021 06:14:02 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]:56518) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kver3-0007A7-6T for qemu-devel@nongnu.org; Sat, 02 Jan 2021 06:14:01 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 38884747619; Sat, 2 Jan 2021 12:13:32 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 40A6F747639; Sat, 2 Jan 2021 12:13:30 +0100 (CET) Message-Id: <4ac748a6ae46bd1806c712e56cfdb3a07ea5a9ab.1609584216.git.balaton@eik.bme.hu> In-Reply-To: References: Subject: [PATCH 24/24] vt82c686: Add emulation of VT8231 south bridge Date: Sat, 02 Jan 2021 11:43:35 +0100 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Huacai Chen , f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Reply-to: BALATON Zoltan From: BALATON Zoltan via Content-Type: text/plain; charset="utf-8" Add emulation of VT8231 south bridge ISA part based on the similar VT82C686B but implemented in a separate subclass that holds the differences while reusing parts that can be shared. Signed-off-by: BALATON Zoltan --- hw/isa/vt82c686.c | 152 ++++++++++++++++++++++++++++++-------- include/hw/isa/vt82c686.h | 1 + 2 files changed, 123 insertions(+), 30 deletions(-) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 0390782d1d..604ab4a55e 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -8,6 +8,9 @@ * * Contributions after 2012-01-13 are licensed under the terms of the * GNU GPL, version 2 or (at your option) any later version. + * + * VT8231 south bridge support and general clean up to allow it + * Copyright (c) 2018-2020 BALATON Zoltan */ =20 #include "qemu/osdep.h" @@ -609,24 +612,48 @@ static const TypeInfo vt8231_superio_info =3D { }; =20 =20 -OBJECT_DECLARE_SIMPLE_TYPE(VT82C686BISAState, VT82C686B_ISA) +#define TYPE_VIA_ISA "via-isa" +OBJECT_DECLARE_SIMPLE_TYPE(ViaISAState, VIA_ISA) =20 -struct VT82C686BISAState { +struct ViaISAState { PCIDevice dev; qemu_irq cpu_intr; ViaSuperIOState *via_sio; }; =20 +static const VMStateDescription vmstate_via =3D { + .name =3D "via-isa", + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (VMStateField[]) { + VMSTATE_PCI_DEVICE(dev, ViaISAState), + VMSTATE_END_OF_LIST() + } +}; + +static const TypeInfo via_isa_info =3D { + .name =3D TYPE_VIA_ISA, + .parent =3D TYPE_PCI_DEVICE, + .instance_size =3D sizeof(ViaISAState), + .abstract =3D true, + .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, +}; + static void via_isa_request_i8259_irq(void *opaque, int irq, int level) { - VT82C686BISAState *s =3D opaque; + ViaISAState *s =3D opaque; qemu_set_irq(s->cpu_intr, level); } =20 +/* TYPE_VT82C686B_ISA */ + static void vt82c686b_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len) { - VT82C686BISAState *s =3D VT82C686B_ISA(d); + ViaISAState *s =3D VIA_ISA(d); =20 trace_via_isa_write(addr, val, len); pci_default_write_config(d, addr, val, len); @@ -636,19 +663,9 @@ static void vt82c686b_write_config(PCIDevice *d, uint3= 2_t addr, } } =20 -static const VMStateDescription vmstate_via =3D { - .name =3D "vt82c686b", - .version_id =3D 1, - .minimum_version_id =3D 1, - .fields =3D (VMStateField[]) { - VMSTATE_PCI_DEVICE(dev, VT82C686BISAState), - VMSTATE_END_OF_LIST() - } -}; - static void vt82c686b_isa_reset(DeviceState *dev) { - VT82C686BISAState *s =3D VT82C686B_ISA(dev); + ViaISAState *s =3D VIA_ISA(dev); uint8_t *pci_conf =3D s->dev.config; =20 pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0); @@ -668,7 +685,7 @@ static void vt82c686b_isa_reset(DeviceState *dev) =20 static void vt82c686b_realize(PCIDevice *d, Error **errp) { - VT82C686BISAState *s =3D VT82C686B_ISA(d); + ViaISAState *s =3D VIA_ISA(d); DeviceState *dev =3D DEVICE(d); ISABus *isa_bus; qemu_irq *isa_irq; @@ -692,7 +709,7 @@ static void vt82c686b_realize(PCIDevice *d, Error **err= p) } } =20 -static void via_class_init(ObjectClass *klass, void *data) +static void vt82c686b_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); @@ -706,22 +723,95 @@ static void via_class_init(ObjectClass *klass, void *= data) dc->reset =3D vt82c686b_isa_reset; dc->desc =3D "ISA bridge"; dc->vmsd =3D &vmstate_via; - /* - * Reason: part of VIA VT82C686 southbridge, needs to be wired up, - * e.g. by mips_fuloong2e_init() - */ + /* Reason: part of VIA VT82C686 southbridge, needs to be wired up */ dc->user_creatable =3D false; } =20 -static const TypeInfo via_info =3D { +static const TypeInfo vt82c686b_isa_info =3D { .name =3D TYPE_VT82C686B_ISA, - .parent =3D TYPE_PCI_DEVICE, - .instance_size =3D sizeof(VT82C686BISAState), - .class_init =3D via_class_init, - .interfaces =3D (InterfaceInfo[]) { - { INTERFACE_CONVENTIONAL_PCI_DEVICE }, - { }, - }, + .parent =3D TYPE_VIA_ISA, + .instance_size =3D sizeof(ViaISAState), + .class_init =3D vt82c686b_class_init, +}; + +/* TYPE_VT8231_ISA */ + +static void vt8231_write_config(PCIDevice *d, uint32_t addr, + uint32_t val, int len) +{ + ViaISAState *s =3D VIA_ISA(d); + + trace_via_isa_write(addr, val, len); + pci_default_write_config(d, addr, val, len); + if (addr =3D=3D 0x50) { + /* BIT(2): enable or disable superio config io ports */ + via_superio_io_enable(s->via_sio, val & BIT(2)); + } +} + +static void vt8231_isa_reset(DeviceState *dev) +{ + ViaISAState *s =3D VIA_ISA(dev); + uint8_t *pci_conf =3D s->dev.config; + + pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0); + pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMO= RY | + PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL); + pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); + + pci_conf[0x58] =3D 0x40; /* Miscellaneous Control 0 */ + pci_conf[0x67] =3D 0x08; /* Fast IR Config */ + pci_conf[0x6b] =3D 0x01; /* Fast IR I/O Base */ +} + +static void vt8231_realize(PCIDevice *d, Error **errp) +{ + ViaISAState *s =3D VIA_ISA(d); + DeviceState *dev =3D DEVICE(d); + ISABus *isa_bus; + qemu_irq *isa_irq; + int i; + + qdev_init_gpio_out(dev, &s->cpu_intr, 1); + isa_irq =3D qemu_allocate_irqs(via_isa_request_i8259_irq, s, 1); + isa_bus =3D isa_bus_new(dev, get_system_memory(), pci_address_space_io= (d), + &error_fatal); + isa_bus_irqs(isa_bus, i8259_init(isa_bus, *isa_irq)); + i8254_pit_init(isa_bus, 0x40, 0, NULL); + i8257_dma_init(isa_bus, 0); + s->via_sio =3D VIA_SUPERIO(isa_create_simple(isa_bus, TYPE_VT8231_SUPE= RIO)); + mc146818_rtc_init(isa_bus, 2000, NULL); + + for (i =3D 0; i < PCI_CONFIG_HEADER_SIZE; i++) { + if (i < PCI_COMMAND || i >=3D PCI_REVISION_ID) { + d->wmask[i] =3D 0; + } + } +} + +static void vt8231_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); + + k->realize =3D vt8231_realize; + k->config_write =3D vt8231_write_config; + k->vendor_id =3D PCI_VENDOR_ID_VIA; + k->device_id =3D 0x8231; + k->class_id =3D PCI_CLASS_BRIDGE_ISA; + k->revision =3D 0x10; + dc->reset =3D vt8231_isa_reset; + dc->desc =3D "ISA bridge"; + dc->vmsd =3D &vmstate_via; + /* Reason: part of VIA VT8231 southbridge, needs to be wired up */ + dc->user_creatable =3D false; +} + +static const TypeInfo vt8231_isa_info =3D { + .name =3D TYPE_VT8231_ISA, + .parent =3D TYPE_VIA_ISA, + .instance_size =3D sizeof(ViaISAState), + .class_init =3D vt8231_class_init, }; =20 =20 @@ -733,7 +823,9 @@ static void vt82c686b_register_types(void) type_register_static(&via_superio_info); type_register_static(&vt82c686b_superio_info); type_register_static(&vt8231_superio_info); - type_register_static(&via_info); + type_register_static(&via_isa_info); + type_register_static(&vt82c686b_isa_info); + type_register_static(&vt8231_isa_info); } =20 type_init(vt82c686b_register_types) diff --git a/include/hw/isa/vt82c686.h b/include/hw/isa/vt82c686.h index 0692b9a527..0f01aaa471 100644 --- a/include/hw/isa/vt82c686.h +++ b/include/hw/isa/vt82c686.h @@ -3,6 +3,7 @@ =20 #define TYPE_VT82C686B_ISA "vt82c686b-isa" #define TYPE_VT82C686B_PM "vt82c686b-pm" +#define TYPE_VT8231_ISA "vt8231-isa" #define TYPE_VT8231_PM "vt8231-pm" #define TYPE_VIA_AC97 "via-ac97" #define TYPE_VIA_MC97 "via-mc97" --=20 2.21.3