From nobody Wed Nov 19 13:58:02 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu ARC-Seal: i=1; a=rsa-sha256; t=1615944790; cv=none; d=zohomail.com; s=zohoarc; b=m1sfBFs9O/HHB2MSWQWqk57nVKHEM1XrSa/AIGtOAa0EyEMnX29cPgVBM3PMbbg/AUUN5b7W1u7VD21FRvmO1K9fzzSBMyp9MGNCx6bo9LDKG9m93ps7JThEgg5rDlHAGuhzVMT29rYdBfT4XteP07k+YUBYFyXReDIMpxcIw3E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615944790; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=9VP4d6N/1lfrQsDT420a3z1yvtE90HKNKwGX+PdSp3I=; b=mhrRFqNhwdENkaXloVxSKJj2bi1De5oIoFz51mdNRJZTjnCNs649TYQ9FN5iQU37WVos2/n9qdHAXclTlHKPAXpE061ZeO1i5TPFyLaAVqxwOMlZ4KGkaY1I3xxIiTysx5o+OnkipGjCANv9deAktIpwC0jyOXIj6mCciHeD9F0= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615944790553252.11574839961884; Tue, 16 Mar 2021 18:33:10 -0700 (PDT) Received: from localhost ([::1]:42588 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lML3d-0004Cy-5c for importer@patchew.org; Tue, 16 Mar 2021 21:33:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50208) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMKyb-0008NH-8R; Tue, 16 Mar 2021 21:27:58 -0400 Received: from zero.eik.bme.hu ([152.66.115.2]:59591) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMKyY-0000T6-1G; Tue, 16 Mar 2021 21:27:56 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 0418674641B; Wed, 17 Mar 2021 02:27:52 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 832C57463AD; Wed, 17 Mar 2021 02:27:51 +0100 (CET) Message-Id: <4a2ae16fddc423b095fec03ccae45568f18d0041.1615943871.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v10 2/7] vt82c686: Add VT8231_SUPERIO based on VIA_SUPERIO Date: Wed, 17 Mar 2021 02:17:51 +0100 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Paolo Bonzini , f4bug@amsat.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" The VT8231 south bridge is very similar to VT82C686B but there are some differences in register addresses and functionality, e.g. the VT8231 only has one serial port. This commit adds VT8231_SUPERIO subclass based on the abstract VIA_SUPERIO class to emulate the superio part of VT8231. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/isa/vt82c686.c | 102 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 6fb81c4ac6..b3048fd37e 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -417,6 +417,107 @@ static const TypeInfo vt82c686b_superio_info =3D { }; =20 =20 +#define TYPE_VT8231_SUPERIO "vt8231-superio" + +static void vt8231_superio_cfg_write(void *opaque, hwaddr addr, + uint64_t data, unsigned size) +{ + ViaSuperIOState *sc =3D opaque; + uint8_t idx =3D sc->regs[0]; + + if (addr =3D=3D 0) { /* config index register */ + sc->regs[0] =3D data; + return; + } + + /* config data register */ + trace_via_superio_write(idx, data); + switch (idx) { + case 0x00 ... 0xdf: + case 0xe7 ... 0xef: + case 0xf0 ... 0xf1: + case 0xf5: + case 0xf8: + case 0xfd: + /* ignore write to read only registers */ + return; + default: + qemu_log_mask(LOG_UNIMP, + "via_superio_cfg: unimplemented register 0x%x\n", id= x); + break; + } + sc->regs[idx] =3D data; +} + +static const MemoryRegionOps vt8231_superio_cfg_ops =3D { + .read =3D via_superio_cfg_read, + .write =3D vt8231_superio_cfg_write, + .endianness =3D DEVICE_NATIVE_ENDIAN, + .impl =3D { + .min_access_size =3D 1, + .max_access_size =3D 1, + }, +}; + +static void vt8231_superio_reset(DeviceState *dev) +{ + ViaSuperIOState *s =3D VIA_SUPERIO(dev); + + memset(s->regs, 0, sizeof(s->regs)); + /* Device ID */ + s->regs[0xf0] =3D 0x3c; + /* Device revision */ + s->regs[0xf1] =3D 0x01; + /* Function select - all disabled */ + vt8231_superio_cfg_write(s, 0, 0xf2, 1); + vt8231_superio_cfg_write(s, 1, 0x03, 1); + /* Serial port base addr */ + vt8231_superio_cfg_write(s, 0, 0xf4, 1); + vt8231_superio_cfg_write(s, 1, 0xfe, 1); + /* Parallel port base addr */ + vt8231_superio_cfg_write(s, 0, 0xf6, 1); + vt8231_superio_cfg_write(s, 1, 0xde, 1); + /* Floppy ctrl base addr */ + vt8231_superio_cfg_write(s, 0, 0xf7, 1); + vt8231_superio_cfg_write(s, 1, 0xfc, 1); + + vt8231_superio_cfg_write(s, 0, 0, 1); +} + +static void vt8231_superio_init(Object *obj) +{ + VIA_SUPERIO(obj)->io_ops =3D &vt8231_superio_cfg_ops; +} + +static uint16_t vt8231_superio_serial_iobase(ISASuperIODevice *sio, + uint8_t index) +{ + return 0x2f8; /* FIXME: This should be settable via registers f2-f= 4 */ +} + +static void vt8231_superio_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + ISASuperIOClass *sc =3D ISA_SUPERIO_CLASS(klass); + + dc->reset =3D vt8231_superio_reset; + sc->serial.count =3D 1; + sc->serial.get_iobase =3D vt8231_superio_serial_iobase; + sc->parallel.count =3D 1; + sc->ide.count =3D 0; /* emulated by via-ide */ + sc->floppy.count =3D 1; +} + +static const TypeInfo vt8231_superio_info =3D { + .name =3D TYPE_VT8231_SUPERIO, + .parent =3D TYPE_VIA_SUPERIO, + .instance_size =3D sizeof(ViaSuperIOState), + .instance_init =3D vt8231_superio_init, + .class_size =3D sizeof(ISASuperIOClass), + .class_init =3D vt8231_superio_class_init, +}; + + OBJECT_DECLARE_SIMPLE_TYPE(VT82C686BISAState, VT82C686B_ISA) =20 struct VT82C686BISAState { @@ -540,6 +641,7 @@ static void vt82c686b_register_types(void) type_register_static(&vt8231_pm_info); type_register_static(&via_superio_info); type_register_static(&vt82c686b_superio_info); + type_register_static(&vt8231_superio_info); type_register_static(&via_info); } =20 --=20 2.21.4