From nobody Mon Nov 25 11:49:09 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1715211543126829.2194704658999; Wed, 8 May 2024 16:39:03 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s4qqg-000601-N8; Wed, 08 May 2024 19:37:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s4qqU-0004oA-C8; Wed, 08 May 2024 19:37:12 -0400 Received: from zero.eik.bme.hu ([152.66.115.2]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s4qqE-0002ct-Rj; Wed, 08 May 2024 19:37:10 -0400 Received: from zero.eik.bme.hu (localhost [127.0.0.1]) by zero.eik.bme.hu (Postfix) with ESMTP id 27E7F4E65BB; Thu, 09 May 2024 01:36:31 +0200 (CEST) Received: from zero.eik.bme.hu ([127.0.0.1]) by zero.eik.bme.hu (zero.eik.bme.hu [127.0.0.1]) (amavisd-new, port 10028) with ESMTP id u8gqhSEhuKz8; Thu, 9 May 2024 01:36:29 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 3020B4E65D6; Thu, 09 May 2024 01:36:29 +0200 (CEST) X-Virus-Scanned: amavisd-new at eik.bme.hu Message-Id: <49e2b7e5a0fb98fd3f8a6d3c0c8ac2a05ebceb7a.1715209155.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v4 25/33] target/ppc/mmu_common.c: Split off BookE handling from ppc_jumbo_xlate() MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Nicholas Piggin , Daniel Henrique Barboza Date: Thu, 09 May 2024 01:36:29 +0200 (CEST) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1715211544185100001 Content-Type: text/plain; charset="utf-8" Introduce ppc_booke_xlate() to handle BookE and BookE 2.06 cases to reduce ppc_jumbo_xlate() further. Signed-off-by: BALATON Zoltan Reviewed-by: Nicholas Piggin --- target/ppc/mmu_common.c | 148 ++++++++++++++++++++++++++-------------- 1 file changed, 98 insertions(+), 50 deletions(-) diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index 53ffcc795d..be0565f19c 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -1089,21 +1089,9 @@ static int get_physical_address_wtlb(CPUPPCState *en= v, mmu_ctx_t *ctx, MMUAccessType access_type, int type, int mmu_idx) { - bool real_mode; - - if (env->mmu_model =3D=3D POWERPC_MMU_BOOKE) { - return mmubooke_get_physical_address(env, &ctx->raddr, &ctx->prot, - eaddr, access_type); - } else if (env->mmu_model =3D=3D POWERPC_MMU_BOOKE206) { - return mmubooke206_get_physical_address(env, &ctx->raddr, &ctx->pr= ot, - eaddr, access_type, mmu_id= x); - } - - real_mode =3D (type =3D=3D ACCESS_CODE) ? !FIELD_EX64(env->msr, MSR, I= R) - : !FIELD_EX64(env->msr, MSR, DR); - if (real_mode && (env->mmu_model =3D=3D POWERPC_MMU_SOFT_6xx || - env->mmu_model =3D=3D POWERPC_MMU_SOFT_4xx || - env->mmu_model =3D=3D POWERPC_MMU_REAL)) { + bool real_mode =3D (type =3D=3D ACCESS_CODE) ? !FIELD_EX64(env->msr, M= SR, IR) + : !FIELD_EX64(env->msr, MSR, DR= ); + if (real_mode) { ctx->raddr =3D eaddr; ctx->prot =3D PAGE_RWX; return 0; @@ -1113,6 +1101,8 @@ static int get_physical_address_wtlb(CPUPPCState *env= , mmu_ctx_t *ctx, case POWERPC_MMU_SOFT_6xx: return mmu6xx_get_physical_address(env, ctx, eaddr, access_type, t= ype); case POWERPC_MMU_SOFT_4xx: + /* avoid maybe used uninitialized warnings for unused fields in ct= x */ + memset(ctx, 0, sizeof(*ctx)); return mmu40x_get_physical_address(env, &ctx->raddr, &ctx->prot, e= addr, access_type); case POWERPC_MMU_REAL: @@ -1177,6 +1167,93 @@ static void booke206_update_mas_tlb_miss(CPUPPCState= *env, target_ulong address, env->spr[SPR_BOOKE_MAS0] |=3D env->last_way << MAS0_NV_SHIFT; } =20 +static bool ppc_booke_xlate(PowerPCCPU *cpu, vaddr eaddr, + MMUAccessType access_type, + hwaddr *raddrp, int *psizep, int *protp, + int mmu_idx, bool guest_visible) +{ + CPUState *cs =3D CPU(cpu); + CPUPPCState *env =3D &cpu->env; + hwaddr raddr; + int prot, ret; + + if (env->mmu_model =3D=3D POWERPC_MMU_BOOKE206) { + ret =3D mmubooke206_get_physical_address(env, &raddr, &prot, eaddr, + access_type, mmu_idx); + } else { + ret =3D mmubooke_get_physical_address(env, &raddr, &prot, eaddr, + access_type); + } + if (ret =3D=3D 0) { + *raddrp =3D raddr; + *protp =3D prot; + *psizep =3D TARGET_PAGE_BITS; + return true; + } else if (!guest_visible) { + return false; + } + + log_cpu_state_mask(CPU_LOG_MMU, cs, 0); + if (access_type =3D=3D MMU_INST_FETCH) { + switch (ret) { + case -1: + /* No matches in page tables or TLB */ + switch (env->mmu_model) { + case POWERPC_MMU_BOOKE206: + booke206_update_mas_tlb_miss(env, eaddr, access_type, mmu_= idx); + /* fall through */ + case POWERPC_MMU_BOOKE: + cs->exception_index =3D POWERPC_EXCP_ITLB; + env->error_code =3D 0; + env->spr[SPR_BOOKE_DEAR] =3D eaddr; + env->spr[SPR_BOOKE_ESR] =3D mmubooke206_esr(mmu_idx, acces= s_type); + break; + default: + g_assert_not_reached(); + } + break; + case -2: + /* Access rights violation */ + cs->exception_index =3D POWERPC_EXCP_ISI; + env->error_code =3D 0; + break; + case -3: + /* No execute protection violation */ + cs->exception_index =3D POWERPC_EXCP_ISI; + env->spr[SPR_BOOKE_ESR] =3D 0; + env->error_code =3D 0; + break; + } + } else { + switch (ret) { + case -1: + /* No matches in page tables or TLB */ + switch (env->mmu_model) { + case POWERPC_MMU_BOOKE206: + booke206_update_mas_tlb_miss(env, eaddr, access_type, mmu_= idx); + /* fall through */ + case POWERPC_MMU_BOOKE: + cs->exception_index =3D POWERPC_EXCP_DTLB; + env->error_code =3D 0; + env->spr[SPR_BOOKE_DEAR] =3D eaddr; + env->spr[SPR_BOOKE_ESR] =3D mmubooke206_esr(mmu_idx, acces= s_type); + break; + default: + g_assert_not_reached(); + } + break; + case -2: + /* Access rights violation */ + cs->exception_index =3D POWERPC_EXCP_DSI; + env->error_code =3D 0; + env->spr[SPR_BOOKE_DEAR] =3D eaddr; + env->spr[SPR_BOOKE_ESR] =3D mmubooke206_esr(mmu_idx, access_ty= pe); + break; + } + } + return false; +} + /* Perform address translation */ /* TODO: Split this by mmu_model. */ static bool ppc_jumbo_xlate(PowerPCCPU *cpu, vaddr eaddr, @@ -1229,15 +1306,6 @@ static bool ppc_jumbo_xlate(PowerPCCPU *cpu, vaddr e= addr, env->spr[SPR_40x_DEAR] =3D eaddr; env->spr[SPR_40x_ESR] =3D 0x00000000; break; - case POWERPC_MMU_BOOKE206: - booke206_update_mas_tlb_miss(env, eaddr, access_type, mmu_= idx); - /* fall through */ - case POWERPC_MMU_BOOKE: - cs->exception_index =3D POWERPC_EXCP_ITLB; - env->error_code =3D 0; - env->spr[SPR_BOOKE_DEAR] =3D eaddr; - env->spr[SPR_BOOKE_ESR] =3D mmubooke206_esr(mmu_idx, acces= s_type); - break; case POWERPC_MMU_REAL: cpu_abort(cs, "PowerPC in real mode should never raise " "any MMU exceptions\n"); @@ -1248,23 +1316,12 @@ static bool ppc_jumbo_xlate(PowerPCCPU *cpu, vaddr = eaddr, case -2: /* Access rights violation */ cs->exception_index =3D POWERPC_EXCP_ISI; - if ((env->mmu_model =3D=3D POWERPC_MMU_BOOKE) || - (env->mmu_model =3D=3D POWERPC_MMU_BOOKE206)) { - env->error_code =3D 0; - } else { - env->error_code =3D 0x08000000; - } + env->error_code =3D 0x08000000; break; case -3: /* No execute protection violation */ - if ((env->mmu_model =3D=3D POWERPC_MMU_BOOKE) || - (env->mmu_model =3D=3D POWERPC_MMU_BOOKE206)) { - env->spr[SPR_BOOKE_ESR] =3D 0x00000000; - env->error_code =3D 0; - } else { - env->error_code =3D 0x10000000; - } cs->exception_index =3D POWERPC_EXCP_ISI; + env->error_code =3D 0x10000000; break; case -4: /* Direct store exception */ @@ -1305,15 +1362,6 @@ static bool ppc_jumbo_xlate(PowerPCCPU *cpu, vaddr e= addr, env->spr[SPR_40x_ESR] =3D 0x00000000; } break; - case POWERPC_MMU_BOOKE206: - booke206_update_mas_tlb_miss(env, eaddr, access_type, mmu_= idx); - /* fall through */ - case POWERPC_MMU_BOOKE: - cs->exception_index =3D POWERPC_EXCP_DTLB; - env->error_code =3D 0; - env->spr[SPR_BOOKE_DEAR] =3D eaddr; - env->spr[SPR_BOOKE_ESR] =3D mmubooke206_esr(mmu_idx, acces= s_type); - break; case POWERPC_MMU_REAL: cpu_abort(cs, "PowerPC in real mode should never raise " "any MMU exceptions\n"); @@ -1330,10 +1378,6 @@ static bool ppc_jumbo_xlate(PowerPCCPU *cpu, vaddr e= addr, if (access_type =3D=3D MMU_DATA_STORE) { env->spr[SPR_40x_ESR] |=3D 0x00800000; } - } else if ((env->mmu_model =3D=3D POWERPC_MMU_BOOKE) || - (env->mmu_model =3D=3D POWERPC_MMU_BOOKE206)) { - env->spr[SPR_BOOKE_DEAR] =3D eaddr; - env->spr[SPR_BOOKE_ESR] =3D mmubooke206_esr(mmu_idx, acces= s_type); } else { env->spr[SPR_DAR] =3D eaddr; if (access_type =3D=3D MMU_DATA_STORE) { @@ -1412,6 +1456,10 @@ bool ppc_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAcce= ssType access_type, case POWERPC_MMU_32B: return ppc_hash32_xlate(cpu, eaddr, access_type, raddrp, psizep, protp, mmu_idx, guest_visible); + case POWERPC_MMU_BOOKE: + case POWERPC_MMU_BOOKE206: + return ppc_booke_xlate(cpu, eaddr, access_type, raddrp, + psizep, protp, mmu_idx, guest_visible); case POWERPC_MMU_MPC8xx: cpu_abort(env_cpu(&cpu->env), "MPC8xx MMU model is not implemented= \n"); default: --=20 2.30.9