From nobody Sat Apr 27 17:18:58 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1652709405755192.56309252597805; Mon, 16 May 2022 06:56:45 -0700 (PDT) Received: from localhost ([::1]:41210 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nqbDI-0005CR-Go for importer@patchew.org; Mon, 16 May 2022 09:56:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53922) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nqaZR-00061Y-QK for qemu-devel@nongnu.org; Mon, 16 May 2022 09:15:35 -0400 Received: from mx21.baidu.com ([220.181.3.85]:33222 helo=baidu.com) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nqaZK-0000FX-EN for qemu-devel@nongnu.org; Mon, 16 May 2022 09:15:30 -0400 Received: from BC-Mail-Ex11.internal.baidu.com (unknown [172.31.51.51]) by Forcepoint Email with ESMTPS id 1023731372F36320929D; Mon, 16 May 2022 21:15:14 +0800 (CST) Received: from bjkjy-mail-ex28.internal.baidu.com (172.31.50.44) by BC-Mail-Ex11.internal.baidu.com (172.31.51.51) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.20; Mon, 16 May 2022 21:15:14 +0800 Received: from BJHW-MAIL-EX28.internal.baidu.com (10.127.64.43) by bjkjy-mail-ex28.internal.baidu.com (172.31.50.44) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2375.18; Mon, 16 May 2022 21:15:09 +0800 Received: from BJHW-MAIL-EX28.internal.baidu.com ([169.254.129.92]) by BJHW-MAIL-EX28.internal.baidu.com ([169.254.129.92]) with mapi id 15.01.2308.020; Mon, 16 May 2022 21:15:09 +0800 From: "Wang,Liang(ACG CCN01)" To: "mst@redhat.com" , "marcel.apfelbaum@gmail.com" CC: "qemu-devel@nongnu.org" Subject: [PATCH] xio3130_downstream: Add ACS (Access Control Services) capability Thread-Topic: [PATCH] xio3130_downstream: Add ACS (Access Control Services) capability Thread-Index: AQHYaSbEC40ux3tuI0mx62i5C8IrJw== Date: Mon, 16 May 2022 13:15:09 +0000 Message-ID: <41ad928a29254bde80bef091fef72d36@baidu.com> Accept-Language: zh-CN, en-US Content-Language: zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.14.117.44] Content-Type: multipart/alternative; boundary="_000_41ad928a29254bde80bef091fef72d36baiducom_" MIME-Version: 1.0 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=220.181.3.85; envelope-from=wangliang40@baidu.com; helo=baidu.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Mon, 16 May 2022 09:52:48 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1652709407427100001 --_000_41ad928a29254bde80bef091fef72d36baiducom_ Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" When vfio-pci devices are attached to the downstream, pcie acs capability may be needed, Consistent with physical machine. It has been tested in our environment, and pcie acs capability is required in some scenarios. Signed-off-by: wangliang --- hw/pci-bridge/xio3130_downstream.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_dow= nstream.c index 05e2b06c0c..6ab13b47e2 100644 --- a/hw/pci-bridge/xio3130_downstream.c +++ b/hw/pci-bridge/xio3130_downstream.c @@ -40,6 +40,8 @@ #define XIO3130_SSVID_SSID 0 #define XIO3130_EXP_OFFSET 0x90 #define XIO3130_AER_OFFSET 0x100 +#define XIO3130_ACS_OFFSET \ + (XIO3130_AER_OFFSET + PCI_ERR_SIZEOF) static void xio3130_downstream_write_config(PCIDevice *d, uint32_t address, uint32_t val, int len) @@ -111,6 +113,8 @@ static void xio3130_downstream_realize(PCIDevice *d, Er= ror **errp) goto err; } + + pcie_acs_init(d, XIO3130_ACS_OFFSET); return; err: -- 2.24.3 (Apple Git-128) --_000_41ad928a29254bde80bef091fef72d36baiducom_ Content-Type: text/html; charset="gb2312" Content-Transfer-Encoding: quoted-printable

W= hen vfio-pci devices are attached to the downstream, pcie acs

c= apability may be needed, Consistent with physical machine.

<= /span>

I= t has been tested in our environment, and pcie acs capability

i= s required in some scenarios.

<= /span>

S= igned-off-by: wangliang <wangliang40@baidu.com>

-= --

<= span class=3D"Apple-converted-space"> hw/pci-bridge/xio3130_dow= nstream.c | 4 ++++

<= span class=3D"Apple-converted-space"> 1 file changed, 4 inserti= ons(+)

<= /span>

d= iff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_down= stream.c

i= ndex 05e2b06c0c..6ab13b47e2 100644

-= -- a/hw/pci-bridge/xio3130_downstream.c

&= #43;++ b/hw/pci-bridge/xio3130_downstream.c

@= @ -40,6 +40,8 @@

<= span class=3D"Apple-converted-space"> #define XIO3130_SSVID_SSI= D          &= nbsp;   0

<= span class=3D"Apple-converted-space"> #define XIO3130_EXP_OFFSE= T          &= nbsp;   0x90

<= span class=3D"Apple-converted-space"> #define XIO3130_AER_OFFSE= T          &= nbsp;   0x100

&= #43;#define XIO3130_ACS_OFFSET \

&= #43;        (XIO3130_AER_OFFSET + PCI_ERR_SIZEOF)

<= /span>

<= span class=3D"Apple-converted-space"> static void xio3130_downs= tream_write_config(PCIDevice *d, uint32_t address,

<= span class=3D"Apple-converted-space">          &nb= sp;                     &= nbsp;         uint32_t val, int len)

@= @ -111,6 +113,8 @@ static void xio3130_downstream_realize(PCIDevice *d,= Error **errp)

<= span class=3D"Apple-converted-space">         goto err;

<= span class=3D"Apple-converted-space">     }

<= /span>

&= #43;

&= #43;    pcie_acs_init(d, XIO3130_ACS_OFFSET);

<= span class=3D"Apple-converted-space">     return;

<= /span>

<= span class=3D"Apple-converted-space"> err:

-= -

2= .24.3 (Apple Git-128)


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