From nobody Tue Nov 18 10:40:14 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1609586837; cv=none; d=zohomail.com; s=zohoarc; b=GxPrhZb26i1W4Pipkgux1ze5GmUt9p2HSE/kMGO2pKwiURsrWJcoITp+/blCtcwke0Udze3lrN8D+sONRHCWaYb7rwdAO/dG2Ko1R7Ie3MWqGMSX+Ak1Ej63T4m1lk+B7i15w+53ZYLXDBbf2MmqkUge7BZdrccr4cyaM3t78Rg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1609586837; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=ok1O6U92LA6s9I78l79cmiPiAFjO4I/nJ/GA0dA1Lsc=; b=BbwVxfJTSajjtOfe8pmB5qOSOuXS1SsLLR5b+VDWyF1Tv8LKc3bPE8NEM3SV7CW6aO22b4OzQF4rcHYiZTZ18R8DrtTt5gFSS6l1jrB+7+CZT1cLZ6Vv3Nh4AtJH9AUx7l+B7UAk//9WFdQ+LoBKui5ZNf15u/T5pwwBCHGm0QU= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1609586837224367.5527591131638; Sat, 2 Jan 2021 03:27:17 -0800 (PST) Received: from localhost ([::1]:55520 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kvf40-0008JM-2v for importer@patchew.org; Sat, 02 Jan 2021 06:27:16 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33246) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kveqx-0000tF-3M for qemu-devel@nongnu.org; Sat, 02 Jan 2021 06:13:47 -0500 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:56515) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kveqs-000791-07 for qemu-devel@nongnu.org; Sat, 02 Jan 2021 06:13:46 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id E40C174760F; Sat, 2 Jan 2021 12:13:31 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 2EDDD747619; Sat, 2 Jan 2021 12:13:30 +0100 (CET) Message-Id: <397aec5d97c4bd0b015e531860594afbfcc44bc2.1609584216.git.balaton@eik.bme.hu> In-Reply-To: References: Subject: [PATCH 20/24] vt82c686: Fix superio_cfg_{read,write}() functions Date: Sat, 02 Jan 2021 11:43:35 +0100 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Huacai Chen , f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Reply-to: BALATON Zoltan From: BALATON Zoltan via Content-Type: text/plain; charset="utf-8" These functions are memory region callbacks so we have to check against relative address not the mapped address. Also reduce indentation by returning early and log unimplemented accesses. Additionally we remove separate index value from SuperIOConfig and store the index at reg 0 which is reserved and returns 0 on read. This simpilifies object state. Signed-off-by: BALATON Zoltan --- hw/isa/vt82c686.c | 63 ++++++++++++++++++++++++++--------------------- 1 file changed, 35 insertions(+), 28 deletions(-) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 3a45056226..1a876a1fbf 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -26,6 +26,7 @@ #include "hw/acpi/acpi.h" #include "hw/i2c/pm_smbus.h" #include "qapi/error.h" +#include "qemu/log.h" #include "qemu/module.h" #include "qemu/range.h" #include "qemu/timer.h" @@ -250,7 +251,6 @@ static const TypeInfo vt8231_pm_info =3D { =20 typedef struct SuperIOConfig { uint8_t regs[0x100]; - uint8_t index; MemoryRegion io; } SuperIOConfig; =20 @@ -258,42 +258,49 @@ static void superio_cfg_write(void *opaque, hwaddr ad= dr, uint64_t data, unsigned size) { SuperIOConfig *sc =3D opaque; + uint8_t idx =3D sc->regs[0]; =20 - if (addr =3D=3D 0x3f0) { /* config index register */ - sc->index =3D data & 0xff; - } else { - bool can_write =3D true; - /* 0x3f1, config data register */ - trace_via_superio_write(sc->index, data & 0xff); - switch (sc->index) { - case 0x00 ... 0xdf: - case 0xe4: - case 0xe5: - case 0xe9 ... 0xed: - case 0xf3: - case 0xf5: - case 0xf7: - case 0xf9 ... 0xfb: - case 0xfd ... 0xff: - can_write =3D false; - break; - /* case 0xe6 ... 0xe8: Should set base port of parallel and serial= */ - default: - break; + if (addr =3D=3D 0) { /* config index register */ + sc->regs[0] =3D data; + return; + } =20 - } - if (can_write) { - sc->regs[sc->index] =3D data & 0xff; - } + /* config data register */ + trace_via_superio_write(idx, data); + switch (idx) { + case 0x00 ... 0xdf: + case 0xe4: + case 0xe5: + case 0xe9 ... 0xed: + case 0xf3: + case 0xf5: + case 0xf7: + case 0xf9 ... 0xfb: + case 0xfd ... 0xff: + /* ignore write to read only registers */ + return; + /* case 0xe6 ... 0xe8: Should set base port of parallel and serial */ + default: + qemu_log_mask(LOG_UNIMP, + "via_superio_cfg: unimplemented register 0x%x\n", id= x); + break; } + sc->regs[idx] =3D data; } =20 static uint64_t superio_cfg_read(void *opaque, hwaddr addr, unsigned size) { SuperIOConfig *sc =3D opaque; - uint8_t val =3D sc->regs[sc->index]; + uint8_t idx =3D sc->regs[0]; + uint8_t val =3D sc->regs[idx]; =20 - trace_via_superio_read(sc->index, val); + if (addr =3D=3D 0) { + return idx; + } + if (addr =3D=3D 1 && idx =3D=3D 0) { + val =3D 0; /* reading reg 0 where we store index value */ + } + trace_via_superio_read(idx, val); return val; } =20 --=20 2.21.3