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X-Received-From: 216.71.153.141 Subject: [Qemu-devel] [PATCH v1 01/27] target/riscv: Don't set write permissions on dirty PTEs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, palmer@sifive.com, alistair.francis@wdc.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Setting write permission on dirty PTEs results in userspace inside a Hypervisor guest (VU) becoming corrupted. This appears to be becuase it ends up with write permission in the second stage translation in cases where we aren't doing a store. Signed-off-by: Alistair Francis --- target/riscv/cpu_helper.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index b1bee3d45d..872835177a 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -326,10 +326,8 @@ restart: if ((pte & PTE_X)) { *prot |=3D PAGE_EXEC; } - /* add write permission on stores or if the page is already di= rty, - so that we TLB miss on later writes to update the dirty bit= */ - if ((pte & PTE_W) && - (access_type =3D=3D MMU_DATA_STORE || (pte & PTE_D))) { + /* add write permission on stores */ + if ((pte & PTE_W) && (access_type =3D=3D MMU_DATA_STORE)) { *prot |=3D PAGE_WRITE; } return TRANSLATE_SUCCESS; --=20 2.21.0