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x=1614899388; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tS5/RYzfypa8UbTHT+8AIRjr2yDX25RBNIWTk7q2aqE=; b=hbsHZCPad/BVRzrnPrw4uCeco24HQ0B4OonZW/eZuTh2dMrmm3ffCxCL V2+dWSsE+Bw6FHX0VrkVsWnbDkZe8vrcFkvBcIN9plpWHTBe8k5HblyvH v7u5Y9yNuGii2ND7YrHrAuj1qLIMypy2TLq8u/YllQQJqm8rZyWAjY4DS QDTD9Tx4RIufUUWt1PdAx8ObMJPG+2PPsscDRLNtDMtAOEFJUj/ia5nde uY0XAFqG/sUtLzUB8eEcT0h6ilPdqPWQ84T/QmGCzj3CjHk+tsa+DSe28 mSfSOvAyZkSCQIoSzftZuIX6ioS2eo9hwIhTVjvMeb7yFmrq0PmYjCkDT Q==; IronPort-SDR: jrCXHObxTmDKEm/h2ZTm66pw1Th3Ga5rlLUO/UEYYiAIuFd1JSOoFJFoVuC7Z6rK6y28nbBIGX fJOGjkT9Hg4FP4jF2hw/Th7Uor9I01bkU4rZy5+c7xNPFoeUphpxF1BcmCuX3Fcp63S4Q6Trxi usfU8ynxskFlsvtHvug+elG9Rn+LMdMCEv/hi/Dhz4jYSo0BOs6VLXNr5x0ZoardcqnRlsTYNq fYXgs2CRo0tmdFpXFPyh5VHcx7r5klPz3cFURqBeekku2GQ2RLBZ3AFLWIX7/RalKueQpiuHLs 0X4= X-IronPort-AV: E=Sophos;i="5.70,515,1574092800"; d="scan'208";a="131477247" IronPort-SDR: axKrKTCEOTEJ08L/PWoWqH/QHKexsBnmjAW5yvJ6qOc+mQPsNEpqGZ94iNLL/8vlwh8W5rZBBv MIDBZFCONH8rA3xnKU9wok/XMiHEuoarqhGOc2szisbfOgKtjCO6Gz8owSyoD4onojZ6sRDs8c 6Xvrrs1M9nmZJDgMfudVMYb39rZsis0JQR4rDyYWf87QjawRjtwlskL4Jq/Ui7jJdJrdBKCQTT JexwSvWWi2tYqCIgFstf8YNZSxODt25Ge+cfhsUL6cnkYiarVNaxDbzaN4B87YF42L6iY24njm +xm7nL5jwFbDKLp8Kf9ihbgN IronPort-SDR: pCYkyyjdUfZ4L5T2j+POINtVe9Mnim3T5sxviv2INBJNgDwd+x2LITu0IXmY92qTi3oOJPqBTO dl/M37Gi9/kMu7d73LWVHR9wo5HTImO63ASgNSAISekojbQKnvkCGkfbuhwo0q5RbUhsex+w5I qvNDy6or8BP90gsNF/4MZQgWjcixzt5g1jZiWcWKboYZkNeOso1ICWaoenBAC6GNyIiyGhKbTZ /d1Nue3BQNhReX3ntWRp5yJq0GRBF/zOkDp0kOIN/DKjm9MU1NEbzt722F1/O15CjU4prPGlio Sp0= WDCIronportException: Internal From: Alistair Francis To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH v2 3/3] riscv/sifive_u: Add a serial property to the sifive_u machine Date: Wed, 4 Mar 2020 15:02:33 -0800 Message-Id: <237a53529eae97b79e63938cd45672f1420ab954.1583362888.git.alistair.francis@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 216.71.154.42 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair.francis@wdc.com, palmer@dabbelt.com, alistair23@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Bin Meng At present the board serial number is hard-coded to 1, and passed to OTP model during initialization. Firmware (FSBL, U-Boot) uses the serial number to generate a unique MAC address for the on-chip ethernet controller. When multiple QEMU 'sifive_u' instances are created and connected to the same subnet, they all have the same MAC address hence it creates a unusable network. A new "serial" property is introduced to specify the board serial number. When not given, the default serial number 1 is used. Signed-off-by: Bin Meng Reviewed-by: Palmer Dabbelt Reviewed-by: Alistair Francis Message-Id: <1573916930-19068-1-git-send-email-bmeng.cn@gmail.com> [ Changed by AF: - Use the SoC's serial property to pass the info to the SoC - Fixup commit title - Rebase on file restructuring ] Signed-off-by: Alistair Francis --- hw/riscv/sifive_u.c | 20 ++++++++++++++++++++ include/hw/riscv/sifive_u.h | 1 + 2 files changed, 21 insertions(+) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index aed8249d0b..4299a5addc 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -34,6 +34,7 @@ #include "qemu/log.h" #include "qemu/error-report.h" #include "qapi/error.h" +#include "qapi/visitor.h" #include "hw/boards.h" #include "hw/loader.h" #include "hw/sysbus.h" @@ -322,6 +323,8 @@ static void riscv_sifive_u_init(MachineState *machine) object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), TYPE_RISCV_U_SOC, &error_abort, NULL); + object_property_set_uint(OBJECT(&s->soc), s->serial, "serial", + &error_abort); object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_abort); =20 @@ -413,6 +416,18 @@ static void sifive_u_set_start_in_flash(Object *obj, b= ool value, Error **errp) s->start_in_flash =3D value; } =20 +static void sifive_u_get_serial(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + visit_type_uint32(v, name, (uint32_t *)opaque, errp); +} + +static void sifive_u_set_serial(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + visit_type_uint32(v, name, (uint32_t *)opaque, errp); +} + static void riscv_sifive_u_machine_instance_init(Object *obj) { SiFiveUState *s =3D RISCV_U_MACHINE(obj); @@ -424,6 +439,11 @@ static void riscv_sifive_u_machine_instance_init(Objec= t *obj) "Set on to tell QEMU's ROM to jump to = " \ "flash. Otherwise QEMU will jump to DR= AM", NULL); + + s->serial =3D OTP_SERIAL; + object_property_add(obj, "serial", "uint32", sifive_u_get_serial, + sifive_u_set_serial, NULL, &s->serial, NULL); + object_property_set_description(obj, "serial", "Board serial number", = NULL); } =20 =20 diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h index a2baa1de5f..16c297ec5f 100644 --- a/include/hw/riscv/sifive_u.h +++ b/include/hw/riscv/sifive_u.h @@ -61,6 +61,7 @@ typedef struct SiFiveUState { int fdt_size; =20 bool start_in_flash; + uint32_t serial; } SiFiveUState; =20 enum { --=20 2.25.1