From nobody Fri Oct 23 20:56:30 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1792674123; cv=none; d=zohomail.com; s=zohoarc; b=Vt5vmK1XLV/VnUbU8UQJYUWTVDqh+hSob/Ex5xy07u7IWrC+8t4KCJ12lF31Bu1aY8q7QCaYgE1GX4/pNIRVAuaauyYXx7DfjaRaAlVCplJZK5XgVWUxsHFeBQAX2v35QirV2xgIoVA/mlzz3mHy25pgTfRbd0S23eHu8PI61zw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1792674123; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:Sender:Subject:Subject:To:To:Message-Id; bh=jjJ6axivM3BY8K+twFhLDYhd+Jr+0w/wM7P65srGIQc=; b=m4Kgw8ymBQY+crDmJLYDyzA0udT0LwyqQKm3FzVC32Z62MSJfxXSzU4EF61ATVcWtWWTzv9P4FCx7lbjgPEiLBNQaF03pVfK9QGhwfB4UcIQ9vg+eW+cxbZyRZWdOUQMMjnkff0ajJhMPCv8tnpkHgM2toJZQ+xehPzRt75Lh8w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17926741227273.9016322422895655; Thu, 22 Oct 2026 06:02:02 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1xJsQc-0003fA-6P; Thu, 22 Oct 2026 09:01:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1xJsQF-0003YL-CY; Thu, 22 Oct 2026 09:01:37 -0400 Received: from rev.ng ([94.130.142.21]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1xJsQD-0007fH-EY; Thu, 22 Oct 2026 09:01:31 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=rev.ng; s=dkim; h=Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:Cc: To:From:Sender:Reply-To:Content-Type:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: In-Reply-To:References:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive:List-Unsubscribe:List-Unsubscribe-Post: List-Help; bh=jjJ6axivM3BY8K+twFhLDYhd+Jr+0w/wM7P65srGIQc=; b=UojPygE/LNOkaLL paPzmJ1+01Up4uYba62sPRYmYpHPJ7F0sayXH/FQBcJJfn6tSSF6SWYO18ckDGwTfBnfByePV+JC7 NO4H/SJlQXFEkdec45HxhC57qifNgugWDwRP/zWnyQJKJCjKYF23hurE+3hV93/dFgq8ecCFF41k+ H8=; To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, palmer@dabbelt.com, alistair.francis@wdc.com, daniel.barboza@oss.qualcomm.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, chao.liu@processmission.com, Anton Johansson Subject: [PATCH] target/riscv: Fix CPU state access on big-endian hosts Date: Thu, 22 Oct 2026 15:06:57 +0200 Message-ID: <20261022130657.6449-1-anjo@rev.ng> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=94.130.142.21; envelope-from=anjo@rev.ng; helo=rev.ng X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Anton Johansson From: Anton Johansson via qemu development Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1792674126525158500 Content-Type: text/plain; charset="utf-8" mstatus and mstatus_hs are uint64_t but accessed through tcg_gen_[ld|st]_tl(..., offsetof(mstatus)) which on a big-endian host running riscv32 incorrectly accesses the top 32 bits rather than the lower bits. Widen the operations to 64 bit so the lower bits are modified. Signed-off-by: Anton Johansson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Tommaso Califano --- target/riscv/tcg/translate.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/target/riscv/tcg/translate.c b/target/riscv/tcg/translate.c index ede9c2563f..79b0f444ef 100644 --- a/target/riscv/tcg/translate.c +++ b/target/riscv/tcg/translate.c @@ -693,7 +693,7 @@ static TCGv get_address_indexed(DisasContext *ctx, int = rs1, TCGv offs) */ static void mark_fs_dirty(DisasContext *ctx) { - TCGv tmp; + TCGv_i64 tmp; =20 if (!has_ext(ctx, RVF)) { return; @@ -703,15 +703,15 @@ static void mark_fs_dirty(DisasContext *ctx) /* Remember the state change for the rest of the TB. */ ctx->mstatus_fs =3D EXT_STATUS_DIRTY; =20 - tmp =3D tcg_temp_new(); - tcg_gen_ld_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus)); - tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS); - tcg_gen_st_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus)); + tmp =3D tcg_temp_new_i64(); + tcg_gen_ld_i64(tmp, tcg_env, offsetof(CPURISCVState, mstatus)); + tcg_gen_ori_i64(tmp, tmp, MSTATUS_FS); + tcg_gen_st_i64(tmp, tcg_env, offsetof(CPURISCVState, mstatus)); =20 if (ctx->virt_enabled) { - tcg_gen_ld_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus_hs= )); - tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS); - tcg_gen_st_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus_hs= )); + tcg_gen_ld_i64(tmp, tcg_env, offsetof(CPURISCVState, mstatus_h= s)); + tcg_gen_ori_i64(tmp, tmp, MSTATUS_FS); + tcg_gen_st_i64(tmp, tcg_env, offsetof(CPURISCVState, mstatus_h= s)); } } } @@ -726,21 +726,21 @@ static inline void mark_fs_dirty(DisasContext *ctx) {= } */ static void mark_vs_dirty(DisasContext *ctx) { - TCGv tmp; + TCGv_i64 tmp; =20 if (ctx->mstatus_vs !=3D EXT_STATUS_DIRTY) { /* Remember the state change for the rest of the TB. */ ctx->mstatus_vs =3D EXT_STATUS_DIRTY; =20 - tmp =3D tcg_temp_new(); - tcg_gen_ld_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus)); - tcg_gen_ori_tl(tmp, tmp, MSTATUS_VS); - tcg_gen_st_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus)); + tmp =3D tcg_temp_new_i64(); + tcg_gen_ld_i64(tmp, tcg_env, offsetof(CPURISCVState, mstatus)); + tcg_gen_ori_i64(tmp, tmp, MSTATUS_VS); + tcg_gen_st_i64(tmp, tcg_env, offsetof(CPURISCVState, mstatus)); =20 if (ctx->virt_enabled) { - tcg_gen_ld_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus_hs= )); - tcg_gen_ori_tl(tmp, tmp, MSTATUS_VS); - tcg_gen_st_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus_hs= )); + tcg_gen_ld_i64(tmp, tcg_env, offsetof(CPURISCVState, mstatus_h= s)); + tcg_gen_ori_i64(tmp, tmp, MSTATUS_VS); + tcg_gen_st_i64(tmp, tcg_env, offsetof(CPURISCVState, mstatus_h= s)); } } } --=20 2.52.0