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Fri, 02 Oct 2026 13:20:30 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 01/22] linux-headers: Add RME related definitions Date: Fri, 2 Oct 2026 14:20:05 -0600 Message-ID: <20261002202026.1204110-2-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:3b::29; envelope-from=mathieu.poirier@linaro.org; helo=mail-pz2-x29.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972492203158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker This is a temporary patch intended for testing purposes only. It provides definitions related to supporting Realms by the QEMU-VMM. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mathieu Poirier --- linux-headers/linux/kvm.h | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index 7850bd464222..686c199e2558 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -689,14 +689,19 @@ struct kvm_enable_cap { * address size for the VM. Bits[7-0] are reserved for the guest * PA size shift (i.e, log2(PA_Size)). For backward compatibility, * value 0 implies the default IPA size, 40bits. + * + * Bits[30-31] are reserved for the VM type */ #define KVM_VM_TYPE_ARM_IPA_SIZE_MASK 0xffULL #define KVM_VM_TYPE_ARM_IPA_SIZE(x) \ ((x) & KVM_VM_TYPE_ARM_IPA_SIZE_MASK) =20 +#define KVM_VM_TYPE_ARM_NORMAL 0 +#define KVM_VM_TYPE_ARM_REALM (1UL << 30) #define KVM_VM_TYPE_ARM_PROTECTED (1UL << 31) #define KVM_VM_TYPE_ARM_MASK (KVM_VM_TYPE_ARM_IPA_SIZE_MASK | \ - KVM_VM_TYPE_ARM_PROTECTED) + KVM_VM_TYPE_ARM_PROTECTED | \ + KVM_VM_TYPE_ARM_REALM) =20 /* * ioctls for /dev/kvm fds: @@ -988,6 +993,7 @@ struct kvm_enable_cap { #define KVM_CAP_S390_HPAGE_2G 249 #define KVM_CAP_PPC_COMPAT_CAPS 250 #define KVM_CAP_GUEST_MEMFD_MEMORY_ATTRIBUTES 252 +#define KVM_CAP_ARM_RMI 253 =20 struct kvm_irq_routing_irqchip { __u32 irqchip; @@ -1674,4 +1680,14 @@ struct kvm_pre_fault_memory { __u64 padding[5]; }; =20 +#define KVM_ARM_RMI_POPULATE _IOWR(KVMIO, 0xd7, struct kvm_arm_rmi_popul= ate) +#define KVM_ARM_RMI_POPULATE_FLAGS_MEASURE (1 << 0) +struct kvm_arm_rmi_populate { + __u64 base; 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Fri, 02 Oct 2026 13:20:32 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 02/22] target/arm: Add confidential guest support Date: Fri, 2 Oct 2026 14:20:06 -0600 Message-ID: <20261002202026.1204110-3-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=mathieu.poirier@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972638946158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker Add a new RmeGuest object, inheriting from ConfidentialGuestSupport, to support the Arm Realm Management Extension (RME). It is instantiated by passing on the command-line: -M virt,confidential-guest-support=3D -object rme-guest,id=3D This is only the skeleton. Support will be added in following patches. Signed-off-by: Jean-Philippe Brucker Acked-by: Markus Armbruster Signed-off-by: Mathieu Poirier --- docs/system/confidential-guest-support.rst | 1 + qapi/qom.json | 13 +++++++ target/arm/kvm-rme.c | 42 ++++++++++++++++++++++ target/arm/meson.build | 5 ++- 4 files changed, 60 insertions(+), 1 deletion(-) create mode 100644 target/arm/kvm-rme.c diff --git a/docs/system/confidential-guest-support.rst b/docs/system/confi= dential-guest-support.rst index 562a7c3c2852..abb56923ad13 100644 --- a/docs/system/confidential-guest-support.rst +++ b/docs/system/confidential-guest-support.rst @@ -42,5 +42,6 @@ Currently supported confidential guest mechanisms are: * POWER Protected Execution Facility (PEF) (see :ref:`power-papr-protected= -execution-facility-pef`) * s390x Protected Virtualization (PV) (see :doc:`s390x/protvirt`) * AWS Nitro Enclaves (see :doc:`nitro`) +* Arm Realm Management Extension (RME) =20 Other mechanisms may be supported in future. diff --git a/qapi/qom.json b/qapi/qom.json index 54495d4fb6f1..5f04264d02fc 100644 --- a/qapi/qom.json +++ b/qapi/qom.json @@ -1289,6 +1289,17 @@ 'data': { '*pretty': 'bool', '*close-action': 'MonitorQMPCloseAction' } } =20 +## +# @RmeGuestProperties: +# +# Properties for rme-guest objects. +# +# Since: 11.2 +## +{ 'struct': 'RmeGuestProperties', + 'base': 'ConfidentialGuestSupportProperties', + 'data': {} } + ## # @ObjectType: # @@ -1345,6 +1356,7 @@ { 'name': 'pr-manager-helper', 'if': 'CONFIG_LINUX' }, 'qtest', + 'rme-guest', 'rng-builtin', 'rng-egd', { 'name': 'rng-random', @@ -1424,6 +1436,7 @@ 'pr-manager-helper': { 'type': 'PrManagerHelperProperties', 'if': 'CONFIG_LINUX' }, 'qtest': 'QtestProperties', + 'rme-guest': 'RmeGuestProperties', 'rng-builtin': 'RngProperties', 'rng-egd': 'RngEgdProperties', 'rng-random': { 'type': 'RngRandomProperties', diff --git a/target/arm/kvm-rme.c b/target/arm/kvm-rme.c new file mode 100644 index 000000000000..42e1d1e7b859 --- /dev/null +++ b/target/arm/kvm-rme.c @@ -0,0 +1,42 @@ +/* + * QEMU Arm RME support + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * Copyright Linaro 2026 + */ + +#include "qemu/osdep.h" + +#include "hw/core/boards.h" +#include "hw/core/cpu.h" +#include "kvm_arm.h" +#include "migration/blocker.h" +#include "qapi/error.h" +#include "qom/object_interfaces.h" +#include "system/confidential-guest-support.h" +#include "system/kvm.h" +#include "system/runstate.h" + +#define TYPE_RME_GUEST "rme-guest" +OBJECT_DECLARE_SIMPLE_TYPE(RmeGuest, RME_GUEST) + +struct RmeGuest { + ConfidentialGuestSupport parent_obj; +}; + +OBJECT_DEFINE_SIMPLE_TYPE_WITH_INTERFACES(RmeGuest, rme_guest, RME_GUEST, + CONFIDENTIAL_GUEST_SUPPORT, + { TYPE_USER_CREATABLE }, { }) + +static void rme_guest_class_init(ObjectClass *oc, const void *data) +{ +} + +static void rme_guest_init(Object *obj) +{ +} + +static void rme_guest_finalize(Object *obj) +{ +} diff --git a/target/arm/meson.build b/target/arm/meson.build index 0369f96b4cc6..9d322a7aad28 100644 --- a/target/arm/meson.build +++ b/target/arm/meson.build @@ -31,7 +31,10 @@ arm_common_user_system_ss.add(when: 'TARGET_AARCH64', if= _true: files( arm_common_system_ss.add(files( 'arm-qmp-cmds.c', )) -arm_system_ss.add(when: 'CONFIG_KVM', if_true: files('hyp_gdbstub.c', 'kvm= .c')) +arm_system_ss.add(when: 'CONFIG_KVM', if_true: files( + 'hyp_gdbstub.c', + 'kvm.c', + 'kvm-rme.c')) arm_system_ss.add(when: 'CONFIG_HVF', if_true: files('hyp_gdbstub.c')) =20 arm_user_ss.add(files('cpu.c')) --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Fri, 02 Oct 2026 13:20:34 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 03/22] target/arm/kvm-rme: Add mechanic to initialize realms Date: Fri, 2 Oct 2026 14:20:07 -0600 Message-ID: <20261002202026.1204110-4-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::11; envelope-from=mathieu.poirier@linaro.org; helo=mail-pj2-x11.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972673115158500 Content-Type: text/plain; charset="utf-8" Initialise an @rme_guest object and install a handler to get notified when the Realm is ready to start. That way we can finish reading the Realm once we know everything is in place. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Lorenzo Pieralisi Signed-off-by: Mathieu Poirier --- target/arm/kvm-rme.c | 51 ++++++++++++++++++++++++++++++++++++++++++++ target/arm/kvm.c | 15 +++++++++++-- 2 files changed, 64 insertions(+), 2 deletions(-) diff --git a/target/arm/kvm-rme.c b/target/arm/kvm-rme.c index 42e1d1e7b859..a4a5e195c196 100644 --- a/target/arm/kvm-rme.c +++ b/target/arm/kvm-rme.c @@ -13,6 +13,7 @@ #include "kvm_arm.h" #include "migration/blocker.h" #include "qapi/error.h" +#include "qemu/error-report.h" #include "qom/object_interfaces.h" #include "system/confidential-guest-support.h" #include "system/kvm.h" @@ -29,12 +30,62 @@ OBJECT_DEFINE_SIMPLE_TYPE_WITH_INTERFACES(RmeGuest, rme= _guest, RME_GUEST, CONFIDENTIAL_GUEST_SUPPORT, { TYPE_USER_CREATABLE }, { }) =20 +static RmeGuest *rme_guest; + +static void rme_vm_state_change(void *opaque, bool running, RunState state) +{ + if (!running) { + return; + } + + kvm_mark_guest_state_protected(); +} + +static int kvm_arm_rme_init(ConfidentialGuestSupport *cgs, Error **errp) +{ + KVMState *s =3D KVM_STATE(current_accel()); + static Error *rme_mig_blocker; + + if (!rme_guest) { + return 0; + } + + if (!kvm_vm_check_extension(s, KVM_CAP_ARM_RMI)) { + error_setg(errp, "VM doesn't support Realms"); + return -ENODEV; + } + + error_setg(&rme_mig_blocker, "RME: migration is not implemented"); + migrate_add_blocker(&rme_mig_blocker, &error_fatal); + + /* + * The realm activation is done last, when the VM starts, after all im= ages + * have been loaded and all vcpus finalized. + */ + qemu_add_vm_change_state_handler(rme_vm_state_change, NULL); + + cgs->require_guest_memfd =3D true; + cgs->ready =3D true; + return 0; +} + static void rme_guest_class_init(ObjectClass *oc, const void *data) { + ConfidentialGuestSupportClass *klass =3D CONFIDENTIAL_GUEST_SUPPORT_CL= ASS(oc); + + klass->kvm_init =3D kvm_arm_rme_init; } =20 static void rme_guest_init(Object *obj) { + ConfidentialGuestSupport *cgs =3D CONFIDENTIAL_GUEST_SUPPORT(obj); + + if (rme_guest) { + error_report("a single instance of RmeGuest is supported"); + exit(1); + } + rme_guest =3D RME_GUEST(obj); + cgs->allow_convert_in_place =3D true; } =20 static void rme_guest_finalize(Object *obj) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 3d905f8565de..8b6f602ebe77 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -33,6 +33,7 @@ #include "hw/pci/pci.h" #include "exec/memattrs.h" #include "system/address-spaces.h" +#include "system/confidential-guest-support.h" #include "gdbstub/enums.h" #include "hw/core/boards.h" #include "hw/core/irq.h" @@ -639,7 +640,8 @@ int kvm_arch_get_default_type(MachineState *ms) =20 int kvm_arch_init(MachineState *ms, KVMState *s) { - int ret; + Error *local_err =3D NULL; + int ret =3D 0; /* For ARM interrupt delivery is always asynchronous, * whether we are using an in-kernel VGIC or not. */ @@ -653,6 +655,15 @@ int kvm_arch_init(MachineState *ms, KVMState *s) =20 cap_has_mp_state =3D kvm_check_extension(s, KVM_CAP_MP_STATE); =20 + /* Initialize confidential guest (Realm) if needed */ + if (ms->cgs) { + ret =3D confidential_guest_kvm_init(ms->cgs, &local_err); + if (ret < 0) { + error_report_err(local_err); + return ret; + } + } + /* Check whether user space can specify guest syndrome value */ cap_has_inject_serror_esr =3D kvm_check_extension(s, KVM_CAP_ARM_INJECT_SERROR_ESR); @@ -703,7 +714,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) hw_breakpoints =3D g_array_sized_new(true, true, sizeof(HWBreakpoint), max_hw_bps); =20 - return 0; + return ret; } =20 unsigned long kvm_arch_vcpu_id(CPUState *cpu) --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1790972482; cv=none; d=zohomail.com; s=zohoarc; b=h7YGiM/38YTtnFKQaAL0ptp8omOd9oEqtfP4XWZovykZkkzsyIF/ULwaEYJo2quuuqdbmObdmB4wzfmwI+jMWZcL0SUdukNp+MLmxKFsZ+e/nfvAr8dHrK4ebAM/6bIDLYZcgG/OwGq1Jd0QK2rq4UF2dZcTPw1KiGc4OHlbQuo= ARC-Message-Signature: i=1; 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Fri, 02 Oct 2026 13:20:35 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 04/22] target/arm/kvm: Split kvm_arch_get/put_registers Date: Fri, 2 Oct 2026 14:20:08 -0600 Message-ID: <20261002202026.1204110-5-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::10; envelope-from=mathieu.poirier@linaro.org; helo=mail-pj2-x10.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972484476158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker For a Realm, KVM is much more restrictive on the registers a VMM can initialize. To prepare for Realm VM initialization, split the get/put register functions for a non-secure VM in their own function. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mathieu Poirier --- target/arm/kvm.c | 30 ++++++++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 8b6f602ebe77..60272b8c040d 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -2212,7 +2212,7 @@ static int kvm_arch_put_sve(CPUState *cs, uint32_t vq= , bool have_ffr) return 0; } =20 -int kvm_arch_put_registers(CPUState *cs, KvmPutState level, Error **errp) +static int kvm_arm_put_core_regs(CPUState *cs, Error **errp) { uint64_t val; uint32_t fpr; @@ -2315,6 +2315,19 @@ int kvm_arch_put_registers(CPUState *cs, KvmPutState= level, Error **errp) return ret; } =20 + return 0; +} + +int kvm_arch_put_registers(CPUState *cs, KvmPutState level, Error **errp) +{ + int ret; + ARMCPU *cpu =3D ARM_CPU(cs); + + ret =3D kvm_arm_put_core_regs(cs, errp); + if (ret) { + return ret; + } + write_cpustate_to_list(cpu, true); =20 if (!write_list_to_kvmstate(cpu, level)) { @@ -2397,7 +2410,7 @@ static int kvm_arch_get_sve(CPUState *cs, uint32_t vq= , bool have_ffr) return 0; } =20 -int kvm_arch_get_registers(CPUState *cs, Error **errp) +static int kvm_arm_get_core_regs(CPUState *cs, Error **errp) { uint64_t val; unsigned int el; @@ -2500,6 +2513,19 @@ int kvm_arch_get_registers(CPUState *cs, Error **err= p) } vfp_set_fpcr(env, fpr); =20 + return 0; +} + +int kvm_arch_get_registers(CPUState *cs, Error **errp) +{ + int ret; + ARMCPU *cpu =3D ARM_CPU(cs); + + ret =3D kvm_arm_get_core_regs(cs, errp); + if (ret) { + return ret; + } + ret =3D kvm_get_vcpu_events(cpu); if (ret) { return ret; --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1790972547; cv=none; d=zohomail.com; s=zohoarc; b=X3S3G5J/+AofUSO9o5dUv7HzgLbXUPHrcBxo/EqLpYgCh3gcWh2hJX3HWlfhLnU9+7pG2VuCRQJGq/4A4Zugvnd2bkSV4ZUNCsTG5SVfM8XgCsyKbdcorduj9bPNdcWWzBv6mf1L3Cl8mlcv5VkVq7YhBarYk9QOt+NHEqaAD08= ARC-Message-Signature: i=1; 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Fri, 02 Oct 2026 13:20:37 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 05/22] target/arm/kvm-rme: Initialize vCPU Date: Fri, 2 Oct 2026 14:20:09 -0600 Message-ID: <20261002202026.1204110-6-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:3b::e; envelope-from=mathieu.poirier@linaro.org; helo=mail-pz2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972548524158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker The target code calls kvm_arm_vcpu_init() to mark the vCPU as part of a Realm. For a Realm vCPU, only x0-x7 can be set at runtime. Before boot, the PC can also be set, and is ignored at runtime. KVM also accepts a few system register changes during initial configuration, as returned by KVM_GET_REG_LIST. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mathieu Poirier --- target/arm/cpu.h | 3 +++ target/arm/kvm-rme.c | 9 ++++++++ target/arm/kvm-stub.c | 5 ++++ target/arm/kvm.c | 54 +++++++++++++++++++++++++++++++++++++++++-- target/arm/kvm_arm.h | 10 ++++++++ 5 files changed, 79 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 06ebed4a8fdf..11877642414d 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1070,6 +1070,9 @@ struct ArchCPU { /* KVM steal time */ OnOffAuto kvm_steal_time; =20 + /* Realm Management Extension */ + bool kvm_rme; + /* Uniprocessor system with MP extensions */ bool mp_is_up; =20 diff --git a/target/arm/kvm-rme.c b/target/arm/kvm-rme.c index a4a5e195c196..f7c2cc786e2c 100644 --- a/target/arm/kvm-rme.c +++ b/target/arm/kvm-rme.c @@ -69,6 +69,15 @@ static int kvm_arm_rme_init(ConfidentialGuestSupport *cg= s, Error **errp) return 0; } =20 +void kvm_arm_rme_vcpu_init(ARMCPU *cpu) +{ + if (!rme_guest) { + return; + } + + cpu->kvm_rme =3D true; +} + static void rme_guest_class_init(ObjectClass *oc, const void *data) { ConfidentialGuestSupportClass *klass =3D CONFIDENTIAL_GUEST_SUPPORT_CL= ASS(oc); diff --git a/target/arm/kvm-stub.c b/target/arm/kvm-stub.c index 88cbe8d85c41..5fde96f9b281 100644 --- a/target/arm/kvm-stub.c +++ b/target/arm/kvm-stub.c @@ -119,3 +119,8 @@ char *kvm_print_register_name(uint64_t regidx) { g_assert_not_reached(); } + +void kvm_arm_rme_vcpu_init(ARMCPU *cpu) +{ + g_assert_not_reached(); +} diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 60272b8c040d..cfee9fe99f79 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -2058,6 +2058,8 @@ int kvm_arch_init_vcpu(CPUState *cs) cpu->kvm_init_features[0] |=3D 1 << KVM_ARM_VCPU_HAS_EL2; } =20 + kvm_arm_rme_vcpu_init(cpu); + /* Do KVM_ARM_VCPU_INIT ioctl */ ret =3D kvm_arm_vcpu_init(cpu); if (ret) { @@ -2212,6 +2214,29 @@ static int kvm_arch_put_sve(CPUState *cs, uint32_t v= q, bool have_ffr) return 0; } =20 +static int kvm_arm_rme_put_core_regs(CPUState *cs, Error **errp) +{ + int i, ret; + ARMCPU *cpu =3D ARM_CPU(cs); + CPUARMState *env =3D &cpu->env; + + /* The RME ABI only allows us to set 8 GPRs and the PC */ + for (i =3D 0; i < 8; i++) { + ret =3D kvm_set_one_reg(cs, AARCH64_CORE_REG(regs.regs[i]), + &env->xregs[i]); + if (ret) { + return ret; + } + } + + ret =3D kvm_set_one_reg(cs, AARCH64_CORE_REG(regs.pc), &env->pc); + if (ret) { + return ret; + } + + return 0; +} + static int kvm_arm_put_core_regs(CPUState *cs, Error **errp) { uint64_t val; @@ -2323,7 +2348,11 @@ int kvm_arch_put_registers(CPUState *cs, KvmPutState= level, Error **errp) int ret; ARMCPU *cpu =3D ARM_CPU(cs); =20 - ret =3D kvm_arm_put_core_regs(cs, errp); + if (cpu->kvm_rme) { + ret =3D kvm_arm_rme_put_core_regs(cs, errp); + } else { + ret =3D kvm_arm_put_core_regs(cs, errp); + } if (ret) { return ret; } @@ -2410,6 +2439,23 @@ static int kvm_arch_get_sve(CPUState *cs, uint32_t v= q, bool have_ffr) return 0; } =20 +static int kvm_arm_rme_get_core_regs(CPUState *cs, Error **errp) +{ + int i, ret; + ARMCPU *cpu =3D ARM_CPU(cs); + CPUARMState *env =3D &cpu->env; + + for (i =3D 0; i < 8; i++) { + ret =3D kvm_get_one_reg(cs, AARCH64_CORE_REG(regs.regs[i]), + &env->xregs[i]); + if (ret) { + return ret; + } + } + + return 0; +} + static int kvm_arm_get_core_regs(CPUState *cs, Error **errp) { uint64_t val; @@ -2521,7 +2567,11 @@ int kvm_arch_get_registers(CPUState *cs, Error **err= p) int ret; ARMCPU *cpu =3D ARM_CPU(cs); =20 - ret =3D kvm_arm_get_core_regs(cs, errp); + if (cpu->kvm_rme) { + ret =3D kvm_arm_rme_get_core_regs(cs, errp); + } else { + ret =3D kvm_arm_get_core_regs(cs, errp); + } if (ret) { return ret; } diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index e7c40fb003e4..d95381c13afa 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -240,4 +240,14 @@ void arm_gic_cap_kvm_probe(GICCapability *v2, GICCapab= ility *v3); */ char *kvm_print_register_name(uint64_t regidx); =20 +/** + * kvm_arm_rme_vcpu_init + * @cs: the CPU + * + * If the user requested a Realm, setup the given vCPU accordingly. Realm = vCPUs + * behave a little differently, for example most of their register state is + * hidden from the host. + */ +void kvm_arm_rme_vcpu_init(ARMCPU *cpu); + #endif --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1790972483; cv=none; d=zohomail.com; s=zohoarc; b=YqOkAlMa6XoFhOxPgUoXS4lFWeKNN5OqnxwSdcKXxXmwFjdDTC1vKctKn5fwzyBWbWMMJ1Mysl3f1tKVB3WZtRgRzZD/2sZGzBnQ0fEy9ZQcOZEJWpf7ELRkXOSNN/HXm+hdhYV8NGHusXv7qIhq63uxqTbM8z0YLzUXb2UeX+g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1790972483; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Fri, 02 Oct 2026 13:20:39 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 06/22] target/arm/kvm: Create scratch Realm VM when requested Date: Fri, 2 Oct 2026 14:20:10 -0600 Message-ID: <20261002202026.1204110-7-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::29; envelope-from=mathieu.poirier@linaro.org; helo=mail-pj2-x29.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972484476158501 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker When a Realm is requested, create a scratch Realm VM by setting bit 30 of the argument given to the KVM_CREATE_VM ioctl(). Bit 7-0 are reserved for the guest PA size. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mathieu Poirier --- target/arm/kvm.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index cfee9fe99f79..8c74785998c2 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -108,7 +108,9 @@ bool kvm_arm_create_scratch_host_vcpu(int *fdarray, struct kvm_vcpu_init *init) { int ret =3D 0, kvmfd =3D -1, vmfd =3D -1, cpufd =3D -1; + MachineState *ms =3D MACHINE(qdev_get_machine()); int max_vm_pa_size; + int vm_type; =20 kvmfd =3D qemu_open_old("/dev/kvm", O_RDWR); if (kvmfd < 0) { @@ -118,8 +120,10 @@ bool kvm_arm_create_scratch_host_vcpu(int *fdarray, if (max_vm_pa_size < 0) { max_vm_pa_size =3D 0; } + + vm_type =3D (ms->cgs ? KVM_VM_TYPE_ARM_REALM : KVM_VM_TYPE_ARM_NORMAL); do { - vmfd =3D ioctl(kvmfd, KVM_CREATE_VM, max_vm_pa_size); + vmfd =3D ioctl(kvmfd, KVM_CREATE_VM, max_vm_pa_size | vm_type); } while (vmfd =3D=3D -1 && errno =3D=3D EINTR); if (vmfd < 0) { goto err; --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1790972703; cv=none; d=zohomail.com; s=zohoarc; b=DcCLpkB/WEMZGxgpTySwxD5iFv5ig5XjuyQMkdE+I4Mts1pxm4BfdLroA9bA2D3FaTn5lCPW9sdyhPXE57yHAa+86ebETTMnX65nQlZ3FT4iIa7wD8S4VYQZ7laeMPBH7FzM4K+DxhdMy2X2TE2uU68PU4c1OxBLOSOE3x0EFNQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1790972703; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Fri, 02 Oct 2026 13:20:41 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 07/22] target/arm/kvm: Use kvm_vm_check_extension() where necessary Date: Fri, 2 Oct 2026 14:20:11 -0600 Message-ID: <20261002202026.1204110-8-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::f; envelope-from=mathieu.poirier@linaro.org; helo=mail-pj2-x0f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972703243158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker The Arm KVM code can return different values from KVM_CHECK_EXTENSION depending on the VM type. Use kvm_vm_check_extension() where necessary to ensure we get the right response from KVM. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Lorenzo Pieralisi Signed-off-by: Mathieu Poirier --- target/arm/kvm.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 8c74785998c2..10d911a56b0b 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -370,7 +370,7 @@ static void kvm_arm_get_host_cpu_features(ARMHostCPUFea= tures *ahcf) 1 << KVM_ARM_VCPU_PTRAUTH_GENERIC); } =20 - if (kvm_check_extension(kvm_state, KVM_CAP_ARM_PMU_V3)) { + if (kvm_vm_check_extension(kvm_state, KVM_CAP_ARM_PMU_V3)) { init.features[0] |=3D 1 << KVM_ARM_VCPU_PMU_V3; pmu_supported =3D true; features |=3D 1ULL << ARM_FEATURE_PMU; @@ -679,7 +679,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) return -EINVAL; } =20 - if (kvm_check_extension(s, KVM_CAP_ARM_NISV_TO_USER)) { + if (kvm_vm_check_extension(s, KVM_CAP_ARM_NISV_TO_USER)) { if (kvm_vm_enable_cap(s, KVM_CAP_ARM_NISV_TO_USER, 0)) { error_report("Failed to enable KVM_CAP_ARM_NISV_TO_USER cap"); } else { @@ -710,11 +710,11 @@ int kvm_arch_init(MachineState *ms, KVMState *s) } } =20 - max_hw_wps =3D kvm_check_extension(s, KVM_CAP_GUEST_DEBUG_HW_WPS); + max_hw_wps =3D kvm_vm_check_extension(s, KVM_CAP_GUEST_DEBUG_HW_WPS); hw_watchpoints =3D g_array_sized_new(true, true, sizeof(HWWatchpoint), max_hw_wps); =20 - max_hw_bps =3D kvm_check_extension(s, KVM_CAP_GUEST_DEBUG_HW_BPS); + max_hw_bps =3D kvm_vm_check_extension(s, KVM_CAP_GUEST_DEBUG_HW_BPS); hw_breakpoints =3D g_array_sized_new(true, true, sizeof(HWBreakpoint), max_hw_bps); =20 @@ -1956,7 +1956,7 @@ void kvm_arm_pvtime_init(ARMCPU *cpu, uint64_t ipa) =20 void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp) { - bool has_steal_time =3D kvm_check_extension(kvm_state, KVM_CAP_STEAL_T= IME); + bool has_steal_time =3D kvm_vm_check_extension(kvm_state, KVM_CAP_STEA= L_TIME); =20 if (cpu->kvm_steal_time =3D=3D ON_OFF_AUTO_AUTO) { if (!has_steal_time || !arm_feature(&cpu->env, ARM_FEATURE_AARCH64= )) { --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Fri, 02 Oct 2026 13:20:43 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 08/22] target/arm/kvm-rme: Keep track of images loaded in Realm memory Date: Fri, 2 Oct 2026 14:20:12 -0600 Message-ID: <20261002202026.1204110-9-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::10; envelope-from=mathieu.poirier@linaro.org; helo=mail-pj2-x10.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972504429158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker Add a Rom notifier to keep track of binary blobs loaded in Realm memory. That way we can deterministically calculate the Realm Initial Measurement (= RIM). Signed-off-by: Jean-Philippe Brucker Signed-off-by: Lorenzo Pieralisi Signed-off-by: Mathieu Poirier --- hw/core/loader.c | 24 +++++++++++++++++++++++ include/hw/core/loader.h | 17 +++++++++++++++++ target/arm/kvm-rme.c | 41 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 82 insertions(+) diff --git a/hw/core/loader.c b/hw/core/loader.c index 5cbfba0a86d2..644d55c9e0ed 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -74,6 +74,8 @@ #endif =20 static int roms_loaded; +static NotifierList rom_loader_notifier =3D + NOTIFIER_LIST_INITIALIZER(rom_loader_notifier); =20 /* return the size or -1 if error */ int64_t get_image_size(const char *filename, Error **errp) @@ -1201,6 +1203,11 @@ MemoryRegion *rom_add_blob(const char *name, const v= oid *blob, size_t len, return mr; } =20 +void rom_add_load_notifier(Notifier *notifier) +{ + notifier_list_add(&rom_loader_notifier, notifier); +} + /* This function is specific for elf program because we don't need to allo= cate * all the rom. We just allocate the first part and the rest is just zeros= . This * is why romsize and datasize are different. Also, this function takes it= s own @@ -1242,6 +1249,7 @@ ssize_t rom_add_option(const char *file, int32_t boot= index) static void rom_reset(void *unused) { Rom *rom; + RomLoaderNotifyData notify; =20 QTAILQ_FOREACH(rom, &roms, next) { if (rom->fw_file) { @@ -1290,6 +1298,22 @@ static void rom_reset(void *unused) address_space_flush_icache_range(rom->as, rom->addr, rom->datasize= ); =20 trace_loader_write_rom(rom->name, rom->addr, rom->datasize, rom->i= srom); + + if (rom->addr =3D=3D -1) { + /* + * These blobs (ACPI tables) are not loaded into guest RAM at = reset. + * Instead the firmware will load them via fw_cfg and measure = them + * itself. + */ + continue; + } + + notify =3D (RomLoaderNotifyData) { + .addr =3D rom->addr, + .len =3D rom->datasize, + .data =3D rom->data, + }; + notifier_list_notify(&rom_loader_notifier, ¬ify); } } =20 diff --git a/include/hw/core/loader.h b/include/hw/core/loader.h index d9431e8a8d12..fdfddfa7443e 100644 --- a/include/hw/core/loader.h +++ b/include/hw/core/loader.h @@ -342,6 +342,23 @@ void *rom_ptr_for_as(AddressSpace *as, hwaddr addr, si= ze_t size); ssize_t rom_add_vga(const char *file); ssize_t rom_add_option(const char *file, int32_t bootindex); =20 +typedef struct RomLoaderNotifyData { + /* Address of the blob in guest memory */ + hwaddr addr; + /* Length of the blob */ + size_t len; + /* Blog data */ + uint8_t *data; +} RomLoaderNotifyData; + +/** + * rom_add_load_notifier - Add a notifier for loaded images + * + * Add a notifier that will be invoked with a RomLoaderNotifyData structur= e for + * each blob loaded into guest memory, after the blob is loaded. + */ +void rom_add_load_notifier(Notifier *notifier); + /* This is the usual maximum in uboot, so if a uImage overflows this, it w= ould * overflow on real hardware too. */ #define UBOOT_MAX_DECOMPRESSED_BYTES (64 << 20) diff --git a/target/arm/kvm-rme.c b/target/arm/kvm-rme.c index f7c2cc786e2c..b1fb8957f3de 100644 --- a/target/arm/kvm-rme.c +++ b/target/arm/kvm-rme.c @@ -10,6 +10,7 @@ =20 #include "hw/core/boards.h" #include "hw/core/cpu.h" +#include "hw/core/loader.h" #include "kvm_arm.h" #include "migration/blocker.h" #include "qapi/error.h" @@ -22,8 +23,16 @@ #define TYPE_RME_GUEST "rme-guest" OBJECT_DECLARE_SIMPLE_TYPE(RmeGuest, RME_GUEST) =20 +typedef struct { + hwaddr base; + hwaddr size; + uint8_t *data; +} RmeRamRegion; + struct RmeGuest { ConfidentialGuestSupport parent_obj; + Notifier rom_load_notifier; + GSList *ram_regions; }; =20 OBJECT_DEFINE_SIMPLE_TYPE_WITH_INTERFACES(RmeGuest, rme_guest, RME_GUEST, @@ -41,6 +50,35 @@ static void rme_vm_state_change(void *opaque, bool runni= ng, RunState state) kvm_mark_guest_state_protected(); } =20 +static gint rme_compare_ram_regions(gconstpointer a, gconstpointer b) +{ + const RmeRamRegion *ra =3D a; + const RmeRamRegion *rb =3D b; + + g_assert(ra->base !=3D rb->base); + return ra->base < rb->base ? -1 : 1; +} + +static void rme_rom_load_notify(Notifier *notifier, void *data) +{ + RmeRamRegion *region; + RomLoaderNotifyData *rom =3D data; + + region =3D g_new0(RmeRamRegion, 1); + region->base =3D rom->addr; + region->size =3D rom->len; + region->data =3D rom->data; + + /* + * The Realm Initial Measurement (RIM) depends on the order in which we + * initialize and populate the RAM regions. To help a verifier + * independently calculate the RIM, sort regions by GPA. + */ + rme_guest->ram_regions =3D g_slist_insert_sorted(rme_guest->ram_region= s, + region, + rme_compare_ram_regions= ); +} + static int kvm_arm_rme_init(ConfidentialGuestSupport *cgs, Error **errp) { KVMState *s =3D KVM_STATE(current_accel()); @@ -58,6 +96,9 @@ static int kvm_arm_rme_init(ConfidentialGuestSupport *cgs= , Error **errp) error_setg(&rme_mig_blocker, "RME: migration is not implemented"); migrate_add_blocker(&rme_mig_blocker, &error_fatal); =20 + rme_guest->rom_load_notifier.notify =3D rme_rom_load_notify; + rom_add_load_notifier(&rme_guest->rom_load_notifier); + /* * The realm activation is done last, when the VM starts, after all im= ages * have been loaded and all vcpus finalized. --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 02 Oct 2026 13:20:45 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 09/22] target/arm/kvm-rme: Populate Realm with runtime images Date: Fri, 2 Oct 2026 14:20:13 -0600 Message-ID: <20261002202026.1204110-10-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::2a; envelope-from=mathieu.poirier@linaro.org; helo=mail-pj2-x2a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972498262158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker Once the Realm descriptor has been created, tell KVM to transfer runtime images (kernel, DT, and rootfs) from guest memory to Realm memory. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Lorenzo Pieralisi Signed-off-by: Mathieu Poirier --- target/arm/kvm-rme.c | 76 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) diff --git a/target/arm/kvm-rme.c b/target/arm/kvm-rme.c index b1fb8957f3de..22c8afe21505 100644 --- a/target/arm/kvm-rme.c +++ b/target/arm/kvm-rme.c @@ -15,6 +15,7 @@ #include "migration/blocker.h" #include "qapi/error.h" #include "qemu/error-report.h" +#include "qemu/memalign.h" #include "qom/object_interfaces.h" #include "system/confidential-guest-support.h" #include "system/kvm.h" @@ -41,12 +42,87 @@ OBJECT_DEFINE_SIMPLE_TYPE_WITH_INTERFACES(RmeGuest, rme= _guest, RME_GUEST, =20 static RmeGuest *rme_guest; =20 +static int rme_populate_range(const RmeRamRegion *region, Error **errp) +{ + int ret; + void *buffer; + hwaddr size =3D region->size; + hwaddr base =3D region->base; + unsigned long page_size =3D qemu_real_host_page_size(); + hwaddr start =3D QEMU_ALIGN_DOWN(base, page_size); + hwaddr end =3D QEMU_ALIGN_UP(base + size, page_size); + size_t aligned_size =3D end - start; + struct kvm_arm_rmi_populate populate_args; + + if (!region->data) { + return -ENODEV; + } + + ret =3D kvm_set_memory_attributes_private(start, aligned_size); + if (ret) { + error_report("RME: failed to configure initial" + "private guest memory"); + return ret; + } + + /* Allocate page-aligned memory */ + buffer =3D qemu_memalign(page_size, aligned_size); + + if (!buffer) { + return -ENOMEM; + } + + memset(buffer, 0, aligned_size); + memcpy(buffer + (base - start), region->data, region->size); + + populate_args =3D (struct kvm_arm_rmi_populate) { + .base =3D start, + .size =3D aligned_size, + .source_uaddr =3D (uintptr_t)buffer, + .flags =3D KVM_ARM_RMI_POPULATE_FLAGS_MEASURE, + }; + + while (populate_args.size > 0) { + ret =3D kvm_vm_ioctl(kvm_state, KVM_ARM_RMI_POPULATE, &populate_ar= gs, 0); + if (ret) { + error_setg_errno(errp, -ret, + "failed to populate realm [0x%"HWADDR_PRIx", 0x%"HWADDR_PR= Ix")", + start, end); + break; + } + } + + qemu_vfree(buffer); + + return ret; +} + +static void rme_populate_ram_region(gpointer data, gpointer err) +{ + Error **errp =3D err; + const RmeRamRegion *region =3D data; + + if (*errp) { + return; + } + + rme_populate_range(region, errp); +} + static void rme_vm_state_change(void *opaque, bool running, RunState state) { + Error *errp =3D NULL; + if (!running) { return; } =20 + g_slist_foreach(rme_guest->ram_regions, rme_populate_ram_region, &errp= ); + g_slist_free_full(g_steal_pointer(&rme_guest->ram_regions), g_free); + if (errp) { + return; + } + kvm_mark_guest_state_protected(); } =20 --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1790972666; 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Fri, 02 Oct 2026 13:20:47 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 10/22] target/arm/cpu: Set number of breakpoints and watchpoints in KVM Date: Fri, 2 Oct 2026 14:20:14 -0600 Message-ID: <20261002202026.1204110-11-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::d; envelope-from=mathieu.poirier@linaro.org; helo=mail-pj2-x0d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972667286158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker Add "num-breakpoints" and "num-watchpoints" CPU parameters to configure the debug features that KVM presents to the guest. The KVM vCPU configuration is modified by calling SET_ONE_REG on the ID register. This is needed for Realm VMs, whose parameters include breakpoints and watchpoints, and influence the Realm Initial Measurement. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mathieu Poirier --- target/arm/arm-qmp-cmds.c | 1 + target/arm/cpu.h | 4 ++ target/arm/cpu64.c | 81 +++++++++++++++++++++++++++++++++++++++ target/arm/kvm.c | 56 +++++++++++++++++++++++++++ 4 files changed, 142 insertions(+) diff --git a/target/arm/arm-qmp-cmds.c b/target/arm/arm-qmp-cmds.c index 83ec95c290f6..9ed65eb090d7 100644 --- a/target/arm/arm-qmp-cmds.c +++ b/target/arm/arm-qmp-cmds.c @@ -76,6 +76,7 @@ static const char *cpu_model_advertised_features[] =3D { "sve1408", "sve1536", "sve1664", "sve1792", "sve1920", "sve2048", "kvm-no-adjvtime", "kvm-steal-time", "pauth", "pauth-impdef", "pauth-qarma3", "pauth-qarma5", + "num-breakpoints", "num-watchpoints", NULL }; =20 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 11877642414d..2e41c2be3b71 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1197,6 +1197,10 @@ struct ArchCPU { =20 /* Generic timer counter frequency, in Hz */ uint64_t gt_cntfrq_hz; + + /* Allows to override the default configuration */ + uint8_t num_bps; + uint8_t num_wps; }; =20 typedef struct ARMCPUInfo { diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index dcd0d698b300..483441dfabe3 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -674,6 +674,86 @@ void aarch64_add_pauth_properties(Object *obj) } } =20 +#if defined(CONFIG_KVM) +static void arm_cpu_get_num_wps(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + uint8_t val; + ARMCPU *cpu =3D ARM_CPU(obj); + + val =3D cpu->num_wps; + if (val =3D=3D 0) { + val =3D FIELD_EX64(cpu->isar.idregs[ID_AA64DFR0_EL1_IDX], + ID_AA64DFR0, WRPS) + 1; + } + + visit_type_uint8(v, name, &val, errp); +} + +static void arm_cpu_set_num_wps(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + uint8_t val; + ARMCPU *cpu =3D ARM_CPU(obj); + uint8_t max_wps =3D FIELD_EX64(cpu->isar.idregs[ID_AA64DFR0_EL1_IDX], + ID_AA64DFR0, WRPS) + 1; + + if (!visit_type_uint8(v, name, &val, errp)) { + return; + } + + if (val < 2 || val > max_wps) { + error_setg(errp, "invalid number of watchpoints"); + return; + } + + cpu->num_wps =3D val; +} + +static void arm_cpu_get_num_bps(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + uint8_t val; + ARMCPU *cpu =3D ARM_CPU(obj); + + val =3D cpu->num_bps; + if (val =3D=3D 0) { + val =3D FIELD_EX64(cpu->isar.idregs[ID_AA64DFR0_EL1_IDX], + ID_AA64DFR0, BRPS) + 1; + } + + visit_type_uint8(v, name, &val, errp); +} + +static void arm_cpu_set_num_bps(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + uint8_t val; + ARMCPU *cpu =3D ARM_CPU(obj); + uint8_t max_bps =3D FIELD_EX64(cpu->isar.idregs[ID_AA64DFR0_EL1_IDX], + ID_AA64DFR0, BRPS) + 1; + + if (!visit_type_uint8(v, name, &val, errp)) { + return; + } + + if (val < 2 || val > max_bps) { + error_setg(errp, "invalid number of breakpoints"); + return; + } + + cpu->num_bps =3D val; +} + +static void aarch64_add_kvm_writable_properties(Object *obj) +{ + object_property_add(obj, "num-breakpoints", "uint8", arm_cpu_get_num_b= ps, + arm_cpu_set_num_bps, NULL, NULL); + object_property_add(obj, "num-watchpoints", "uint8", arm_cpu_get_num_w= ps, + arm_cpu_set_num_wps, NULL, NULL); +} +#endif /* CONFIG_KVM */ + void aarch64_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp) { uint64_t t; @@ -815,6 +895,7 @@ void aarch64_host_initfn(Object *obj) kvm_arm_set_cpreg_mig_tolerances(cpu); kvm_arm_set_cpu_features_from_host(cpu); aarch64_add_sve_properties(obj); + aarch64_add_kvm_writable_properties(obj); #elif defined(CONFIG_HVF) hvf_arm_set_cpu_features_from_host(cpu); #elif defined(CONFIG_WHPX) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 10d911a56b0b..1acf62545e7a 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -955,6 +955,56 @@ out: return ret; } =20 +#define KVM_REG_ARM_ID_AA64DFR0_EL1 ARM64_SYS_REG(3, 0, 0, 5, 0) + +static void kvm_arm_configure_aa64dfr0(ARMCPU *cpu) +{ + int ret; + uint64_t val, newval; + CPUState *cs =3D CPU(cpu); + + if (!cpu->num_bps && !cpu->num_wps) { + return; + } + + newval =3D cpu->isar.idregs[ID_AA64DFR0_EL1_IDX]; + if (cpu->num_bps) { + uint64_t ctx_cmps =3D FIELD_EX64(newval, ID_AA64DFR0, CTX_CMPS); + + /* CTX_CMPs is never greater than BRPs */ + ctx_cmps =3D MIN(ctx_cmps, cpu->num_bps - 1); + newval =3D FIELD_DP64(newval, ID_AA64DFR0, BRPS, cpu->num_bps - 1); + newval =3D FIELD_DP64(newval, ID_AA64DFR0, CTX_CMPS, ctx_cmps); + } + if (cpu->num_wps) { + newval =3D FIELD_DP64(newval, ID_AA64DFR0, WRPS, cpu->num_wps - 1); + } + ret =3D kvm_set_one_reg(cs, KVM_REG_ARM_ID_AA64DFR0_EL1, &newval); + if (ret) { + error_report("Failed to set KVM_REG_ARM_ID_AA64DFR0_EL1"); + return; + } + + /* + * Check if the write succeeded. KVM does offer the writable mask for = this + * register, but this way we also check if the value we wrote was sane. + */ + ret =3D kvm_get_one_reg(cs, KVM_REG_ARM_ID_AA64DFR0_EL1, &val); + if (ret) { + error_report("Failed to get KVM_REG_ARM_ID_AA64DFR0_EL1"); + return; + } + + if (val !=3D newval) { + error_report("Failed to update KVM_REG_ARM_ID_AA64DFR0_EL1"); + } +} + +static void kvm_arm_configure_vcpu_regs(ARMCPU *cpu) +{ + kvm_arm_configure_aa64dfr0(cpu); +} + /** * kvm_arm_cpreg_level: * @regidx: KVM register index @@ -1171,6 +1221,12 @@ void kvm_arm_reset_vcpu(ARMCPU *cpu) fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret)); abort(); } + + /* + * Before loading the KVM values into CPUState, update the KVM configu= ration + */ + kvm_arm_configure_vcpu_regs(cpu); + if (!write_kvmstate_to_list(cpu)) { fprintf(stderr, "write_kvmstate_to_list failed\n"); abort(); --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Fri, 02 Oct 2026 13:20:49 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 11/22] target/arm/cpu: Set number of PMU counters in KVM Date: Fri, 2 Oct 2026 14:20:15 -0600 Message-ID: <20261002202026.1204110-12-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::c; envelope-from=mathieu.poirier@linaro.org; helo=mail-pj2-x0c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972669127158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker Add a "num-pmu-counters" CPU parameter to configure the number of counters that KVM presents to the guest. This is needed for Realm VMs, whose parameters include the number of PMU counters and influence the Realm Initial Measurement. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mathieu Poirier --- target/arm/arm-qmp-cmds.c | 2 +- target/arm/cpu.h | 3 +++ target/arm/cpu64.c | 41 +++++++++++++++++++++++++++++++++++++++ target/arm/kvm.c | 34 ++++++++++++++++++++++++++++++++ 4 files changed, 79 insertions(+), 1 deletion(-) diff --git a/target/arm/arm-qmp-cmds.c b/target/arm/arm-qmp-cmds.c index 9ed65eb090d7..9350dc30d12f 100644 --- a/target/arm/arm-qmp-cmds.c +++ b/target/arm/arm-qmp-cmds.c @@ -76,7 +76,7 @@ static const char *cpu_model_advertised_features[] =3D { "sve1408", "sve1536", "sve1664", "sve1792", "sve1920", "sve2048", "kvm-no-adjvtime", "kvm-steal-time", "pauth", "pauth-impdef", "pauth-qarma3", "pauth-qarma5", - "num-breakpoints", "num-watchpoints", + "num-breakpoints", "num-watchpoints", "num-pmu-counters", NULL }; =20 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 2e41c2be3b71..a5b8b7ccc70b 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1201,6 +1201,7 @@ struct ArchCPU { /* Allows to override the default configuration */ uint8_t num_bps; uint8_t num_wps; + int8_t num_pmu_ctrs; }; =20 typedef struct ARMCPUInfo { @@ -2158,6 +2159,8 @@ FIELD(MFAR, FPA, 12, 40) FIELD(MFAR, NSE, 62, 1) FIELD(MFAR, NS, 63, 1) =20 +FIELD(PMCR, N, 11, 5) + /* If adding a feature bit which corresponds to a Linux ELF * HWCAP bit, remember to update the feature-bit-to-hwcap * mapping in linux-user/elfload.c:get_elf_hwcap(). diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 483441dfabe3..22a8394a9f4e 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -745,12 +745,53 @@ static void arm_cpu_set_num_bps(Object *obj, Visitor = *v, const char *name, cpu->num_bps =3D val; } =20 +static void arm_cpu_get_num_pmu_ctrs(Object *obj, Visitor *v, const char *= name, + void *opaque, Error **errp) +{ + uint8_t val; + ARMCPU *cpu =3D ARM_CPU(obj); + + if (cpu->num_pmu_ctrs =3D=3D -1) { + val =3D FIELD_EX64(cpu->isar.reset_pmcr_el0, PMCR, N); + } else { + val =3D cpu->num_pmu_ctrs; + } + + visit_type_uint8(v, name, &val, errp); +} + +static void arm_cpu_set_num_pmu_ctrs(Object *obj, Visitor *v, const char *= name, + void *opaque, Error **errp) +{ + uint8_t val; + ARMCPU *cpu =3D ARM_CPU(obj); + uint8_t max_ctrs =3D FIELD_EX64(cpu->isar.reset_pmcr_el0, PMCR, N); + + if (!visit_type_uint8(v, name, &val, errp)) { + return; + } + + if (val > max_ctrs) { + error_setg(errp, "invalid number of PMU counters"); + return; + } + + cpu->num_pmu_ctrs =3D val; +} + static void aarch64_add_kvm_writable_properties(Object *obj) { + ARMCPU *cpu =3D ARM_CPU(obj); + object_property_add(obj, "num-breakpoints", "uint8", arm_cpu_get_num_b= ps, arm_cpu_set_num_bps, NULL, NULL); object_property_add(obj, "num-watchpoints", "uint8", arm_cpu_get_num_w= ps, arm_cpu_set_num_wps, NULL, NULL); + + cpu->num_pmu_ctrs =3D -1; + object_property_add(obj, "num-pmu-counters", "uint8", + arm_cpu_get_num_pmu_ctrs, arm_cpu_set_num_pmu_ctrs, + NULL, NULL); } #endif /* CONFIG_KVM */ =20 diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 1acf62545e7a..28d00f520e9f 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -1000,9 +1000,43 @@ static void kvm_arm_configure_aa64dfr0(ARMCPU *cpu) } } =20 +#define KVM_REG_ARM_PMCR_EL0 ARM64_SYS_REG(3, 3, 9, 12, 0) + +static void kvm_arm_configure_pmcr(ARMCPU *cpu) +{ + int ret; + uint64_t val, newval; + CPUState *cs =3D CPU(cpu); + + if (cpu->num_pmu_ctrs =3D=3D -1) { + return; + } + + newval =3D FIELD_DP64(cpu->isar.reset_pmcr_el0, PMCR, N, cpu->num_pmu_= ctrs); + ret =3D kvm_set_one_reg(cs, KVM_REG_ARM_PMCR_EL0, &newval); + if (ret) { + error_report("Failed to set KVM_REG_ARM_PMCR_EL0"); + return; + } + + /* + * Check if the write succeeded, since older versions of KVM ignore it. + */ + ret =3D kvm_get_one_reg(cs, KVM_REG_ARM_PMCR_EL0, &val); + if (ret) { + error_report("Failed to get KVM_REG_ARM_PMCR_EL0"); + return; + } + + if (val !=3D newval) { + error_report("Failed to update KVM_REG_ARM_PMCR_EL0"); + } +} + static void kvm_arm_configure_vcpu_regs(ARMCPU *cpu) { kvm_arm_configure_aa64dfr0(cpu); + kvm_arm_configure_pmcr(cpu); } =20 /** --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 02 Oct 2026 13:20:50 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 12/22] target/arm/cpu: Don't read Realm registers Date: Fri, 2 Oct 2026 14:20:16 -0600 Message-ID: <20261002202026.1204110-13-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:3b::2b; envelope-from=mathieu.poirier@linaro.org; helo=mail-pz2-x2b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972705237158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker The host cannot access registers of a Realm. Instead of showing all registers as zero in "info registers", display a message about this restriction. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mathieu Poirier --- target/arm/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 10ac6c983189..73bbebddcdb0 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -967,6 +967,11 @@ static void aarch64_cpu_dump_state(CPUState *cs, FILE = *f, int flags) const char *ns_status; bool sve; =20 + if (cpu->kvm_rme) { + qemu_fprintf(f, "the CPU registers are confidential to the realm\n= "); + return; + } + qemu_fprintf(f, " PC=3D%016" PRIx64 " ", env->pc); for (i =3D 0; i < 32; i++) { if (i =3D=3D 31) { --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1790972634; cv=none; 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Fri, 02 Oct 2026 13:20:52 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 13/22] hw/arm/virt: Set proper conduit method for Realms Date: Fri, 2 Oct 2026 14:20:17 -0600 Message-ID: <20261002202026.1204110-14-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=mathieu.poirier@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972635089158500 From: Jean-Philippe Brucker The HVC conduit for PSCI is not supported for Realms, so default to SMC. Signed-off-by: Jean-Philippe Brucker Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Mathieu Poirier --- hw/arm/virt.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index bdac33a1de86..5ab4bb23ef2d 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -272,6 +272,11 @@ static const int a15irqmap[] =3D { [VIRT_PLATFORM_BUS] =3D 112, /* ...to 112 + PLATFORM_BUS_NUM_IRQS -1 */ }; =20 +static bool virt_machine_is_confidential(VirtMachineState *vms) +{ + return MACHINE(vms)->cgs; +} + static void create_randomness(MachineState *ms, const char *node) { struct { @@ -2945,10 +2950,11 @@ static void machvirt_init(MachineState *machine) * if the guest has EL2 then we will use SMC as the conduit, * and otherwise we will use HVC (for backwards compatibility and * because if we're using KVM then we must use HVC). + * Realm guests must also use SMC. */ if (vms->secure && firmware_loaded) { vms->psci_conduit =3D QEMU_PSCI_CONDUIT_DISABLED; - } else if (vms->virt) { + } else if (vms->virt || virt_machine_is_confidential(vms)) { vms->psci_conduit =3D QEMU_PSCI_CONDUIT_SMC; } else { vms->psci_conduit =3D QEMU_PSCI_CONDUIT_HVC; --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1790972626; cv=none; d=zohomail.com; s=zohoarc; b=StzDRS+T6N0TzJ70LoUKl+9h/sRbvcPkxNnxiPugtfUJTiBE8y47xx73kcrch+0o1Al0Yab/s5wSWM3KKWE6tQd/ZPkYJb1ZgENSxMsAwalM3XaPxkswlT0eNGsLU6pU9DzFMJtubANMj89XePzbeaSBjnZSW1grCnlz20VmjOA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1790972626; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Fri, 02 Oct 2026 13:20:55 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 14/22] hw/arm/virt: Embed Realm VM type with IPA address space Date: Fri, 2 Oct 2026 14:20:18 -0600 Message-ID: <20261002202026.1204110-15-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::2a; envelope-from=mathieu.poirier@linaro.org; helo=mail-pj2-x2a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972626919158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker Set the Ream VM bit in the IPA address space size when needed. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mathieu Poirier --- hw/arm/virt.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 5ab4bb23ef2d..cdfb71ce97d3 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -96,6 +96,8 @@ #include "qemu/guest-random.h" #include "hw/watchdog/sbsa_gwdt.h" =20 +#include + static GlobalProperty arm_virt_compat_defaults[] =3D { { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "48" }, }; @@ -4047,9 +4049,12 @@ static int virt_kvm_type(MachineState *ms, const cha= r *type_str) VirtMachineState *vms =3D VIRT_MACHINE(ms); int max_vm_pa_size, requested_pa_size; bool fixed_ipa; + int vm_type; =20 max_vm_pa_size =3D kvm_arm_get_max_vm_ipa_size(ms, &fixed_ipa); =20 + vm_type =3D (ms->cgs ? KVM_VM_TYPE_ARM_REALM : KVM_VM_TYPE_ARM_NORMAL); + /* we freeze the memory map to compute the highest gpa */ virt_set_memmap(vms, max_vm_pa_size); =20 @@ -4074,7 +4079,11 @@ static int virt_kvm_type(MachineState *ms, const cha= r *type_str) * the implicit legacy 40b IPA setting, in which case the kvm_type * must be 0. */ - return fixed_ipa ? 0 : requested_pa_size; + if (fixed_ipa) { + return 0; + } + + return requested_pa_size | vm_type; } =20 static int virt_get_physical_address_range(MachineState *ms, --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1790972652; cv=none; d=zohomail.com; s=zohoarc; b=P+uQ7p9HEPLvEIw1ghOoNkVLFo7GdKkKcP4vb3id1B7QCSOxoccCaVLPiqqvP5BDXGoatyJY6XEa+cR4ntgDRmJHir/SayDXLiQzXyWZXqactmkU9I4iJK0MM2VY6OMV03IeUMWFcbNd2XRwz0kUdnbc57zLULDgbwLS4QP9ux4= ARC-Message-Signature: i=1; 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Fri, 02 Oct 2026 13:20:56 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 15/22] hw/arm/virt: Reserve one bit of guest physical address for RME Date: Fri, 2 Oct 2026 14:20:19 -0600 Message-ID: <20261002202026.1204110-16-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=mathieu.poirier@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972653049158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker When RME is enabled, the upper GPA bit is used to distinguish protected from unprotected addresses. Reserve it when setting up the guest memory map. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mathieu Poirier --- hw/arm/virt.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index cdfb71ce97d3..b2cca73dda6f 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -4048,17 +4048,27 @@ static int virt_kvm_type(MachineState *ms, const ch= ar *type_str) { VirtMachineState *vms =3D VIRT_MACHINE(ms); int max_vm_pa_size, requested_pa_size; + int rme_reserve_bit =3D 0; bool fixed_ipa; int vm_type; =20 - max_vm_pa_size =3D kvm_arm_get_max_vm_ipa_size(ms, &fixed_ipa); - vm_type =3D (ms->cgs ? KVM_VM_TYPE_ARM_REALM : KVM_VM_TYPE_ARM_NORMAL); =20 + if (vm_type) { + /* + * With RME, the upper GPA bit differentiates Realm from NS memory. + * Reserve the upper bit to ensure that highmem devices will fit. + */ + rme_reserve_bit =3D 1; + } + + max_vm_pa_size =3D kvm_arm_get_max_vm_ipa_size(ms, &fixed_ipa) - + rme_reserve_bit; + /* we freeze the memory map to compute the highest gpa */ virt_set_memmap(vms, max_vm_pa_size); =20 - requested_pa_size =3D 64 - clz64(vms->highest_gpa); + requested_pa_size =3D 64 - clz64(vms->highest_gpa) + rme_reserve_bit; =20 /* * KVM requires the IPA size to be at least 32 bits. @@ -4067,11 +4077,11 @@ static int virt_kvm_type(MachineState *ms, const ch= ar *type_str) requested_pa_size =3D 32; } =20 - if (requested_pa_size > max_vm_pa_size) { + if (requested_pa_size > max_vm_pa_size + rme_reserve_bit) { error_report("-m and ,maxmem option values " "require an IPA range (%d bits) larger than " "the one supported by the host (%d bits)", - requested_pa_size, max_vm_pa_size); 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Fri, 02 Oct 2026 13:20:58 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 16/22] hw/arm/virt: Disable DTB randomness for confidential VMs Date: Fri, 2 Oct 2026 14:20:20 -0600 Message-ID: <20261002202026.1204110-17-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::10; envelope-from=mathieu.poirier@linaro.org; helo=mail-pj2-x10.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972677174158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker The dtb-randomness feature, which adds random seeds to the DTB, isn't really compatible with confidential VMs since it randomizes the Realm Initial Measurement. Enabling it is not an error, but it prevents attestation. It also isn't useful to a Realm, which doesn't trust host input. Currently the feature is automatically enabled, unless the user disables it on the command-line. Change it to OnOffAuto, and automatically disable it for confidential VMs, unless the user explicitly enables it. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mathieu Poirier --- docs/system/arm/virt.rst | 9 +++++---- hw/arm/virt.c | 41 +++++++++++++++++++++++++--------------- include/hw/arm/virt.h | 2 +- 3 files changed, 32 insertions(+), 20 deletions(-) diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst index 5f6dd1797862..9882b842ddd5 100644 --- a/docs/system/arm/virt.rst +++ b/docs/system/arm/virt.rst @@ -238,10 +238,11 @@ dtb-randomness rng-seed and kaslr-seed nodes (in both "/chosen" and "/secure-chosen") to use for features like the random number generator and address space randomisation. The default is - ``on``. You will want to disable it if your trusted boot chain - will verify the DTB it is passed, since this option causes the - DTB to be non-deterministic. It would be the responsibility of - the firmware to come up with a seed and pass it on if it wants to. + ``off`` for confidential VMs, and ``on`` otherwise. You will want + to disable it if your trusted boot chain will verify the DTB it is + passed, since this option causes the DTB to be non-deterministic. + It would be the responsibility of the firmware to come up with a + seed and pass it on if it wants to. =20 dtb-kaslr-seed A deprecated synonym for dtb-randomness. diff --git a/hw/arm/virt.c b/hw/arm/virt.c index b2cca73dda6f..35e76951dafd 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -394,6 +394,7 @@ static int gic_fdt_irq_type_spi(const VirtMachineState = *vms) =20 static void create_fdt(VirtMachineState *vms) { + bool dtb_randomness =3D true; MachineState *ms =3D MACHINE(vms); int nb_numa_nodes =3D ms->numa_state->num_nodes; void *fdt =3D create_device_tree(&vms->fdt_size); @@ -403,6 +404,16 @@ static void create_fdt(VirtMachineState *vms) exit(1); } =20 + /* + * Including random data in the DTB causes random intial measurement o= n CCA, + * so disable it for confidential VMs. + */ + if (vms->dtb_randomness =3D=3D ON_OFF_AUTO_OFF || + (vms->dtb_randomness =3D=3D ON_OFF_AUTO_AUTO && + virt_machine_is_confidential(vms))) { + dtb_randomness =3D false; + } + ms->fdt =3D fdt; =20 /* Header */ @@ -424,13 +435,13 @@ static void create_fdt(VirtMachineState *vms) =20 /* /chosen must exist for load_dtb to fill in necessary properties lat= er */ qemu_fdt_add_subnode(fdt, "/chosen"); - if (vms->dtb_randomness) { + if (dtb_randomness) { create_randomness(ms, "/chosen"); } =20 if (vms->secure) { qemu_fdt_add_subnode(fdt, "/secure-chosen"); - if (vms->dtb_randomness) { + if (dtb_randomness) { create_randomness(ms, "/secure-chosen"); } } @@ -3505,18 +3516,21 @@ static void virt_set_virtio_transports(Object *obj,= Visitor *v, vms->virtio_transports =3D transports; } =20 -static bool virt_get_dtb_randomness(Object *obj, Error **errp) +static void virt_get_dtb_randomness(Object *obj, Visitor *v, const char *n= ame, + void *opaque, Error **errp) { VirtMachineState *vms =3D VIRT_MACHINE(obj); + OnOffAuto dtb_randomness =3D vms->dtb_randomness; =20 - return vms->dtb_randomness; + visit_type_OnOffAuto(v, name, &dtb_randomness, errp); } =20 -static void virt_set_dtb_randomness(Object *obj, bool value, Error **errp) +static void virt_set_dtb_randomness(Object *obj, Visitor *v, const char *n= ame, + void *opaque, Error **errp) { VirtMachineState *vms =3D VIRT_MACHINE(obj); =20 - vms->dtb_randomness =3D value; + visit_type_OnOffAuto(v, name, &vms->dtb_randomness, errp); } =20 static char *virt_get_oem_id(Object *obj, Error **errp) @@ -4339,16 +4353,16 @@ static void virt_machine_class_init(ObjectClass *oc= , const void *data) "Set MSI settings. " "Valid values are auto, gicv2m, = its and off"); =20 - object_class_property_add_bool(oc, "dtb-randomness", - virt_get_dtb_randomness, - virt_set_dtb_randomness); + object_class_property_add(oc, "dtb-randomness", "OnOffAuto", + virt_get_dtb_randomness, virt_set_dtb_random= ness, + NULL, NULL); object_class_property_set_description(oc, "dtb-randomness", "Set off to disable passing rand= om or " "non-deterministic dtb nodes to = guest"); =20 - object_class_property_add_bool(oc, "dtb-kaslr-seed", - virt_get_dtb_randomness, - virt_set_dtb_randomness); + object_class_property_add(oc, "dtb-kaslr-seed", "OnOffAuto", + virt_get_dtb_randomness, virt_set_dtb_random= ness, + NULL, NULL); object_class_property_set_description(oc, "dtb-kaslr-seed", "Deprecated synonym of dtb-rando= mness"); =20 @@ -4411,9 +4425,6 @@ static void virt_instance_init(Object *obj) /* MTE is disabled by default. */ vms->mte =3D false; =20 - /* Supply kaslr-seed and rng-seed by default */ - vms->dtb_randomness =3D true; - vms->irqmap =3D a15irqmap; =20 vms->virtio_transports =3D NUM_VIRTIO_TRANSPORTS; diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 22e66d1a113c..d4c1aa04f664 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -176,7 +176,7 @@ struct VirtMachineState { bool virt; bool ras; bool mte; - bool dtb_randomness; + OnOffAuto dtb_randomness; bool second_ns_uart_present; OnOffAuto acpi; VirtGICType gic_version; --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1790972670; cv=none; d=zohomail.com; s=zohoarc; b=Y3LlIeRMZzZkWOBcBohn3YGXXyyJcLwK1PdtmloSQyg8qLorzZRnh3bzr76nGqQDcBv8vSswWVL4Ck2yEnJDN0VRh9sKl8g8Vr4aAYINZovUMD1ah5RSQMEYRYQ5IXg7oA0gks3267IXDeuAc+NtUiubhITAL9XmV2yutrD9jfE= ARC-Message-Signature: i=1; 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Fri, 02 Oct 2026 13:21:00 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 17/22] hw/arm/virt: Move virt_flash_create() to machvirt_init() Date: Fri, 2 Oct 2026 14:20:21 -0600 Message-ID: <20261002202026.1204110-18-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::18; envelope-from=mathieu.poirier@linaro.org; helo=mail-pj2-x18.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972671082158500 From: Jean-Philippe Brucker For confidential VMs we'll want to skip flash device creation. Unfortunately, in virt_instance_init() the machine->cgs member has not yet been initialized, so we cannot check whether confidential guest is enabled. Move virt_flash_create() to machvirt_init(), where we can access the machine->cgs member. Signed-off-by: Jean-Philippe Brucker Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Mathieu Poirier --- hw/arm/virt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 35e76951dafd..886ea7a97ea0 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2904,6 +2904,8 @@ static void machvirt_init(MachineState *machine) unsigned int smp_cpus =3D machine->smp.cpus; unsigned int max_cpus =3D machine->smp.max_cpus; =20 + virt_flash_create(vms); + possible_cpus =3D mc->possible_cpu_arch_ids(machine); =20 /* @@ -4429,8 +4431,6 @@ static void virt_instance_init(Object *obj) =20 vms->virtio_transports =3D NUM_VIRTIO_TRANSPORTS; =20 - virt_flash_create(vms); - vms->oem_id =3D g_strndup(ACPI_BUILD_APPNAME6, 6); vms->oem_table_id =3D g_strndup(ACPI_BUILD_APPNAME8, 8); cxl_machine_init(obj, &vms->cxl_devices_state); --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; 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Fri, 02 Oct 2026 13:21:02 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 18/22] hw/arm/virt: Use RAM instead of flash for confidential guest firmware Date: Fri, 2 Oct 2026 14:20:22 -0600 Message-ID: <20261002202026.1204110-19-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::10; envelope-from=mathieu.poirier@linaro.org; helo=mail-pj2-x10.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972697339158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker Use RAM instead of flash to store firmware image and boot information, including UEFI variables. That way the firmware can be measured and included in the Realm's initial measurements. It also prevents variable stored in flash and modified as part of the boot process to be leaked outside the Realm. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mathieu Poirier --- hw/arm/boot.c | 37 +++++++++++++++++++++++++-- hw/arm/virt.c | 58 +++++++++++++++++++++++++++++++++++++++++++ include/hw/arm/boot.h | 9 +++++++ 3 files changed, 102 insertions(+), 2 deletions(-) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 9b7553dde5e1..1e8efada209f 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -1112,7 +1112,36 @@ static void arm_setup_direct_kernel_boot(ARMCPU *cpu, } } =20 -static void arm_setup_firmware_boot(ARMCPU *cpu, struct arm_boot_info *inf= o) +static void arm_setup_confidential_firmware_boot(ARMCPU *cpu, + struct arm_boot_info *inf= o, + const char *firmware_file= name) +{ + ssize_t fw_size; + const char *fname; + AddressSpace *as =3D arm_boot_address_space(cpu, info); + + fname =3D qemu_find_file(QEMU_FILE_TYPE_BIOS, firmware_filename); + if (!fname) { + error_report("Could not find firmware image '%s'", firmware_filena= me); + exit(1); + } + + /* + * Load the firmware image in the Realm's address space. Mapping of t= he + * firmware area in the Realm's address space is done in function + * virt_confidential_firmware_init(). + */ + fw_size =3D load_image_targphys_as(firmware_filename, + info->firmware_base, + info->firmware_max_size, as, NULL); + if (fw_size <=3D 0) { + error_report("could not load firmware '%s'", firmware_filename); + exit(1); + } +} + +static void arm_setup_firmware_boot(ARMCPU *cpu, struct arm_boot_info *inf= o, + const char *firmware_filename) { /* Set up for booting firmware (which might load a kernel via fw_cfg) = */ =20 @@ -1168,6 +1197,10 @@ static void arm_setup_firmware_boot(ARMCPU *cpu, str= uct arm_boot_info *info) } } =20 + if (info->confidential) { + arm_setup_confidential_firmware_boot(cpu, info, firmware_filename); + } + /* * We will start from address 0 (typically a boot ROM image) in the * same way as hardware. Leave env->boot_info NULL, so that @@ -1212,7 +1245,7 @@ void arm_load_kernel(ARMCPU *cpu, MachineState *ms, s= truct arm_boot_info *info) =20 /* Load the kernel. */ if (!info->kernel_filename || info->firmware_loaded) { - arm_setup_firmware_boot(cpu, info); + arm_setup_firmware_boot(cpu, info, ms->firmware); } else { arm_setup_direct_kernel_boot(cpu, info); } diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 886ea7a97ea0..7accb9f55ec8 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1816,6 +1816,16 @@ static PFlashCFI01 *virt_flash_create1(VirtMachineSt= ate *vms, =20 static void virt_flash_create(VirtMachineState *vms) { + /* + * For Realms, the firmware image is placed directly in the guest's + * RAM area. The association between the final location in the + * guest's RAM and the system memory is done in function + * virt_confidential_firmware_init(). + */ + if (virt_machine_is_confidential(vms)) { + return; + } + vms->flash[0] =3D virt_flash_create1(vms, "virt.flash0", "pflash0"); vms->flash[1] =3D virt_flash_create1(vms, "virt.flash1", "pflash1"); } @@ -1866,6 +1876,16 @@ static void virt_flash_fdt(VirtMachineState *vms, MachineState *ms =3D MACHINE(vms); char *nodename; =20 + /* + * For Realms the firmware images are stored in the guest's address + * space. As such there is no need for flash configuration in the FDT. + * See function virt_confidential_firmware_init() and + * arm_setup_confidential_firmware_boot() for details. + */ + if (virt_machine_is_confidential(vms)) { + return; + } + if (sysmem =3D=3D secure_sysmem) { /* Report both flash devices as a single node in the DT */ nodename =3D g_strdup_printf("/flash@%" PRIx64, flashbase); @@ -1901,6 +1921,32 @@ static void virt_flash_fdt(VirtMachineState *vms, } } =20 +static bool virt_confidential_firmware_init(VirtMachineState *vms, + MemoryRegion *sysmem) +{ + MemoryRegion *fw_ram; + hwaddr fw_base =3D vms->memmap[VIRT_FLASH].base; + hwaddr fw_size =3D vms->memmap[VIRT_FLASH].size; + + if (!MACHINE(vms)->firmware) { + return false; + } + + assert(machine_require_guest_memfd_private(MACHINE(vms))); + + fw_ram =3D g_new(MemoryRegion, 1); + memory_region_init_ram_guest_memfd_private(fw_ram, NULL, "fw_ram", fw_= size, + &error_fatal); + /* + * Map the guest's firmware image directly in its address space. + * Copying of the firmware image itself is done in function + * arm_setup_confidential_firmware_boot(). + */ + memory_region_add_subregion(sysmem, fw_base, fw_ram); + + return true; +} + static bool virt_firmware_init(VirtMachineState *vms, MemoryRegion *sysmem, MemoryRegion *secure_sysmem) @@ -1909,6 +1955,15 @@ static bool virt_firmware_init(VirtMachineState *vms, const char *bios_name; BlockBackend *pflash_blk0; =20 + /* + * For a confidential VM, the firmware image and any boot information, + * including EFI variables, are stored in RAM in order to be measurabl= e and + * private. Create a RAM region and load the firmware image there. + */ + if (virt_machine_is_confidential(vms)) { + return virt_confidential_firmware_init(vms, sysmem); + } + /* Map legacy -drive if=3Dpflash to machine properties */ for (i =3D 0; i < ARRAY_SIZE(vms->flash); i++) { pflash_cfi01_legacy_drive(vms->flash[i], @@ -3271,7 +3326,10 @@ static void machvirt_init(MachineState *machine) vms->bootinfo.get_dtb =3D machvirt_dtb; vms->bootinfo.skip_dtb_autoload =3D true; vms->bootinfo.firmware_loaded =3D firmware_loaded; + vms->bootinfo.firmware_base =3D vms->memmap[VIRT_FLASH].base; + vms->bootinfo.firmware_max_size =3D vms->memmap[VIRT_FLASH].size; vms->bootinfo.psci_conduit =3D vms->psci_conduit; + vms->bootinfo.confidential =3D virt_machine_is_confidential(vms); arm_load_kernel(ARM_CPU(first_cpu), machine, &vms->bootinfo); =20 vms->machine_done.notify =3D virt_machine_done; diff --git a/include/hw/arm/boot.h b/include/hw/arm/boot.h index 94386fdbea6c..fe7e14e94651 100644 --- a/include/hw/arm/boot.h +++ b/include/hw/arm/boot.h @@ -113,6 +113,10 @@ struct arm_boot_info { */ bool firmware_loaded; =20 + /* Used when loading firmware into RAM */ + hwaddr firmware_base; + hwaddr firmware_max_size; + /* Address at which board specific loader/setup code exists. If enable= d, * this code-blob will run before anything else. It must return to the * caller via the link register. There is no stack set up. Enabled by @@ -136,6 +140,11 @@ struct arm_boot_info { =20 /* CPU having load the kernel and that should be the first to boot. */ ARMCPU *primary_cpu; + + /* + * Confidential guest boot loads everything into RAM so it can be meas= ured. + */ + bool confidential; }; =20 /** --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1790972654; cv=none; d=zohomail.com; s=zohoarc; b=BcMA90CCkG5Q/PdP3oELV/R8q6kqnXvbF19j5D3aR7B26wZIccjW7N9nGdpSh8thESPavsLJLIcgsVa+jx9jQyFvArjSy+xmjxC6ZjNfYlj9XLOvKKcAkCkQTn+Wcod+biH9v6a6h7DSuiqv3KfnOpqaCYYvmzARGOunUsaE3r8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1790972654; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Fri, 02 Oct 2026 13:21:04 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 19/22] target/arm/kvm-rme: Add DMA remapping for the shared memory region Date: Fri, 2 Oct 2026 14:20:23 -0600 Message-ID: <20261002202026.1204110-20-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=mathieu.poirier@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972655096158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker In Arm CCA, the guest-physical address space is split in half. The top half represents memory shared between guest and host, and the bottom half is private to the guest. From QEMU's point of view, the two halves are merged into a single region, and pages within this region are either shared or private. Virtual devices implemented by the host are only allowed to access the top half. For emulated MMIO, KVM strips the GPA before returning to QEMU, so the GPA already belongs to QEMU's merged view of guest memory. However DMA addresses cannot be stripped this way and need special handling by the VMM. When emulating DMA the VMM needs to translate the addresses into its merged view. Add an IOMMU memory region on the top half, that retargets DMA accesses to the merged sysmem. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mathieu Poirier --- hw/arm/virt.c | 2 + target/arm/kvm-rme.c | 106 ++++++++++++++++++++++++++++++++++++++++++ target/arm/kvm-stub.c | 4 ++ target/arm/kvm_arm.h | 10 ++++ 4 files changed, 122 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 7accb9f55ec8..d915d80db50b 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -3320,6 +3320,8 @@ static void machvirt_init(MachineState *machine) vms->fw_cfg, OBJECT(vms)); } =20 + kvm_arm_rme_init_gpa_space(vms->highest_gpa, vms->bus); + vms->bootinfo.ram_size =3D machine->ram_size; vms->bootinfo.board_id =3D -1; vms->bootinfo.loader_start =3D vms->memmap[VIRT_MEM].base; diff --git a/target/arm/kvm-rme.c b/target/arm/kvm-rme.c index 22c8afe21505..f53927c87076 100644 --- a/target/arm/kvm-rme.c +++ b/target/arm/kvm-rme.c @@ -11,11 +11,13 @@ #include "hw/core/boards.h" #include "hw/core/cpu.h" #include "hw/core/loader.h" +#include "hw/pci/pci.h" #include "kvm_arm.h" #include "migration/blocker.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "qemu/memalign.h" +#include "qemu/units.h" #include "qom/object_interfaces.h" #include "system/confidential-guest-support.h" #include "system/kvm.h" @@ -24,6 +26,23 @@ #define TYPE_RME_GUEST "rme-guest" OBJECT_DECLARE_SIMPLE_TYPE(RmeGuest, RME_GUEST) =20 +/* + * Realms have a split guest-physical address space: the bottom half is pr= ivate + * to the realm, and the top half is shared with the host. Within QEMU, we= use a + * merged view of both halves. Most of RAM is private to the guest and not + * accessible to us, but the guest shares some pages with us. + * + * RealmDmaRegion performs remapping of top-half accesses to system memory. + */ +struct RealmDmaRegion { + IOMMUMemoryRegion parent_obj; +}; + +#define TYPE_REALM_DMA_REGION "realm-dma-region" +OBJECT_DECLARE_SIMPLE_TYPE(RealmDmaRegion, REALM_DMA_REGION) +OBJECT_DEFINE_SIMPLE_TYPE(RealmDmaRegion, realm_dma_region, + REALM_DMA_REGION, IOMMU_MEMORY_REGION); + typedef struct { hwaddr base; hwaddr size; @@ -34,6 +53,10 @@ struct RmeGuest { ConfidentialGuestSupport parent_obj; Notifier rom_load_notifier; GSList *ram_regions; + uint8_t ipa_bits; + + RealmDmaRegion *dma_region; + AddressSpace dma_as; }; =20 OBJECT_DEFINE_SIMPLE_TYPE_WITH_INTERFACES(RmeGuest, rme_guest, RME_GUEST, @@ -217,3 +240,86 @@ static void rme_guest_init(Object *obj) static void rme_guest_finalize(Object *obj) { } + +static AddressSpace *rme_dma_get_address_space(PCIBus *bus, void *opaque, + int devfn) +{ + return &rme_guest->dma_as; +} + +static const PCIIOMMUOps rme_dma_ops =3D { + .get_address_space =3D rme_dma_get_address_space, +}; + +void kvm_arm_rme_init_gpa_space(hwaddr highest_gpa, PCIBus *pci_bus) +{ + RealmDmaRegion *dma_region; + const unsigned int ipa_bits =3D 64 - clz64(highest_gpa) + 1; + + if (!rme_guest) { + return; + } + + assert(ipa_bits < 64); + + /* + * Setup a DMA translation from the shared top half of the guest-physi= cal + * address space to our merged view of RAM. + */ + dma_region =3D g_new0(RealmDmaRegion, 1); + + memory_region_init_iommu(dma_region, sizeof(*dma_region), + TYPE_REALM_DMA_REGION, OBJECT(rme_guest), + "realm-dma-region", 1ULL << ipa_bits); + address_space_init(&rme_guest->dma_as, MEMORY_REGION(dma_region), + TYPE_REALM_DMA_REGION); + rme_guest->dma_region =3D dma_region; + rme_guest->ipa_bits =3D ipa_bits; + + pci_setup_iommu(pci_bus, &rme_dma_ops, NULL); +} + +static void realm_dma_region_init(Object *obj) +{ +} + +static IOMMUTLBEntry realm_dma_region_translate(IOMMUMemoryRegion *mr, + hwaddr addr, + IOMMUAccessFlags flag, + int iommu_idx) +{ + const hwaddr address_mask =3D MAKE_64BIT_MASK(0, rme_guest->ipa_bits -= 1); + IOMMUTLBEntry entry =3D { + .target_as =3D &address_space_memory, + .iova =3D addr, + .translated_addr =3D addr & address_mask, + /* + * Somewhat arbitrary granule for users that need one, such as + * address_space_get_iotlb_entry(). Should be relatively large to + * avoid frequent TLB misses. It can't be larger than memory region + * alignment (eg. address_mask) because that would mask the whole + * address, preventing vhost from finding the correct memory regio= n. + */ + .addr_mask =3D 4 * KiB - 1, + .perm =3D IOMMU_RW, + }; + + return entry; +} + +static void realm_dma_region_replay(IOMMUMemoryRegion *mr, IOMMUNotifier *= n) +{ + /* Nothing is shared at boot */ +} + +static void realm_dma_region_finalize(Object *obj) +{ +} + +static void realm_dma_region_class_init(ObjectClass *oc, const void *data) +{ + IOMMUMemoryRegionClass *imrc =3D IOMMU_MEMORY_REGION_CLASS(oc); + + imrc->translate =3D realm_dma_region_translate; + imrc->replay =3D realm_dma_region_replay; +} diff --git a/target/arm/kvm-stub.c b/target/arm/kvm-stub.c index 5fde96f9b281..e5af5d20367f 100644 --- a/target/arm/kvm-stub.c +++ b/target/arm/kvm-stub.c @@ -42,6 +42,10 @@ bool kvm_arm_el2_supported(void) return false; } =20 +void kvm_arm_rme_init_gpa_space(hwaddr highest_gpa, PCIBus *pci_bus) +{ +} + /* * These functions should never actually be called without KVM support. */ diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index d95381c13afa..b4a293911f71 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -250,4 +250,14 @@ char *kvm_print_register_name(uint64_t regidx); */ void kvm_arm_rme_vcpu_init(ARMCPU *cpu); =20 +/** + * kvm_arm_rme_setup_gpa + * @highest_gpa: highest address of the lower half of the guest address sp= ace + * @pci_bus: The main PCI bus, for which PCI queries DMA address spaces + * + * Setup the guest-physical address space for a Realm. Install a memory re= gion + * and notifier to manage the shared upper half of the address space. + */ +void kvm_arm_rme_init_gpa_space(hwaddr highest_gpa, PCIBus *pci_bus); + #endif --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1790972585; cv=none; d=zohomail.com; s=zohoarc; b=OT+57FfOv39E+fyFwa3HQT3HChULNLwha/Q6pWHCBSnSg5twyf6NXJDmicOKw1siwzLm1JkHnt9zAW971atYQ7jTW2w4FQqTh8Tk1Ab/eRzLYHD6UkNVf0f3+glSuRmgTMgBF1aDDsmqHwKNcqKTy7J0uXtGwXpUlmszpntd/X8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1790972585; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Fri, 02 Oct 2026 13:21:06 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 20/22] docs/interop/firmware.json: Add arm-rme firmware feature Date: Fri, 2 Oct 2026 14:20:24 -0600 Message-ID: <20261002202026.1204110-21-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=mathieu.poirier@linaro.org; helo=mail-pj1-x1029.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972586798158500 From: Jean-Philippe Brucker Some distributions provide packages continaing firmware to be run under QEMU, such as "qemu-efi-aarch64" or "edk2-aarch64". Those packages also contain descriptors in /usr/share/qemu/firmware/*.json listing the firmware features, so that environments like libvirt can figure out which firmware they can load. Define an optional feature for arm64 firmware to indicate that a firmware supports running in a Realm. Firmware implementations need extra support for running in a Realm, in particular to distinguish shared from private guest memory. Signed-off-by: Jean-Philippe Brucker Acked-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Mathieu Poirier --- docs/interop/firmware.json | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/docs/interop/firmware.json b/docs/interop/firmware.json index 421bee0e5ed4..2850b91078d9 100644 --- a/docs/interop/firmware.json +++ b/docs/interop/firmware.json @@ -161,6 +161,9 @@ # options related to this feature are documented in # "docs/system/i386/amd-memory-encryption.rst". # +# @arm-rme: The firmware supports running in a Realm, under the Arm Realm +# Management Extension (RME). +# # @intel-tdx: The firmware supports running under Intel Trust Domain # Extensions (TDX). # @@ -229,7 +232,7 @@ { 'enum' : 'FirmwareFeature', 'data' : [ 'acpi-s3', 'acpi-s4', 'amd-sev', 'amd-sev-es', 'amd-sev-snp', - 'intel-tdx', + 'arm-rme', 'intel-tdx', 'enrolled-keys', 'requires-smm', 'secure-boot', 'host-uefi-vars', 'verbose-dynamic', 'verbose-static' ] } --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Fri, 02 Oct 2026 13:21:07 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 21/22] hw/arm/boot: Load DTB as is for confidential VMs Date: Fri, 2 Oct 2026 14:20:25 -0600 Message-ID: <20261002202026.1204110-22-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::2a; envelope-from=mathieu.poirier@linaro.org; helo=mail-pj2-x2a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972506569158500 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker Load DTB without modifications when provided. That way it is possible for a verification entity to reconstruct the Realm's initial measurement. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mathieu Poirier --- hw/arm/boot.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 1e8efada209f..9b3d3558bcbc 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -477,7 +477,14 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_in= fo *binfo, g_autoptr(MemoryDeviceInfoList) md_list =3D NULL; Error *err =3D NULL; =20 - if (binfo->dtb_filename) { + if (binfo->dtb_filename && binfo->confidential) { + /* + * If the user is providing a DTB for a confidential VM, it is alr= eady + * tailored to this configuration and measured. Load it as is, wit= hout + * any modification. + */ + return rom_add_file_fixed_as(binfo->dtb_filename, addr, -1, as); + } else if (binfo->dtb_filename) { char *filename; filename =3D qemu_find_file(QEMU_FILE_TYPE_DTB, binfo->dtb_filenam= e); if (!filename) { --=20 2.43.0 From nobody Sat Oct 24 00:33:25 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1790972643; cv=none; d=zohomail.com; s=zohoarc; b=IMQW17NU8epBQ4KbMFaej/P0GBO78BK4fdNbc4iVxcCSmI7+Zg+r0SuK7h82keskv7t/WzxVZhM4kE+ykL22UsQzTLXIyffmREG6IhMQpKP1wVe/KupbSzmkIinp8AZNvNK65/Bk5PdINyzUA6bp/3/wO4gx0VHP05hHsyZDPNc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1790972643; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Fri, 02 Oct 2026 13:21:09 -0700 (PDT) From: Mathieu Poirier To: berrange@redhat.com, kchamart@redhat.com, pierrick.bouvier@oss.qualcomm.com, peter.maydell@linaro.org, mst@redhat.com, cohuck@redhat.com, pbonzini@redhat.com, eblake@redhat.com, armbru@redhat.com, enju.kohei@fujitsu.com, lorenzo.pieralisi@linaro.org, gshan@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [RFC v5 22/22] hw/arm/boot: Skip bootloader for confidential guests Date: Fri, 2 Oct 2026 14:20:26 -0600 Message-ID: <20261002202026.1204110-23-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261002202026.1204110-1-mathieu.poirier@linaro.org> References: <20261002202026.1204110-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::c; envelope-from=mathieu.poirier@linaro.org; helo=mail-pj2-x0c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1790972644995158501 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker An independent verifier needs to reconstruct the content of guest memory in order to attest that it is running trusted code. To avoid having to reconstruct the bootloader generated by QEMU, skip this step and jump directly to the kernel, with the DTB address in x0 as specified by the Linux boot protocol [1]. [1] https://docs.kernel.org/arch/arm64/booting.html Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mathieu Poirier --- hw/arm/boot.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 9b3d3558bcbc..da4f399a3026 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -731,7 +731,13 @@ static void do_cpu_reset(void *opaque) if (cpu =3D=3D info->primary_cpu) { AddressSpace *as =3D arm_boot_address_space(cpu, info); =20 - cpu_set_pc(cs, info->loader_start); + if (info->confidential) { + assert(is_a64(env)); + env->xregs[0] =3D info->dtb_start; + cpu_set_pc(cs, info->entry); + } else { + cpu_set_pc(cs, info->loader_start); + } =20 if (!have_dtb(info)) { set_kernel_args(info, as); @@ -821,7 +827,8 @@ static ssize_t arm_load_elf(struct arm_boot_info *info,= uint64_t *pentry, } =20 static uint64_t load_aarch64_image(const char *filename, hwaddr mem_base, - hwaddr *entry, AddressSpace *as) + hwaddr *entry, AddressSpace *as, + bool confidential) { const size_t max_bytes =3D LOAD_IMAGE_MAX_DECOMPRESSED_BYTES; hwaddr kernel_load_offset =3D KERNEL64_LOAD_ADDR; @@ -873,7 +880,8 @@ static uint64_t load_aarch64_image(const char *filename= , hwaddr mem_base, * bootloader, we can just load it starting at 2MB+offset rath= er * than 0MB + offset. */ - if (kernel_load_offset < BOOTLOADER_MAX_SIZE) { + if (kernel_load_offset < BOOTLOADER_MAX_SIZE && + !confidential) { kernel_load_offset +=3D 2 * MiB; } } @@ -957,7 +965,8 @@ static void arm_setup_direct_kernel_boot(ARMCPU *cpu, } if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && kernel_size < 0) { kernel_size =3D load_aarch64_image(info->kernel_filename, - info->loader_start, &entry, as); + info->loader_start, &entry, as, + info->confidential); is_linux =3D 1; if (kernel_size >=3D 0) { image_low_addr =3D entry; @@ -1098,8 +1107,11 @@ static void arm_setup_direct_kernel_boot(ARMCPU *cpu, fixupcontext[FIXUP_ENTRYPOINT_LO] =3D entry; fixupcontext[FIXUP_ENTRYPOINT_HI] =3D entry >> 32; =20 - arm_write_bootloader("bootloader", as, info->loader_start, - primary_loader, fixupcontext); + /* Immediately jump to the kernel when guest is a Realm */ + if (!info->confidential) { + arm_write_bootloader("bootloader", as, info->loader_start, + primary_loader, fixupcontext); + } =20 if (info->write_board_setup) { info->write_board_setup(cpu, info); --=20 2.43.0