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Fri, 02 Oct 2026 10:50:57 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 01/27] accel/tcg: move helper_exit_atomic next to cpu_loop_exit_atomic Date: Sat, 3 Oct 2026 01:50:09 +0800 Message-ID: <20261002175037.1747-2-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1335; envelope-from=luoyonggang@gmail.com; helo=mail-dy1-x1335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963720070158500 Content-Type: text/plain; charset="utf-8" helper_exit_atomic only forwards to cpu_loop_exit_atomic. Define it in cpu-exec-common.c with that function, and move its DEF_HELPER line to cpu-exec-common.h. That file emits helper_info_exit_atomic. tcg-runtime.c keeps the integer helpers. Signed-off-by: Yonggang Luo --- accel/tcg/cpu-exec-common.c | 10 ++++++++++ accel/tcg/cpu-exec-common.h | 2 ++ accel/tcg/tcg-runtime.c | 8 -------- accel/tcg/tcg-runtime.h | 2 -- include/exec/helper-gen-common.h | 4 ++++ include/exec/helper-proto-common.h | 4 ++++ 6 files changed, 20 insertions(+), 10 deletions(-) create mode 100644 accel/tcg/cpu-exec-common.h diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c index 68077c8fd9d..d20cece1c5f 100644 --- a/accel/tcg/cpu-exec-common.c +++ b/accel/tcg/cpu-exec-common.c @@ -23,8 +23,13 @@ #include "qemu/plugin.h" #include "qemu/main-loop.h" #include "accel/tcg/cpu-loop.h" +#include "exec/helper-proto-common.h" #include "internal-common.h" =20 +#define HELPER_H "accel/tcg/cpu-exec-common.h" +#include "exec/helper-info.c.inc" +#undef HELPER_H + bool tcg_allowed; =20 /* @@ -120,3 +125,8 @@ void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc) cpu->exception_index =3D EXCP_ATOMIC; cpu_loop_exit_restore(cpu, pc); } + +void HELPER(exit_atomic)(CPUArchState *env) +{ + cpu_loop_exit_atomic(env_cpu(env), GETPC()); +} diff --git a/accel/tcg/cpu-exec-common.h b/accel/tcg/cpu-exec-common.h new file mode 100644 index 00000000000..19359a97bae --- /dev/null +++ b/accel/tcg/cpu-exec-common.h @@ -0,0 +1,2 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +DEF_HELPER_FLAGS_1(exit_atomic, TCG_CALL_NO_WG, noreturn, env) diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c index 7c0aab98a80..764c62c684d 100644 --- a/accel/tcg/tcg-runtime.c +++ b/accel/tcg/tcg-runtime.c @@ -23,10 +23,7 @@ */ #include "qemu/osdep.h" #include "qemu/host-utils.h" -#include "exec/cpu-common.h" #include "exec/helper-proto-common.h" -#include "accel/tcg/cpu-loop.h" -#include "accel/tcg/getpc.h" =20 #define HELPER_H "accel/tcg/tcg-runtime.h" #include "exec/helper-info.c.inc" @@ -129,8 +126,3 @@ uint64_t HELPER(ctpop_i64)(uint64_t arg) { return ctpop64(arg); } - -void HELPER(exit_atomic)(CPUArchState *env) -{ - cpu_loop_exit_atomic(env_cpu(env), GETPC()); -} diff --git a/accel/tcg/tcg-runtime.h b/accel/tcg/tcg-runtime.h index 0b832176b33..9b4c1c24916 100644 --- a/accel/tcg/tcg-runtime.h +++ b/accel/tcg/tcg-runtime.h @@ -22,8 +22,6 @@ DEF_HELPER_FLAGS_1(ctpop_i64, TCG_CALL_NO_RWG_SE, i64, i6= 4) =20 DEF_HELPER_FLAGS_1(lookup_tb_ptr, TCG_CALL_NO_WG_SE, cptr, env) =20 -DEF_HELPER_FLAGS_1(exit_atomic, TCG_CALL_NO_WG, noreturn, env) - #ifndef IN_HELPER_PROTO /* * Pass calls to memset directly to libc, without a thunk in qemu. diff --git a/include/exec/helper-gen-common.h b/include/exec/helper-gen-com= mon.h index 834590dc4e5..ed5521ad881 100644 --- a/include/exec/helper-gen-common.h +++ b/include/exec/helper-gen-common.h @@ -7,6 +7,10 @@ #ifndef HELPER_GEN_COMMON_H #define HELPER_GEN_COMMON_H =20 +#define HELPER_H "accel/tcg/cpu-exec-common.h" +#include "exec/helper-gen.h.inc" +#undef HELPER_H + #define HELPER_H "accel/tcg/tcg-runtime.h" #include "exec/helper-gen.h.inc" #undef HELPER_H diff --git a/include/exec/helper-proto-common.h b/include/exec/helper-proto= -common.h index 76e6c25becb..28afa7782d0 100644 --- a/include/exec/helper-proto-common.h +++ b/include/exec/helper-proto-common.h @@ -9,6 +9,10 @@ =20 #include "qemu/atomic128.h" /* for HAVE_CMPXCHG128 */ =20 +#define HELPER_H "accel/tcg/cpu-exec-common.h" +#include "exec/helper-proto.h.inc" +#undef HELPER_H + #define HELPER_H "accel/tcg/tcg-runtime.h" #include "exec/helper-proto.h.inc" #undef HELPER_H --=20 2.52.0.windows.1 From nobody Sat Oct 24 00:33:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Fri, 02 Oct 2026 10:51:05 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 02/27] accel/tcg: add cpu_raise_excp and cpu_raise_excp_restore helpers Date: Sat, 3 Oct 2026 01:50:10 +0800 Message-ID: <20261002175037.1747-3-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::d; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x0d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963547168158500 Content-Type: text/plain; charset="utf-8" Add cpu_raise_excp without host state restoration and cpu_raise_excp_restore with explicit state restoration. Signed-off-by: Yonggang Luo --- accel/tcg/cpu-exec-common.c | 13 +++++++++++++ include/accel/tcg/cpu-loop.h | 22 ++++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c index d20cece1c5f..b551c1439ec 100644 --- a/accel/tcg/cpu-exec-common.c +++ b/accel/tcg/cpu-exec-common.c @@ -118,6 +118,19 @@ void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc) cpu_loop_exit(cpu); } =20 +void cpu_raise_excp(CPUState *cpu, int exception_index) +{ + cpu->exception_index =3D exception_index; + cpu_loop_exit(cpu); +} + +void cpu_raise_excp_restore(CPUState *cpu, int exception_index, + uintptr_t retaddr) +{ + cpu->exception_index =3D exception_index; + cpu_loop_exit_restore(cpu, retaddr); +} + void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc) { /* Prevent looping if already executing in a serial context. */ diff --git a/include/accel/tcg/cpu-loop.h b/include/accel/tcg/cpu-loop.h index f4d38bc2bca..5282c70d5e4 100644 --- a/include/accel/tcg/cpu-loop.h +++ b/include/accel/tcg/cpu-loop.h @@ -65,6 +65,28 @@ G_NORETURN void cpu_loop_exit_noexc(CPUState *cpu); G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t host_pc); G_NORETURN void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t host_pc); =20 +/** + * cpu_raise_excp: + * @cpu: the cpu context + * @exception_index: EXCP_* or target trap number + * + * Raise @exception_index and exit the current TB without restoring guest + * state. + */ +G_NORETURN void cpu_raise_excp(CPUState *cpu, int exception_index); + +/** + * cpu_raise_excp_restore: + * @cpu: the cpu context + * @exception_index: EXCP_* or target trap number + * @retaddr: the host pc within the translation + * + * Raise @exception_index and exit the current TB. Restore guest state from + * @retaddr when nonzero; otherwise, behave like cpu_raise_excp(). + */ +G_NORETURN void cpu_raise_excp_restore(CPUState *cpu, int exception_index, + uintptr_t retaddr); + /** * cpu_loop_exit: * @cpu: the cpu context --=20 2.52.0.windows.1 From nobody Sat Oct 24 00:33:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1790963572; cv=none; d=zohomail.com; s=zohoarc; b=kwASVX0eFB+wc4t88RnEYag1xTVklCrYn6m37DVm+qmpUuB0fPlQZVTysgqX/3eimbwUQbhrn6SetGqTdZye8zasUSfIEhAlRcO5O/XznkPXZU3gIHljmP3drxFdZDTYs6KnTYZI/ZYu5pkjYG27n57qZLKCz0lfyAd/hIJPHwY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1790963572; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Fri, 02 Oct 2026 10:51:13 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. 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charset="utf-8" Signed-off-by: Yonggang Luo --- accel/tcg/cpu-exec-common.c | 12 ++++++++++++ accel/tcg/cpu-exec-common.h | 2 ++ 2 files changed, 14 insertions(+) diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c index b551c1439ec..715e3cb327c 100644 --- a/accel/tcg/cpu-exec-common.c +++ b/accel/tcg/cpu-exec-common.c @@ -131,6 +131,18 @@ void cpu_raise_excp_restore(CPUState *cpu, int excepti= on_index, cpu_loop_exit_restore(cpu, retaddr); } =20 +/* Raise exception and exit the TB without restoring guest state. */ +void HELPER(raise_excp)(CPUArchState *env, uint32_t exception) +{ + cpu_raise_excp(env_cpu(env), exception); +} + +/* Raise exception and exit the TB, restoring state from GETPC(). */ +void HELPER(raise_excp_restore)(CPUArchState *env, uint32_t exception) +{ + cpu_raise_excp_restore(env_cpu(env), exception, GETPC()); +} + void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc) { /* Prevent looping if already executing in a serial context. */ diff --git a/accel/tcg/cpu-exec-common.h b/accel/tcg/cpu-exec-common.h index 19359a97bae..1e82f3b14d3 100644 --- a/accel/tcg/cpu-exec-common.h +++ b/accel/tcg/cpu-exec-common.h @@ -1,2 +1,4 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ DEF_HELPER_FLAGS_1(exit_atomic, TCG_CALL_NO_WG, noreturn, env) +DEF_HELPER_FLAGS_2(raise_excp, TCG_CALL_NO_WG, noreturn, env, i32) +DEF_HELPER_FLAGS_2(raise_excp_restore, TCG_CALL_NO_WG, noreturn, env, i32) --=20 2.52.0.windows.1 From nobody Sat Oct 24 00:33:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Fri, 02 Oct 2026 10:51:20 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 04/27] target/rx: Unify BRK and INT trap handling Date: Sat, 3 Oct 2026 01:50:12 +0800 Message-ID: <20261002175037.1747-5-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::132c; envelope-from=luoyonggang@gmail.com; helo=mail-dy1-x132c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963639555158500 From: Philippe Mathieu-Daud=C3=A9 BRK is equivalent to INT #0, so route both instructions through the same trap helper. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Peter Maydell --- target/rx/helper.h | 3 +-- target/rx/op_helper.c | 7 +------ target/rx/translate.c | 19 +++++++++---------- 3 files changed, 11 insertions(+), 18 deletions(-) diff --git a/target/rx/helper.h b/target/rx/helper.h index 8cc38b0cb71..f3897ce7619 100644 --- a/target/rx/helper.h +++ b/target/rx/helper.h @@ -2,8 +2,7 @@ DEF_HELPER_1(raise_illegal_instruction, noreturn, env) DEF_HELPER_1(raise_access_fault, noreturn, env) DEF_HELPER_1(raise_privilege_violation, noreturn, env) DEF_HELPER_1(wait, noreturn, env) -DEF_HELPER_2(rxint, noreturn, env, i32) -DEF_HELPER_1(rxbrk, noreturn, env) +DEF_HELPER_2(trap, noreturn, env, i32) DEF_HELPER_3(fadd, f32, env, f32, f32) DEF_HELPER_3(fsub, f32, env, f32, f32) DEF_HELPER_3(fmul, f32, env, f32, f32) diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c index 36df7d377e5..6782912247e 100644 --- a/target/rx/op_helper.c +++ b/target/rx/op_helper.c @@ -455,12 +455,7 @@ G_NORETURN void helper_wait(CPURXState *env) raise_exception(env, EXCP_HLT, 0); } =20 -G_NORETURN void helper_rxint(CPURXState *env, uint32_t vec) +G_NORETURN void helper_trap(CPURXState *env, uint32_t vec) { raise_exception(env, 0x100 + vec, 0); } - -G_NORETURN void helper_rxbrk(CPURXState *env) -{ - raise_exception(env, 0x100, 0); -} diff --git a/target/rx/translate.c b/target/rx/translate.c index 132d495710c..d0910fbf8e7 100644 --- a/target/rx/translate.c +++ b/target/rx/translate.c @@ -2170,26 +2170,25 @@ static bool trans_RTE(DisasContext *ctx, arg_RTE *a) return true; } =20 -/* brk */ -static bool trans_BRK(DisasContext *ctx, arg_BRK *a) +static bool do_trap(DisasContext *ctx, uint8_t vec) { tcg_gen_movi_i32(cpu_pc, ctx->base.pc_next); - gen_helper_rxbrk(tcg_env); + gen_helper_trap(tcg_env, tcg_constant_i32(vec)); ctx->base.is_jmp =3D DISAS_NORETURN; return true; } =20 +/* brk */ +static bool trans_BRK(DisasContext *ctx, arg_BRK *a) +{ + return do_trap(ctx, 0); +} + /* int #imm */ static bool trans_INT(DisasContext *ctx, arg_INT *a) { - TCGv_i32 vec; - tcg_debug_assert(a->imm < 0x100); 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Fri, 02 Oct 2026 10:51:28 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 05/27] target/rx: Define exception vector constants Date: Sat, 3 Oct 2026 01:50:13 +0800 Message-ID: <20261002175037.1747-6-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::f; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x0f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963734175158500 Name RX exception vectors and trap ranges, and use the definitions throughout exception handling and exception raising. Assert that exception indexes remain within the defined range before accessing their vector tables. Signed-off-by: Yonggang Luo Co-developed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Peter Maydell --- target/rx/cpu.h | 13 +++++++++++++ target/rx/helper.c | 21 +++++++++++---------- target/rx/op_helper.c | 10 +++++----- target/rx/translate.c | 2 +- 4 files changed, 30 insertions(+), 16 deletions(-) diff --git a/target/rx/cpu.h b/target/rx/cpu.h index 64ba48a7329..0d9f4898a26 100644 --- a/target/rx/cpu.h +++ b/target/rx/cpu.h @@ -71,6 +71,19 @@ enum { NUM_REGS =3D 16, }; =20 +#define RX_EXCP_TRAP_COUNT 0x100 + +enum { + RX_EXCP_PRIVILEGE_VIOLATION =3D 20, + RX_EXCP_ACCESS =3D 21, + RX_EXCP_ILLEGAL_INSTRUCTION =3D 23, + RX_EXCP_FPU =3D 25, + RX_EXCP_NMI =3D 30, + RX_EXCP_TRAP_BASE =3D 0x100, /* Up to RX_EXCP_TRAP_COUNT= */ +}; + +#define RX_EXCP_COUNT (RX_EXCP_TRAP_BASE + RX_EXCP_TRAP_COUNT) + typedef struct CPUArchState { /* CPU registers */ uint32_t regs[NUM_REGS]; /* general registers */ diff --git a/target/rx/helper.c b/target/rx/helper.c index 0f99279bbaa..bc76dd28ab3 100644 --- a/target/rx/helper.c +++ b/target/rx/helper.c @@ -86,13 +86,14 @@ void rx_cpu_do_interrupt(CPUState *cs) env->isp -=3D 4; cpu_stl_le_data(env, env->isp, env->pc); =20 - if (vec < 0x100) { - env->pc =3D cpu_ldl_le_data(env, 0xffffff80 + vec * 4); - } else { + assert(vec < RX_EXCP_COUNT); + if (vec >=3D RX_EXCP_TRAP_BASE) { env->pc =3D cpu_ldl_le_data(env, env->intb + (vec & 0xff) * 4); + } else { + env->pc =3D cpu_ldl_le_data(env, 0xffffff80 + vec * 4); } =20 - if (vec =3D=3D 30) { + if (vec =3D=3D RX_EXCP_NMI) { /* Non-maskable interrupt */ qemu_plugin_vcpu_interrupt_cb(cs, last_pc); } else { @@ -100,22 +101,22 @@ void rx_cpu_do_interrupt(CPUState *cs) } =20 switch (vec) { - case 20: + case RX_EXCP_PRIVILEGE_VIOLATION: expname =3D "privilege violation"; break; - case 21: + case RX_EXCP_ACCESS: expname =3D "access exception"; break; - case 23: + case RX_EXCP_ILLEGAL_INSTRUCTION: expname =3D "illegal instruction"; break; - case 25: + case RX_EXCP_FPU: expname =3D "fpu exception"; break; - case 30: + case RX_EXCP_NMI: expname =3D "non-maskable interrupt"; break; - case 0x100 ... 0x1ff: + case RX_EXCP_TRAP_BASE ... RX_EXCP_TRAP_BASE + RX_EXCP_TRAP_COUNT = - 1: expname =3D "unconditional trap"; } qemu_log_mask(CPU_LOG_INT, "exception 0x%02x [%s] raised\n", diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c index 6782912247e..d4e9ac2f192 100644 --- a/target/rx/op_helper.c +++ b/target/rx/op_helper.c @@ -115,7 +115,7 @@ static void update_fpsw(CPURXState *env, float32 ret, u= intptr_t retaddr) enable =3D FIELD_EX32(env->fpsw, FPSW, ENABLE); enable |=3D 1 << 5; /* CE always enabled */ if (cause & enable) { - raise_exception(env, 21, retaddr); + raise_exception(env, RX_EXCP_ACCESS, retaddr); } } } @@ -432,17 +432,17 @@ void raise_exception(CPURXState *env, int index, =20 G_NORETURN void helper_raise_privilege_violation(CPURXState *env) { - raise_exception(env, 20, GETPC()); + raise_exception(env, RX_EXCP_PRIVILEGE_VIOLATION, GETPC()); } =20 G_NORETURN void helper_raise_access_fault(CPURXState *env) { - raise_exception(env, 21, GETPC()); + raise_exception(env, RX_EXCP_ACCESS, GETPC()); } =20 G_NORETURN void helper_raise_illegal_instruction(CPURXState *env) { - raise_exception(env, 23, GETPC()); + raise_exception(env, RX_EXCP_ILLEGAL_INSTRUCTION, GETPC()); } =20 G_NORETURN void helper_wait(CPURXState *env) @@ -457,5 +457,5 @@ G_NORETURN void helper_wait(CPURXState *env) =20 G_NORETURN void helper_trap(CPURXState *env, uint32_t vec) { - raise_exception(env, 0x100 + vec, 0); + raise_exception(env, RX_EXCP_TRAP_BASE + vec, 0); } diff --git a/target/rx/translate.c b/target/rx/translate.c index d0910fbf8e7..1bacc7adf92 100644 --- a/target/rx/translate.c +++ b/target/rx/translate.c @@ -2187,7 +2187,7 @@ static bool trans_BRK(DisasContext *ctx, arg_BRK *a) /* int #imm */ static bool trans_INT(DisasContext *ctx, arg_INT *a) { - tcg_debug_assert(a->imm < 0x100); + tcg_debug_assert(a->imm < RX_EXCP_TRAP_COUNT); return do_trap(ctx, a->imm); } =20 --=20 2.52.0.windows.1 From nobody Sat Oct 24 00:33:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 02 Oct 2026 10:51:37 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 06/27] target/sh4: Define exception vector constants Date: Sat, 3 Oct 2026 01:50:14 +0800 Message-ID: <20261002175037.1747-7-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:38::f; envelope-from=luoyonggang@gmail.com; helo=mail-dl2-x0f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963714270158500 Content-Type: text/plain; charset="utf-8" Name SH4 exception vectors and use the definitions throughout exception handling and exception raising. Signed-off-by: Yonggang Luo Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/sh4/cpu.h | 21 +++++++++++++++ target/sh4/helper.c | 60 +++++++++++++++++++++--------------------- target/sh4/op_helper.c | 16 +++++------ 3 files changed, 59 insertions(+), 38 deletions(-) diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 6984bb462fb..a1e9049b7be 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -135,6 +135,27 @@ typedef struct memory_content { struct memory_content *next; } memory_content; =20 +/* Guest trap numbers. */ +enum { + SH4_EXCP_RESET =3D 0x000, + SH4_EXCP_MANUAL_RESET =3D 0x020, + SH4_EXCP_TLB_MISS =3D 0x040, + SH4_EXCP_DTLB_MISS_WRITE =3D 0x060, + SH4_EXCP_INITIAL_PAGE_WRITE =3D 0x080, + SH4_EXCP_TLB_VIOLATION =3D 0x0a0, + SH4_EXCP_DTLB_VIOLATION_WRITE =3D 0x0c0, + SH4_EXCP_ADDR_ERROR =3D 0x0e0, + SH4_EXCP_DATA_WRITE =3D 0x100, + SH4_EXCP_FPU =3D 0x120, + SH4_EXCP_TLB_MULTIPLE =3D 0x140, + SH4_EXCP_TRAPA =3D 0x160, + SH4_EXCP_ILLEGAL_INSTRUCTION =3D 0x180, + SH4_EXCP_SLOT_ILLEGAL_INSTRUCTION =3D 0x1a0, + SH4_EXCP_USER_BREAK =3D 0x1e0, + SH4_EXCP_FPU_DISABLE =3D 0x800, + SH4_EXCP_SLOT_FPU_DISABLE =3D 0x820, +}; + typedef struct CPUArchState { uint32_t flags; /* general execution flags */ uint32_t gregs[24]; /* general registers */ diff --git a/target/sh4/helper.c b/target/sh4/helper.c index b6b057f104b..0fbd613f333 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -70,7 +70,7 @@ void superh_cpu_do_interrupt(CPUState *cs) do_irq =3D do_irq && (cs->exception_index =3D=3D -1); =20 if (env->sr & (1u << SR_BL)) { - if (do_exp && cs->exception_index !=3D 0x1e0) { + if (do_exp && cs->exception_index !=3D SH4_EXCP_USER_BREAK) { /* In theory a masked exception generates a reset exception, which in turn jumps to the reset vector. However this only works when using a bootloader. When using a kernel and an @@ -97,43 +97,43 @@ void superh_cpu_do_interrupt(CPUState *cs) if (qemu_loglevel_mask(CPU_LOG_INT)) { const char *expname; switch (cs->exception_index) { - case 0x0e0: + case SH4_EXCP_ADDR_ERROR: expname =3D "addr_error"; break; - case 0x040: + case SH4_EXCP_TLB_MISS: expname =3D "tlb_miss"; break; - case 0x0a0: + case SH4_EXCP_TLB_VIOLATION: expname =3D "tlb_violation"; break; - case 0x180: + case SH4_EXCP_ILLEGAL_INSTRUCTION: expname =3D "illegal_instruction"; break; - case 0x1a0: + case SH4_EXCP_SLOT_ILLEGAL_INSTRUCTION: expname =3D "slot_illegal_instruction"; break; - case 0x800: + case SH4_EXCP_FPU_DISABLE: expname =3D "fpu_disable"; break; - case 0x820: + case SH4_EXCP_SLOT_FPU_DISABLE: expname =3D "slot_fpu"; break; - case 0x100: + case SH4_EXCP_DATA_WRITE: expname =3D "data_write"; break; - case 0x060: + case SH4_EXCP_DTLB_MISS_WRITE: expname =3D "dtlb_miss_write"; break; - case 0x0c0: + case SH4_EXCP_DTLB_VIOLATION_WRITE: expname =3D "dtlb_violation_write"; break; - case 0x120: + case SH4_EXCP_FPU: expname =3D "fpu_exception"; break; - case 0x080: + case SH4_EXCP_INITIAL_PAGE_WRITE: expname =3D "initial_page_write"; break; - case 0x160: + case SH4_EXCP_TRAPA: expname =3D "trapa"; break; default: @@ -161,18 +161,18 @@ void superh_cpu_do_interrupt(CPUState *cs) if (do_exp) { env->expevt =3D cs->exception_index; switch (cs->exception_index) { - case 0x000: - case 0x020: - case 0x140: + case SH4_EXCP_RESET: + case SH4_EXCP_MANUAL_RESET: + case SH4_EXCP_TLB_MULTIPLE: env->sr &=3D ~(1u << SR_FD); env->sr |=3D 0xf << 4; /* IMASK */ env->pc =3D 0xa0000000; break; - case 0x040: - case 0x060: + case SH4_EXCP_TLB_MISS: + case SH4_EXCP_DTLB_MISS_WRITE: env->pc =3D env->vbr + 0x400; break; - case 0x160: + case SH4_EXCP_TRAPA: env->spc +=3D 2; /* special case for TRAPA */ /* fall through */ default: @@ -632,7 +632,7 @@ void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, hwa= ddr addr, CPUState *cs =3D env_cpu(s); =20 /* Multiple TLB Exception */ - cs->exception_index =3D 0x140; + cs->exception_index =3D SH4_EXCP_TLB_MULTIPLE; s->tea =3D addr; break; } @@ -828,33 +828,33 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address,= int size, switch (ret) { case MMU_ITLB_MISS: case MMU_DTLB_MISS_READ: - cs->exception_index =3D 0x040; + cs->exception_index =3D SH4_EXCP_TLB_MISS; break; case MMU_DTLB_MULTIPLE: case MMU_ITLB_MULTIPLE: - cs->exception_index =3D 0x140; + cs->exception_index =3D SH4_EXCP_TLB_MULTIPLE; break; case MMU_ITLB_VIOLATION: - cs->exception_index =3D 0x0a0; + cs->exception_index =3D SH4_EXCP_TLB_VIOLATION; break; case MMU_DTLB_MISS_WRITE: - cs->exception_index =3D 0x060; + cs->exception_index =3D SH4_EXCP_DTLB_MISS_WRITE; break; case MMU_DTLB_INITIAL_WRITE: - cs->exception_index =3D 0x080; + cs->exception_index =3D SH4_EXCP_INITIAL_PAGE_WRITE; break; case MMU_DTLB_VIOLATION_READ: - cs->exception_index =3D 0x0a0; + cs->exception_index =3D SH4_EXCP_TLB_VIOLATION; break; case MMU_DTLB_VIOLATION_WRITE: - cs->exception_index =3D 0x0c0; + cs->exception_index =3D SH4_EXCP_DTLB_VIOLATION_WRITE; break; case MMU_IADDR_ERROR: case MMU_DADDR_ERROR_READ: - cs->exception_index =3D 0x0e0; + cs->exception_index =3D SH4_EXCP_ADDR_ERROR; break; case MMU_DADDR_ERROR_WRITE: - cs->exception_index =3D 0x100; + cs->exception_index =3D SH4_EXCP_DATA_WRITE; break; default: cpu_abort(cs, "Unhandled MMU fault"); diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index 777380f8e40..8beac9ca034 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -33,10 +33,10 @@ void superh_cpu_do_unaligned_access(CPUState *cs, vaddr= addr, switch (access_type) { case MMU_INST_FETCH: case MMU_DATA_LOAD: - cs->exception_index =3D 0x0e0; + cs->exception_index =3D SH4_EXCP_ADDR_ERROR; break; case MMU_DATA_STORE: - cs->exception_index =3D 0x100; + cs->exception_index =3D SH4_EXCP_DATA_WRITE; break; default: g_assert_not_reached(); @@ -67,22 +67,22 @@ void raise_exception(CPUSH4State *env, int index, =20 void helper_raise_illegal_instruction(CPUSH4State *env) { - raise_exception(env, 0x180, 0); + raise_exception(env, SH4_EXCP_ILLEGAL_INSTRUCTION, 0); } =20 void helper_raise_slot_illegal_instruction(CPUSH4State *env) { - raise_exception(env, 0x1a0, 0); + raise_exception(env, SH4_EXCP_SLOT_ILLEGAL_INSTRUCTION, 0); } =20 void helper_raise_fpu_disable(CPUSH4State *env) { - raise_exception(env, 0x800, 0); + raise_exception(env, SH4_EXCP_FPU_DISABLE, 0); } =20 void helper_raise_slot_fpu_disable(CPUSH4State *env) { - raise_exception(env, 0x820, 0); + raise_exception(env, SH4_EXCP_SLOT_FPU_DISABLE, 0); } =20 void helper_sleep(CPUSH4State *env) @@ -97,7 +97,7 @@ void helper_sleep(CPUSH4State *env) void helper_trapa(CPUSH4State *env, uint32_t tra) { env->tra =3D tra << 2; - raise_exception(env, 0x160, 0); + raise_exception(env, SH4_EXCP_TRAPA, 0); } =20 void helper_exclusive(CPUSH4State *env) @@ -255,7 +255,7 @@ static void update_fpscr(CPUSH4State *env, uintptr_t re= taddr) cause =3D (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT; enable =3D (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT; 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Fri, 02 Oct 2026 10:51:44 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 07/27] target/hppa: remove helper_excp Date: Sat, 3 Oct 2026 01:50:15 +0800 Message-ID: <20261002175037.1747-8-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::132d; envelope-from=luoyonggang@gmail.com; helo=mail-dy1-x132d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963720074158500 Content-Type: text/plain; charset="utf-8" Use the common raise_excp helper for translated exceptions and route the remaining C callers through cpu_raise_excp(). Signed-off-by: Yonggang Luo --- target/hppa/helper.h | 2 -- target/hppa/op_helper.c | 10 +--------- target/hppa/sys_helper.c | 5 +++-- target/hppa/translate.c | 2 +- 4 files changed, 5 insertions(+), 14 deletions(-) diff --git a/target/hppa/helper.h b/target/hppa/helper.h index 8369855d78e..5ed39e01e31 100644 --- a/target/hppa/helper.h +++ b/target/hppa/helper.h @@ -1,5 +1,3 @@ -DEF_HELPER_2(excp, noreturn, env, int) - DEF_HELPER_FLAGS_3(stby_b, TCG_CALL_NO_WG, void, env, tl, tl) DEF_HELPER_FLAGS_3(stby_b_parallel, TCG_CALL_NO_WG, void, env, tl, tl) DEF_HELPER_FLAGS_3(stby_e, TCG_CALL_NO_WG, void, env, tl, tl) diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index 76a8d8a0d34..9c560a56d34 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -30,14 +30,6 @@ #include "user/page-protection.h" #endif =20 -G_NORETURN void HELPER(excp)(CPUHPPAState *env, int excp) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D excp; - cpu_loop_exit(cs); -} - G_NORETURN void hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t r= a) { CPUState *cs =3D env_cpu(env); @@ -341,7 +333,7 @@ target_ulong HELPER(probe)(CPUHPPAState *env, target_ul= ong addr, if (excp =3D=3D EXCP_DTLB_MISS) { excp =3D EXCP_NA_DTLB_MISS; } - helper_excp(env, excp); + cpu_raise_excp(env_cpu(env), excp); } return (want & prot) !=3D 0; #endif diff --git a/target/hppa/sys_helper.c b/target/hppa/sys_helper.c index 88109f0181a..1c10d3d85b3 100644 --- a/target/hppa/sys_helper.c +++ b/target/hppa/sys_helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/helper-proto.h" +#include "accel/tcg/cpu-loop.h" #include "qemu/timer.h" #include "system/runstate.h" #include "system/system.h" @@ -51,13 +52,13 @@ void HELPER(write_interval_timer)(CPUHPPAState *env, ta= rget_ulong val) void HELPER(halt)(CPUHPPAState *env) { qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); - helper_excp(env, EXCP_HLT); + cpu_raise_excp(env_cpu(env), EXCP_HLT); } =20 void HELPER(reset)(CPUHPPAState *env) { qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); - helper_excp(env, EXCP_HLT); + cpu_raise_excp(env_cpu(env), EXCP_HLT); } =20 target_ulong HELPER(swap_system_mask)(CPUHPPAState *env, target_ulong nsm) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 41300c0dd73..35766e6ee06 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -726,7 +726,7 @@ static void install_link(DisasContext *ctx, unsigned li= nk, bool with_sr0) =20 static void gen_excp_1(int exception) { - gen_helper_excp(tcg_env, tcg_constant_i32(exception)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(exception)); } =20 static void gen_excp(DisasContext *ctx, int exception) --=20 2.52.0.windows.1 From nobody Sat Oct 24 00:33:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1790963611; cv=none; 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Fri, 02 Oct 2026 10:51:52 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 08/27] target/hppa: remove hppa_dynamic_excp Date: Sat, 3 Oct 2026 01:50:16 +0800 Message-ID: <20261002175037.1747-9-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::f; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x0f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963613410158500 Content-Type: text/plain; charset="utf-8" Use cpu_raise_excp_restore() for FPU exceptions and remove the redundant HPPA wrapper. Signed-off-by: Yonggang Luo --- target/hppa/cpu.h | 1 - target/hppa/fpu_helper.c | 3 ++- target/hppa/op_helper.c | 8 -------- 3 files changed, 2 insertions(+), 10 deletions(-) diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index f453444d7f9..da3cc15fe9a 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -407,6 +407,5 @@ extern const MemoryRegionOps hppa_io_eir_ops; extern const VMStateDescription vmstate_hppa_cpu; void hppa_cpu_alarm_timer(void *); #endif -G_NORETURN void hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t r= a); =20 #endif /* HPPA_CPU_H */ diff --git a/target/hppa/fpu_helper.c b/target/hppa/fpu_helper.c index cdbebcfeb3a..1115b90407d 100644 --- a/target/hppa/fpu_helper.c +++ b/target/hppa/fpu_helper.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" +#include "accel/tcg/cpu-loop.h" #include "fpu/softfloat.h" =20 void HELPER(loaded_fr0)(CPUHPPAState *env) @@ -131,7 +132,7 @@ static void update_fr0_op(CPUHPPAState *env, uintptr_t = ra) env->fr[0] =3D (uint64_t)shadow << 32 | fr1; =20 if (hard_exp & shadow) { - hppa_dynamic_excp(env, EXCP_ASSIST, ra); + cpu_raise_excp_restore(env_cpu(env), EXCP_ASSIST, ra); } } =20 diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index 9c560a56d34..c1728f1fb91 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -30,14 +30,6 @@ #include "user/page-protection.h" #endif =20 -G_NORETURN void hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t r= a) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D excp; - cpu_loop_exit_restore(cs, ra); -} - static void atomic_store_mask32(CPUHPPAState *env, target_ulong addr, uint32_t val, uint32_t mask, uintptr_t ra) { --=20 2.52.0.windows.1 From nobody Sat Oct 24 00:33:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; 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Fri, 02 Oct 2026 10:52:00 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 09/27] target/rx: convert raises to raise_excp Date: Sat, 3 Oct 2026 01:50:17 +0800 Message-ID: <20261002175037.1747-10-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:38::d; envelope-from=luoyonggang@gmail.com; helo=mail-dl2-x0d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963794450158500 Content-Type: text/plain; charset="utf-8" Translate privilege and illegal instructions through the shared exception helpers, and use them for BRK, INT, FPSW, and WAIT paths where applicable. Remove the redundant RX exception helpers. Signed-off-by: Yonggang Luo --- target/rx/helper.h | 4 ---- target/rx/op_helper.c | 39 ++------------------------------------- target/rx/translate.c | 9 ++++++--- 3 files changed, 8 insertions(+), 44 deletions(-) diff --git a/target/rx/helper.h b/target/rx/helper.h index f3897ce7619..c6a85e968d9 100644 --- a/target/rx/helper.h +++ b/target/rx/helper.h @@ -1,8 +1,4 @@ -DEF_HELPER_1(raise_illegal_instruction, noreturn, env) -DEF_HELPER_1(raise_access_fault, noreturn, env) -DEF_HELPER_1(raise_privilege_violation, noreturn, env) DEF_HELPER_1(wait, noreturn, env) -DEF_HELPER_2(trap, noreturn, env, i32) DEF_HELPER_3(fadd, f32, env, f32, f32) DEF_HELPER_3(fsub, f32, env, f32, f32) DEF_HELPER_3(fmul, f32, env, f32, f32) diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c index d4e9ac2f192..ccd20c43a62 100644 --- a/target/rx/op_helper.c +++ b/target/rx/op_helper.c @@ -25,10 +25,6 @@ #include "fpu/softfloat.h" #include "tcg/debug-assert.h" =20 -static inline G_NORETURN -void raise_exception(CPURXState *env, int index, - uintptr_t retaddr); - static void _set_psw(CPURXState *env, uint32_t psw, uint32_t rte) { uint32_t prev_u; @@ -115,7 +111,7 @@ static void update_fpsw(CPURXState *env, float32 ret, u= intptr_t retaddr) enable =3D FIELD_EX32(env->fpsw, FPSW, ENABLE); enable |=3D 1 << 5; /* CE always enabled */ if (cause & enable) { - raise_exception(env, RX_EXCP_ACCESS, retaddr); + cpu_raise_excp_restore(env_cpu(env), RX_EXCP_ACCESS, retaddr); } } } @@ -419,32 +415,6 @@ uint32_t helper_divu(CPURXState *env, uint32_t num, ui= nt32_t den) return ret; } =20 -/* exception */ -static inline G_NORETURN -void raise_exception(CPURXState *env, int index, - uintptr_t retaddr) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D index; - cpu_loop_exit_restore(cs, retaddr); -} - -G_NORETURN void helper_raise_privilege_violation(CPURXState *env) -{ - raise_exception(env, RX_EXCP_PRIVILEGE_VIOLATION, GETPC()); -} - -G_NORETURN void helper_raise_access_fault(CPURXState *env) -{ - raise_exception(env, RX_EXCP_ACCESS, GETPC()); -} - -G_NORETURN void helper_raise_illegal_instruction(CPURXState *env) -{ - raise_exception(env, RX_EXCP_ILLEGAL_INSTRUCTION, GETPC()); -} - G_NORETURN void helper_wait(CPURXState *env) { CPUState *cs =3D env_cpu(env); @@ -452,10 +422,5 @@ G_NORETURN void helper_wait(CPURXState *env) cs->halted =3D 1; env->in_sleep =3D 1; env->psw_i =3D 1; - raise_exception(env, EXCP_HLT, 0); -} - -G_NORETURN void helper_trap(CPURXState *env, uint32_t vec) -{ - raise_exception(env, RX_EXCP_TRAP_BASE + vec, 0); + cpu_raise_excp(env_cpu(env), EXCP_HLT); } diff --git a/target/rx/translate.c b/target/rx/translate.c index 1bacc7adf92..e6541ad0ab8 100644 --- a/target/rx/translate.c +++ b/target/rx/translate.c @@ -245,7 +245,8 @@ static int is_privileged(DisasContext *ctx, int is_exce= ption) { if (FIELD_EX32(ctx->tb_flags, PSW, PM)) { if (is_exception) { - gen_helper_raise_privilege_violation(tcg_env); + gen_helper_raise_excp_restore( + tcg_env, tcg_constant_i32(RX_EXCP_PRIVILEGE_VIOLATION)); } return 0; } else { @@ -2173,7 +2174,8 @@ static bool trans_RTE(DisasContext *ctx, arg_RTE *a) static bool do_trap(DisasContext *ctx, uint8_t vec) { tcg_gen_movi_i32(cpu_pc, ctx->base.pc_next); - gen_helper_trap(tcg_env, tcg_constant_i32(vec)); + gen_helper_raise_excp( + tcg_env, tcg_constant_i32(RX_EXCP_TRAP_BASE + vec)); ctx->base.is_jmp =3D DISAS_NORETURN; return true; } @@ -2227,7 +2229,8 @@ static void rx_tr_translate_insn(DisasContextBase *dc= base, CPUState *cs) ctx->pc =3D ctx->base.pc_next; insn =3D decode_load(ctx); if (!decode(ctx, insn)) { - gen_helper_raise_illegal_instruction(tcg_env); + gen_helper_raise_excp_restore( + tcg_env, tcg_constant_i32(RX_EXCP_ILLEGAL_INSTRUCTION)); } } =20 --=20 2.52.0.windows.1 From nobody Sat Oct 24 00:33:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1790963717; cv=none; d=zohomail.com; s=zohoarc; b=Cq5PVYNoouciB4gshfgnjS2aGh50sXZxwLx4FuCDHGU69kGk67ukM2FzXVIyZTNc7iG/bgYPtu7R6mBZNKVw8fPvByF3926x6RbLXAvEERN3Rp+ZqEJDEan/jh4Gsq877HPx1p0EwECG21HSLhhQ8KNsXnpjxEamBKlq82ptmJ8= ARC-Message-Signature: i=1; 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Fri, 02 Oct 2026 10:52:07 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 10/27] target/sh4: log all exception vector names Date: Sat, 3 Oct 2026 01:50:18 +0800 Message-ID: <20261002175037.1747-11-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::d; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x0d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963718023158500 Content-Type: text/plain; charset="utf-8" Add names for reset, manual reset, TLB multiple, and user break exceptions in the SH4 interrupt log. Signed-off-by: Yonggang Luo --- target/sh4/helper.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/target/sh4/helper.c b/target/sh4/helper.c index 0fbd613f333..68f495b5ede 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -97,12 +97,21 @@ void superh_cpu_do_interrupt(CPUState *cs) if (qemu_loglevel_mask(CPU_LOG_INT)) { const char *expname; switch (cs->exception_index) { + case SH4_EXCP_RESET: + expname =3D "reset"; + break; + case SH4_EXCP_MANUAL_RESET: + expname =3D "manual_reset"; + break; case SH4_EXCP_ADDR_ERROR: expname =3D "addr_error"; break; case SH4_EXCP_TLB_MISS: expname =3D "tlb_miss"; break; + case SH4_EXCP_TLB_MULTIPLE: + expname =3D "tlb_multiple"; + break; case SH4_EXCP_TLB_VIOLATION: expname =3D "tlb_violation"; break; @@ -136,6 +145,9 @@ void superh_cpu_do_interrupt(CPUState *cs) case SH4_EXCP_TRAPA: expname =3D "trapa"; break; + case SH4_EXCP_USER_BREAK: + expname =3D "user_break"; + break; default: expname =3D do_irq ? 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Fri, 02 Oct 2026 10:52:15 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 11/27] target/sh4: convert raises to raise_excp Date: Sat, 3 Oct 2026 01:50:19 +0800 Message-ID: <20261002175037.1747-12-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::d; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x0d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790964342253158501 Content-Type: text/plain; charset="utf-8" Translate illegal and FPU-disable exceptions through raise_excp and route the remaining C exception paths through cpu_raise_excp helpers. Remove the redundant SH4 exception helpers. Signed-off-by: Yonggang Luo --- target/sh4/helper.h | 4 ---- target/sh4/op_helper.c | 36 +++--------------------------------- target/sh4/translate.c | 12 ++++++++---- 3 files changed, 11 insertions(+), 41 deletions(-) diff --git a/target/sh4/helper.h b/target/sh4/helper.h index 29011d3dbbb..593b20c0af2 100644 --- a/target/sh4/helper.h +++ b/target/sh4/helper.h @@ -1,8 +1,4 @@ DEF_HELPER_1(ldtlb, void, env) -DEF_HELPER_1(raise_illegal_instruction, noreturn, env) -DEF_HELPER_1(raise_slot_illegal_instruction, noreturn, env) -DEF_HELPER_1(raise_fpu_disable, noreturn, env) -DEF_HELPER_1(raise_slot_fpu_disable, noreturn, env) DEF_HELPER_1(sleep, noreturn, env) DEF_HELPER_2(trapa, noreturn, env, i32) DEF_HELPER_1(exclusive, noreturn, env) diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index 8beac9ca034..f38d247c1a2 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -55,49 +55,19 @@ void helper_ldtlb(CPUSH4State *env) #endif } =20 -static inline G_NORETURN -void raise_exception(CPUSH4State *env, int index, - uintptr_t retaddr) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D index; - cpu_loop_exit_restore(cs, retaddr); -} - -void helper_raise_illegal_instruction(CPUSH4State *env) -{ - raise_exception(env, SH4_EXCP_ILLEGAL_INSTRUCTION, 0); -} - -void helper_raise_slot_illegal_instruction(CPUSH4State *env) -{ - raise_exception(env, SH4_EXCP_SLOT_ILLEGAL_INSTRUCTION, 0); -} - -void helper_raise_fpu_disable(CPUSH4State *env) -{ - raise_exception(env, SH4_EXCP_FPU_DISABLE, 0); -} - -void helper_raise_slot_fpu_disable(CPUSH4State *env) -{ - raise_exception(env, SH4_EXCP_SLOT_FPU_DISABLE, 0); -} - void helper_sleep(CPUSH4State *env) { CPUState *cs =3D env_cpu(env); =20 cs->halted =3D 1; env->in_sleep =3D 1; - raise_exception(env, EXCP_HLT, 0); + cpu_raise_excp(cs, EXCP_HLT); } =20 void helper_trapa(CPUSH4State *env, uint32_t tra) { env->tra =3D tra << 2; - raise_exception(env, SH4_EXCP_TRAPA, 0); + cpu_raise_excp(env_cpu(env), SH4_EXCP_TRAPA); } =20 void helper_exclusive(CPUSH4State *env) @@ -255,7 +225,7 @@ static void update_fpscr(CPUSH4State *env, uintptr_t re= taddr) cause =3D (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT; enable =3D (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT; if (cause & enable) { - raise_exception(env, SH4_EXCP_FPU, retaddr); + cpu_raise_excp_restore(env_cpu(env), SH4_EXCP_FPU, retaddr); } } } diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 5729a757f19..590b62ba3c1 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -1756,10 +1756,13 @@ static void _decode_opc(DisasContext * ctx) if (ctx->envflags & TB_FLAG_DELAY_SLOT_MASK) { do_illegal_slot: gen_save_cpu_state(ctx, true); - gen_helper_raise_slot_illegal_instruction(tcg_env); + gen_helper_raise_excp(tcg_env, + tcg_constant_i32( + SH4_EXCP_SLOT_ILLEGAL_INSTRUCTION)); } else { gen_save_cpu_state(ctx, true); - gen_helper_raise_illegal_instruction(tcg_env); + gen_helper_raise_excp(tcg_env, + tcg_constant_i32(SH4_EXCP_ILLEGAL_INSTRUCTIO= N)); } ctx->base.is_jmp =3D DISAS_NORETURN; return; @@ -1767,9 +1770,10 @@ static void _decode_opc(DisasContext * ctx) do_fpu_disabled: gen_save_cpu_state(ctx, true); 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Fri, 02 Oct 2026 10:52:22 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 12/27] target/s390x: convert exception to raise_excp Date: Sat, 3 Oct 2026 01:50:20 +0800 Message-ID: <20261002175037.1747-13-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::15; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x15.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963846779158500 Content-Type: text/plain; charset="utf-8" Drop the redundant S390x exception helper and use the current cpu_raise_excp() API for SVC execution. Translate exceptions through the shared raise_excp helper. Signed-off-by: Yonggang Luo Reviewed-by: Ilya Leoshkevich --- target/s390x/helper.h | 1 - target/s390x/tcg/mem_helper.c | 2 +- target/s390x/tcg/misc_helper.c | 10 ---------- target/s390x/tcg/translate.c | 2 +- 4 files changed, 2 insertions(+), 13 deletions(-) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 6a7426fdac7..ec27ef104f2 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -1,4 +1,3 @@ -DEF_HELPER_2(exception, noreturn, env, i32) DEF_HELPER_2(data_exception, noreturn, env, i32) DEF_HELPER_FLAGS_4(nc, TCG_CALL_NO_WG, i32, env, i32, i64, i64) DEF_HELPER_FLAGS_4(oc, TCG_CALL_NO_WG, i32, env, i32, i64, i64) diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index 414e6838c87..ca94960354a 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -2488,7 +2488,7 @@ void HELPER(ex)(CPUS390XState *env, uint32_t ilen, ui= nt64_t r1, uint64_t addr) } else if (opc =3D=3D 0x0a) { env->int_svc_code =3D extract64(insn, 48, 8); env->int_svc_ilen =3D ilen; - helper_exception(env, EXCP_SVC); + cpu_raise_excp(env_cpu(env), EXCP_SVC); g_assert_not_reached(); } =20 diff --git a/target/s390x/tcg/misc_helper.c b/target/s390x/tcg/misc_helper.c index f1c8563af00..f5e31419268 100644 --- a/target/s390x/tcg/misc_helper.c +++ b/target/s390x/tcg/misc_helper.c @@ -56,16 +56,6 @@ #define HELPER_LOG(x...) #endif =20 -/* Raise an exception statically from a TB. */ -void HELPER(exception)(CPUS390XState *env, uint32_t excp) -{ - CPUState *cs =3D env_cpu(env); - - HELPER_LOG("%s: exception %d\n", __func__, excp); - cs->exception_index =3D excp; - cpu_loop_exit(cs); -} - /* Store CPU Timer (also used for EXTRACT CPU TIME) */ uint64_t HELPER(stpt)(CPUS390XState *env) { diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 474d604ed17..d2bf1422b1f 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -400,7 +400,7 @@ static int get_mem_index(DisasContext *s) =20 static void gen_exception(int excp) { - gen_helper_exception(tcg_env, tcg_constant_i32(excp)); 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Fri, 02 Oct 2026 10:52:30 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 13/27] target/m68k: convert raises to raise_excp Date: Sat, 3 Oct 2026 01:50:21 +0800 Message-ID: <20261002175037.1747-14-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::e; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963738232158500 Content-Type: text/plain; charset="utf-8" Translate pure exceptions through the shared raise_excp helper and use cpu_raise_excp() for no-restore C paths. Keep the format2 exception helper because it performs additional guest-state work. Signed-off-by: Yonggang Luo --- target/m68k/helper.c | 12 ++---------- target/m68k/helper.h | 1 - target/m68k/op_helper.c | 19 ------------------- target/m68k/translate.c | 2 +- 4 files changed, 3 insertions(+), 31 deletions(-) diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 5f91d206f59..22f6cde02d3 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -162,14 +162,6 @@ void HELPER(cf_movec_to)(CPUM68KState *env, uint32_t r= eg, uint32_t val) } } =20 -static void raise_exception_ra(CPUM68KState *env, int tt, uintptr_t raddr) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D tt; - cpu_loop_exit_restore(cs, raddr); -} - void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val) { switch (reg) { @@ -291,7 +283,7 @@ void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t = reg, uint32_t val) } =20 /* Invalid control registers will generate an exception. */ - raise_exception_ra(env, EXCP_ILLEGAL, 0); + cpu_raise_excp(env_cpu(env), EXCP_ILLEGAL); } =20 uint32_t HELPER(m68k_movec_from)(CPUM68KState *env, uint32_t reg) @@ -394,7 +386,7 @@ uint32_t HELPER(m68k_movec_from)(CPUM68KState *env, uin= t32_t reg) } =20 /* Invalid control registers will generate an exception. */ - raise_exception_ra(env, EXCP_ILLEGAL, 0); + cpu_raise_excp(env_cpu(env), EXCP_ILLEGAL); =20 return 0; } diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 0bda8f8152d..a6ca811ebe2 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -111,7 +111,6 @@ DEF_HELPER_3(set_mac_extu, void, env, i32, i32) DEF_HELPER_2(flush_flags, void, env, i32) DEF_HELPER_2(set_ccr, void, env, i32) DEF_HELPER_FLAGS_1(get_ccr, TCG_CALL_NO_WG_SE, i32, env) -DEF_HELPER_2(raise_exception, noreturn, env, i32) =20 DEF_HELPER_FLAGS_3(bfffo_reg, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32) =20 diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 38f7a689814..5f539f8fd75 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -539,25 +539,6 @@ bool m68k_cpu_exec_interrupt(CPUState *cs, int interru= pt_request) =20 #endif /* !CONFIG_USER_ONLY */ =20 -G_NORETURN static void -raise_exception_ra(CPUM68KState *env, int tt, uintptr_t raddr) -{ - CPUState *cs =3D env_cpu(env); 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Fri, 02 Oct 2026 10:52:37 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 14/27] target/or1k: convert exception to raise_excp Date: Sat, 3 Oct 2026 01:50:22 +0800 Message-ID: <20261002175037.1747-15-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::d; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x0d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963915340158500 Content-Type: text/plain; charset="utf-8" Use the shared raise_excp helper for translated exceptions. Use cpu_raise_excp_restore() for overflow helpers with GETPC() and cpu_raise_excp() for the zero-PC C wrapper. Signed-off-by: Yonggang Luo --- target/or1k/exception.c | 31 ------------------------------- target/or1k/exception.h | 7 ++++++- target/or1k/exception_helper.c | 13 +------------ target/or1k/helper.h | 1 - target/or1k/meson.build | 1 - target/or1k/translate.c | 2 +- 6 files changed, 8 insertions(+), 47 deletions(-) delete mode 100644 target/or1k/exception.c diff --git a/target/or1k/exception.c b/target/or1k/exception.c deleted file mode 100644 index 0479a069592..00000000000 --- a/target/or1k/exception.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * OpenRISC exception. - * - * Copyright (c) 2011-2012 Jia Liu - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see . - */ - -#include "qemu/osdep.h" -#include "accel/tcg/cpu-loop.h" -#include "cpu.h" -#include "exception.h" - -G_NORETURN void raise_exception(OpenRISCCPU *cpu, uint32_t excp) -{ - CPUState *cs =3D CPU(cpu); - - cs->exception_index =3D excp; - cpu_loop_exit(cs); -} diff --git a/target/or1k/exception.h b/target/or1k/exception.h index f62fc314c1f..a206816d4d7 100644 --- a/target/or1k/exception.h +++ b/target/or1k/exception.h @@ -21,7 +21,12 @@ #define TARGET_OPENRISC_EXCEPTION_H =20 #include "cpu.h" +#include "accel/tcg/cpu-loop.h" =20 -G_NORETURN void raise_exception(OpenRISCCPU *cpu, uint32_t excp); +static inline G_NORETURN +void raise_exception(OpenRISCCPU *cpu, uint32_t excp) +{ + cpu_raise_excp(CPU(cpu), excp); +} =20 #endif /* TARGET_OPENRISC_EXCEPTION_H */ diff --git a/target/or1k/exception_helper.c b/target/or1k/exception_helper.c index 3bd82b29719..113012439c8 100644 --- a/target/or1k/exception_helper.c +++ b/target/or1k/exception_helper.c @@ -21,22 +21,11 @@ #include "cpu.h" #include "accel/tcg/cpu-loop.h" #include "exec/helper-proto.h" -#include "exception.h" - -void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp) -{ - OpenRISCCPU *cpu =3D env_archcpu(env); - - raise_exception(cpu, excp); -} =20 static G_NORETURN void do_range(CPUOpenRISCState *env, uintptr_t pc) { - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D EXCP_RANGE; - cpu_loop_exit_restore(cs, pc); + cpu_raise_excp_restore(env_cpu(env), EXCP_RANGE, pc); } =20 void HELPER(ove_cy)(CPUOpenRISCState *env) diff --git a/target/or1k/helper.h b/target/or1k/helper.h index e0a8d402271..d6e6bd4ffbc 100644 --- a/target/or1k/helper.h +++ b/target/or1k/helper.h @@ -18,7 +18,6 @@ */ =20 /* exception */ -DEF_HELPER_FLAGS_2(exception, TCG_CALL_NO_WG, void, env, i32) DEF_HELPER_FLAGS_1(ove_cy, TCG_CALL_NO_WG, void, env) DEF_HELPER_FLAGS_1(ove_ov, TCG_CALL_NO_WG, void, env) DEF_HELPER_FLAGS_1(ove_cyov, TCG_CALL_NO_WG, void, env) diff --git a/target/or1k/meson.build b/target/or1k/meson.build index 7cea45287a2..dba5044b655 100644 --- a/target/or1k/meson.build +++ b/target/or1k/meson.build @@ -5,7 +5,6 @@ or1k_ss.add(gen) or1k_ss.add(files( 'cpu.c', 'disas.c', - 'exception.c', 'exception_helper.c', 'fpu_helper.c', 'interrupt_helper.c', diff --git a/target/or1k/translate.c b/target/or1k/translate.c index e00ef45b9b7..243a8eede23 100644 --- a/target/or1k/translate.c +++ b/target/or1k/translate.c @@ -140,7 +140,7 @@ void openrisc_translate_init(void) =20 static void gen_exception(DisasContext *dc, unsigned int excp) { - gen_helper_exception(tcg_env, tcg_constant_i32(excp)); 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Fri, 02 Oct 2026 10:52:45 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 15/27] target/microblaze: convert raise_exception to raise_excp Date: Sat, 3 Oct 2026 01:50:23 +0800 Message-ID: <20261002175037.1747-16-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::e; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963927154158500 Content-Type: text/plain; charset="utf-8" Use the shared raise_excp helper for translated exceptions. Use cpu_raise_excp_restore() for GETPC() paths and preserve explicit cpu_loop_exit_restore() for MMU callbacks with possibly-zero retaddr. Signed-off-by: Yonggang Luo --- target/microblaze/helper.h | 2 -- target/microblaze/op_helper.c | 19 +++---------------- target/microblaze/translate.c | 2 +- 3 files changed, 4 insertions(+), 19 deletions(-) diff --git a/target/microblaze/helper.h b/target/microblaze/helper.h index 1429c1727ef..ad9c22ed5b7 100644 --- a/target/microblaze/helper.h +++ b/target/microblaze/helper.h @@ -1,5 +1,3 @@ -DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32) - DEF_HELPER_FLAGS_3(divs, TCG_CALL_NO_WG, i32, env, i32, i32) DEF_HELPER_FLAGS_3(divu, TCG_CALL_NO_WG, i32, env, i32, i32) =20 diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c index 3da0c68da39..9010c838d90 100644 --- a/target/microblaze/op_helper.c +++ b/target/microblaze/op_helper.c @@ -62,25 +62,14 @@ uint32_t helper_get(uint32_t id, uint32_t ctrl) return 0xdead0000 | id; } =20 -void helper_raise_exception(CPUMBState *env, uint32_t index) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D index; - cpu_loop_exit(cs); -} - /* Raises ESR_EC_DIVZERO if exceptions are enabled. */ static void raise_divzero(CPUMBState *env, uint32_t esr, uintptr_t unwind_= pc) { env->msr |=3D MSR_DZ; =20 if ((env->msr & MSR_EE) && env_archcpu(env)->cfg.div_zero_exception) { - CPUState *cs =3D env_cpu(env); - env->esr =3D esr; - cs->exception_index =3D EXCP_HW_EXCP; - cpu_loop_exit_restore(cs, unwind_pc); + cpu_raise_excp_restore(env_cpu(env), EXCP_HW_EXCP, unwind_pc); } } =20 @@ -123,8 +112,7 @@ static void raise_fpu_exception(CPUMBState *env, uintpt= r_t ra) CPUState *cs =3D env_cpu(env); =20 env->esr =3D ESR_EC_FPU; - cs->exception_index =3D EXCP_HW_EXCP; - cpu_loop_exit_restore(cs, ra); + cpu_raise_excp_restore(cs, EXCP_HW_EXCP, ra); } =20 static void update_fpu_flags(CPUMBState *env, int flags, uintptr_t ra) @@ -390,8 +378,7 @@ void helper_stackprot(CPUMBState *env, uint32_t addr) =20 env->ear =3D addr; env->esr =3D ESR_EC_STACKPROT; - cs->exception_index =3D EXCP_HW_EXCP; - cpu_loop_exit_restore(cs, GETPC()); + cpu_raise_excp_restore(cs, EXCP_HW_EXCP, GETPC()); } } =20 diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 8b219afb5dd..9424208a04b 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -100,7 +100,7 @@ static void t_sync_flags(DisasContext *dc) =20 static void gen_raise_exception(DisasContext *dc, uint32_t index) { - gen_helper_raise_exception(tcg_env, tcg_constant_i32(index)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(index)); dc->base.is_jmp =3D DISAS_NORETURN; } =20 --=20 2.52.0.windows.1 From nobody Sat Oct 24 00:33:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1790963919; cv=none; d=zohomail.com; s=zohoarc; b=WdENVRSxbR4+eP5PdkXoEzXbYRuqSOj2dbEJ1v/cUcAobwb3d5Wwc6kQP1RjhDTOHgFWuZcB3qsd7s9emekJyv+V6jbySiOmkjYRO0Fg4SfKnKF/w7qJq0nX8FXjUxg8NFe5gw/HHMO9FNL1UchoAu2t00UPmk0uALWpAkIHB2g= ARC-Message-Signature: i=1; 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Fri, 02 Oct 2026 10:52:53 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 16/27] target/sparc: convert raise_exception to raise_excp Date: Sat, 3 Oct 2026 01:50:24 +0800 Message-ID: <20261002175037.1747-17-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::e; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963921097158500 Content-Type: text/plain; charset="utf-8" Use the shared raise_excp helper for translated exceptions and adapt SPARC C exits to cpu_raise_excp() or cpu_raise_excp_restore() according to the return-address contract. Keep cpu_raise_exception_ra(). Signed-off-by: Yonggang Luo --- target/sparc/helper.c | 21 +++------------------ target/sparc/helper.h | 2 -- target/sparc/translate.c | 6 +++--- 3 files changed, 6 insertions(+), 23 deletions(-) diff --git a/target/sparc/helper.c b/target/sparc/helper.c index 8de261b0e30..dea908a8f7f 100644 --- a/target/sparc/helper.c +++ b/target/sparc/helper.c @@ -27,26 +27,12 @@ =20 void cpu_raise_exception_ra(CPUSPARCState *env, int tt, uintptr_t ra) { - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D tt; - cpu_loop_exit_restore(cs, ra); -} - -void helper_raise_exception(CPUSPARCState *env, int tt) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D tt; - cpu_loop_exit(cs); + cpu_raise_excp_restore(env_cpu(env), tt, ra); } =20 void helper_debug(CPUSPARCState *env) { - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D EXCP_DEBUG; - cpu_loop_exit(cs); + cpu_raise_excp(env_cpu(env), EXCP_DEBUG); } =20 #ifdef TARGET_SPARC64 @@ -208,10 +194,9 @@ void helper_power_down(CPUSPARCState *env) CPUState *cs =3D env_cpu(env); =20 cs->halted =3D 1; - cs->exception_index =3D EXCP_HLT; env->pc =3D env->npc; env->npc =3D env->pc + 4; - cpu_loop_exit(cs); + cpu_raise_excp(cs, EXCP_HLT); } =20 target_ulong helper_rdasr17(CPUSPARCState *env) diff --git a/target/sparc/helper.h b/target/sparc/helper.h index 3a7f7dc1296..9fc38f5706a 100644 --- a/target/sparc/helper.h +++ b/target/sparc/helper.h @@ -53,8 +53,6 @@ DEF_HELPER_FLAGS_3(fcmpq, TCG_CALL_NO_WG, i32, env, i128,= i128) DEF_HELPER_FLAGS_3(fcmpeq, TCG_CALL_NO_WG, i32, env, i128, i128) DEF_HELPER_FLAGS_3(flcmps, TCG_CALL_NO_RWG_SE, i32, env, f32, f32) DEF_HELPER_FLAGS_3(flcmpd, TCG_CALL_NO_RWG_SE, i32, env, f64, f64) -DEF_HELPER_2(raise_exception, noreturn, env, int) - DEF_HELPER_FLAGS_3(faddd, TCG_CALL_NO_WG, f64, env, f64, f64) DEF_HELPER_FLAGS_3(fsubd, TCG_CALL_NO_WG, f64, env, f64, f64) DEF_HELPER_FLAGS_3(fmuld, TCG_CALL_NO_WG, f64, env, f64, f64) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 3156be6a94c..6dae5da7157 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -1048,7 +1048,7 @@ static void gen_exception(DisasContext *dc, int which) { finishing_insn(dc); save_state(dc); - gen_helper_raise_exception(tcg_env, tcg_constant_i32(which)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(which)); dc->base.is_jmp =3D DISAS_NORETURN; } =20 @@ -2811,7 +2811,7 @@ static bool do_tcc(DisasContext *dc, int cond, int cc, /* Trap always. */ if (cond =3D=3D 8) { save_state(dc); - gen_helper_raise_exception(tcg_env, trap); + gen_helper_raise_excp(tcg_env, trap); dc->base.is_jmp =3D DISAS_NORETURN; return true; } @@ -5833,7 +5833,7 @@ static void sparc_tr_tb_stop(DisasContextBase *dcbase= , CPUState *cs) if (e->npc % 4 =3D=3D 0) { tcg_gen_movi_tl(cpu_npc, e->npc); } - gen_helper_raise_exception(tcg_env, e->excp); + gen_helper_raise_excp(tcg_env, e->excp); =20 e_next =3D e->next; g_free(e); --=20 2.52.0.windows.1 From nobody Sat Oct 24 00:33:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 02 Oct 2026 10:53:00 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 17/27] target/loongarch: convert raise_exception to raise_excp Date: Sat, 3 Oct 2026 01:50:25 +0800 Message-ID: <20261002175037.1747-18-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1335; envelope-from=luoyonggang@gmail.com; helo=mail-dy1-x1335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790964183027158500 Content-Type: text/plain; charset="utf-8" Inline do_raise_exception as it's used by other arch. Use the shared raise_excp_restore helper for translated exceptions and adapt the logging C exception path to cpu_raise_excp() or cpu_raise_excp_restore() according to the return-address contract. Signed-off-by: Yonggang Luo --- target/loongarch/internals.h | 12 +++++++++--- target/loongarch/tcg/helper.h | 2 -- target/loongarch/tcg/op_helper.c | 6 ------ target/loongarch/tcg/tcg_cpu.c | 10 ++++------ target/loongarch/tcg/translate.c | 2 +- 5 files changed, 14 insertions(+), 18 deletions(-) diff --git a/target/loongarch/internals.h b/target/loongarch/internals.h index ff956823fd7..885d516fe52 100644 --- a/target/loongarch/internals.h +++ b/target/loongarch/internals.h @@ -19,9 +19,15 @@ void loongarch_translate_init(void); void loongarch_translate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, vaddr pc, void *host_pc); =20 -void G_NORETURN do_raise_exception(CPULoongArchState *env, - uint32_t exception, - uintptr_t pc); +void G_NORETURN loongarch_do_raise_exception(CPULoongArchState *env, + uint32_t exception, + uintptr_t pc); +static inline void G_NORETURN do_raise_exception(CPULoongArchState *env, + uint32_t exception, + uintptr_t pc) +{ + loongarch_do_raise_exception(env, exception, pc); +} =20 #ifdef CONFIG_TCG int ieee_ex_to_loongarch(int xcpt); diff --git a/target/loongarch/tcg/helper.h b/target/loongarch/tcg/helper.h index e76c73c7755..e3a7bc9e9da 100644 --- a/target/loongarch/tcg/helper.h +++ b/target/loongarch/tcg/helper.h @@ -3,8 +3,6 @@ * Copyright (c) 2021 Loongson Technology Corporation Limited */ =20 -DEF_HELPER_2(raise_exception, noreturn, env, i32) - DEF_HELPER_FLAGS_3(asrtle_d, TCG_CALL_NO_WG, void, env, tl, tl) DEF_HELPER_FLAGS_3(asrtgt_d, TCG_CALL_NO_WG, void, env, tl, tl) =20 diff --git a/target/loongarch/tcg/op_helper.c b/target/loongarch/tcg/op_hel= per.c index f98fe4d4a16..109417b7503 100644 --- a/target/loongarch/tcg/op_helper.c +++ b/target/loongarch/tcg/op_helper.c @@ -16,12 +16,6 @@ #include /* for crc32 */ #include "cpu-csr.h" =20 -/* Exceptions helpers */ -void helper_raise_exception(CPULoongArchState *env, uint32_t exception) -{ - do_raise_exception(env, exception, GETPC()); -} - /* loongarch assert op */ void helper_asrtle_d(CPULoongArchState *env, target_ulong rj, target_ulong= rk) { diff --git a/target/loongarch/tcg/tcg_cpu.c b/target/loongarch/tcg/tcg_cpu.c index 4b1d44a1644..0a1115721c0 100644 --- a/target/loongarch/tcg/tcg_cpu.c +++ b/target/loongarch/tcg/tcg_cpu.c @@ -59,9 +59,9 @@ static const char *loongarch_exception_name(int32_t excep= tion) return "Unknown"; } =20 -void G_NORETURN do_raise_exception(CPULoongArchState *env, - uint32_t exception, - uintptr_t pc) +void G_NORETURN loongarch_do_raise_exception(CPULoongArchState *env, + uint32_t exception, + uintptr_t pc) { CPUState *cs =3D env_cpu(env); =20 @@ -69,9 +69,7 @@ void G_NORETURN do_raise_exception(CPULoongArchState *env, __func__, exception, loongarch_exception_name(exception)); - cs->exception_index =3D exception; - - cpu_loop_exit_restore(cs, pc); + cpu_raise_excp_restore(cs, exception, pc); } =20 #ifndef CONFIG_USER_ONLY diff --git a/target/loongarch/tcg/translate.c b/target/loongarch/tcg/transl= ate.c index 124dce62695..b7e8ce8a653 100644 --- a/target/loongarch/tcg/translate.c +++ b/target/loongarch/tcg/translate.c @@ -95,7 +95,7 @@ static void gen_nanbox_s(TCGv_i64 out, TCGv_i64 in) void generate_exception(DisasContext *ctx, int excp) { tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); - gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp)); + gen_helper_raise_excp_restore(tcg_env, tcg_constant_i32(excp)); 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Fri, 02 Oct 2026 10:53:08 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 18/27] target/hexagon: reuse cpu_raise_excp_restore Date: Sat, 3 Oct 2026 01:50:26 +0800 Message-ID: <20261002175037.1747-19-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:38::2b; envelope-from=luoyonggang@gmail.com; helo=mail-dl2-x2b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963921055158500 Content-Type: text/plain; charset="utf-8" Inline do_raise_exception as it's used by other arch. Signed-off-by: Yonggang Luo --- target/hexagon/internal.h | 10 +++++++++- target/hexagon/op_helper.c | 5 ++--- 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/target/hexagon/internal.h b/target/hexagon/internal.h index 05d1129916e..981ff7c4607 100644 --- a/target/hexagon/internal.h +++ b/target/hexagon/internal.h @@ -36,11 +36,19 @@ extern const char * const hexagon_sregnames[]; extern const char * const hexagon_gregnames[]; #endif =20 -void G_NORETURN do_raise_exception(CPUHexagonState *env, +void G_NORETURN hexagon_do_raise_exception(CPUHexagonState *env, uint32_t exception, uint32_t PC, uintptr_t retaddr); =20 +static inline void G_NORETURN do_raise_exception(CPUHexagonState *env, + uint32_t exception, + uint32_t PC, + uintptr_t retaddr) +{ + hexagon_do_raise_exception(env, exception, PC, retaddr); +} + #define hexagon_cpu_mmu_enabled(env) ({ \ HexagonCPU *cpu =3D env_archcpu(env); \ cpu->globalregs ? \ diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c index 4f00ca773f3..1536e81d4b8 100644 --- a/target/hexagon/op_helper.c +++ b/target/hexagon/op_helper.c @@ -73,7 +73,7 @@ uint64_t HELPER(utimer)(void) =20 /* Exceptions processing helpers */ G_NORETURN -void do_raise_exception(CPUHexagonState *env, uint32_t exception, +void hexagon_do_raise_exception(CPUHexagonState *env, uint32_t exception, uint32_t PC, uintptr_t retaddr) { CPUState *cs =3D env_cpu(env); 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Fri, 02 Oct 2026 10:53:15 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 19/27] target/xtensa: reset yield state in the icount path Date: Sat, 3 Oct 2026 01:50:27 +0800 Message-ID: <20261002175037.1747-20-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::e; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790964076253158500 Content-Type: text/plain; charset="utf-8" Emit the yield_needed reset from gen_yield() before calling gen_helper_exception() for EXCP_YIELD. This keeps the state change at the Xtensa icount-yield call site instead of adding EXCP_YIELD-specific behavior to the generic exception helper. Signed-off-by: Yonggang Luo --- target/xtensa/cpu.h | 2 +- target/xtensa/exc_helper.c | 3 --- target/xtensa/translate.c | 8 +++++--- 3 files changed, 6 insertions(+), 7 deletions(-) diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 49d6ad9083d..cab2df43709 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -541,7 +541,7 @@ struct CPUArchState { uint32_t ccount_base; #endif =20 - int yield_needed; + int32_t yield_needed; unsigned static_vectors; =20 /* Watchpoints for DBREAK registers */ diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c index 7cb67d179a8..793761a698f 100644 --- a/target/xtensa/exc_helper.c +++ b/target/xtensa/exc_helper.c @@ -40,9 +40,6 @@ void HELPER(exception)(CPUXtensaState *env, uint32_t excp) CPUState *cs =3D env_cpu(env); =20 cs->exception_index =3D excp; - if (excp =3D=3D EXCP_YIELD) { - env->yield_needed =3D 0; - } cpu_loop_exit(cs); } =20 diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 175fd4b5cfc..db48f0c562a 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -303,9 +303,11 @@ static void gen_left_shift_sar(DisasContext *dc, TCGv_= i32 sa) dc->sar_m32_5bit =3D true; } =20 -static void gen_exception(DisasContext *dc, int excp) +static void gen_yield(DisasContext *dc) { - gen_helper_exception(tcg_env, tcg_constant_i32(excp)); + tcg_gen_st_i32(tcg_constant_i32(0), tcg_env, + offsetof(CPUXtensaState, yield_needed)); + gen_helper_exception(tcg_env, tcg_constant_i32(EXCP_YIELD)); } =20 static void gen_exception_cause(DisasContext *dc, uint32_t cause) @@ -1167,7 +1169,7 @@ static void xtensa_tr_translate_insn(DisasContextBase= *dcbase, CPUState *cpu) but this is the first TranslateOps hook that allows exiting. */ if ((tb_cflags(dc->base.tb) & CF_USE_ICOUNT) && (dc->base.tb->flags & XTENSA_TBFLAG_YIELD)) { - gen_exception(dc, EXCP_YIELD); + gen_yield(dc); dc->base.pc_next =3D dc->pc + 1; dc->base.is_jmp =3D DISAS_NORETURN; return; --=20 2.52.0.windows.1 From nobody Sat Oct 24 00:33:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 02 Oct 2026 10:53:23 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 20/27] target/xtensa: convert exception to raise_excp Date: Sat, 3 Oct 2026 01:50:28 +0800 Message-ID: <20261002175037.1747-21-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::132c; envelope-from=luoyonggang@gmail.com; helo=mail-dy1-x132c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790964084286158500 Content-Type: text/plain; charset="utf-8" Replace the forwarding wrapper with direct cpu_raise_excp() calls in Xtensa C helpers. Use gen_helper_raise_excp() for translated EXCP_YIELD, while preserving exception_cause helpers for architectural state updates. Signed-off-by: Yonggang Luo --- target/xtensa/exc_helper.c | 14 +++----------- target/xtensa/helper.h | 1 - target/xtensa/translate.c | 2 +- target/xtensa/win_helper.c | 13 +++++++------ 4 files changed, 11 insertions(+), 19 deletions(-) diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c index 793761a698f..d49cc5558ad 100644 --- a/target/xtensa/exc_helper.c +++ b/target/xtensa/exc_helper.c @@ -35,14 +35,6 @@ #include "qemu/atomic.h" #include "qemu/plugin.h" =20 -void HELPER(exception)(CPUXtensaState *env, uint32_t excp) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D excp; - cpu_loop_exit(cs); -} - void HELPER(exception_cause)(CPUXtensaState *env, uint32_t pc, uint32_t ca= use) { uint32_t vector; @@ -63,7 +55,7 @@ void HELPER(exception_cause)(CPUXtensaState *env, uint32_= t pc, uint32_t cause) env->sregs[EXCCAUSE] =3D cause; env->sregs[PS] |=3D PS_EXCM; =20 - HELPER(exception)(env, vector); + cpu_raise_excp(env_cpu(env), vector); } =20 void HELPER(exception_cause_vaddr)(CPUXtensaState *env, @@ -90,7 +82,7 @@ void HELPER(debug_exception)(CPUXtensaState *env, uint32_= t pc, uint32_t cause) env->sregs[EPS2 + level - 2] =3D env->sregs[PS]; env->sregs[PS] =3D (env->sregs[PS] & ~PS_INTLEVEL) | PS_EXCM | (level << PS_INTLEVEL_SHIFT); - HELPER(exception)(env, EXC_DEBUG); + cpu_raise_excp(env_cpu(env), EXC_DEBUG); } =20 #ifndef CONFIG_USER_ONLY @@ -113,7 +105,7 @@ void HELPER(waiti)(CPUXtensaState *env, uint32_t pc, ui= nt32_t intlevel) } =20 cpu->halted =3D 1; - HELPER(exception)(env, EXCP_HLT); + cpu_raise_excp(env_cpu(env), EXCP_HLT); } =20 void HELPER(check_interrupts)(CPUXtensaState *env) diff --git a/target/xtensa/helper.h b/target/xtensa/helper.h index ae938ceedb8..4640d0da59a 100644 --- a/target/xtensa/helper.h +++ b/target/xtensa/helper.h @@ -1,4 +1,3 @@ -DEF_HELPER_2(exception, noreturn, env, i32) DEF_HELPER_3(exception_cause, noreturn, env, i32, i32) DEF_HELPER_4(exception_cause_vaddr, noreturn, env, i32, i32, i32) DEF_HELPER_3(debug_exception, noreturn, env, i32, i32) diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index db48f0c562a..05c73bef99d 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -307,7 +307,7 @@ static void gen_yield(DisasContext *dc) { tcg_gen_st_i32(tcg_constant_i32(0), tcg_env, offsetof(CPUXtensaState, yield_needed)); - gen_helper_exception(tcg_env, tcg_constant_i32(EXCP_YIELD)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(EXCP_YIELD)); } =20 static void gen_exception_cause(DisasContext *dc, uint32_t cause) diff --git a/target/xtensa/win_helper.c b/target/xtensa/win_helper.c index 4b25f8f4de7..b86a05d6203 100644 --- a/target/xtensa/win_helper.c +++ b/target/xtensa/win_helper.c @@ -27,6 +27,7 @@ =20 #include "qemu/osdep.h" #include "qemu/log.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" @@ -125,13 +126,13 @@ void HELPER(window_check)(CPUXtensaState *env, uint32= _t pc, uint32_t w) =20 switch (ctz32(windowstart >> n)) { case 0: - HELPER(exception)(env, EXC_WINDOW_OVERFLOW4); + cpu_raise_excp(env_cpu(env), EXC_WINDOW_OVERFLOW4); break; case 1: - HELPER(exception)(env, EXC_WINDOW_OVERFLOW8); + cpu_raise_excp(env_cpu(env), EXC_WINDOW_OVERFLOW8); break; default: - HELPER(exception)(env, EXC_WINDOW_OVERFLOW12); + cpu_raise_excp(env_cpu(env), EXC_WINDOW_OVERFLOW12); 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Fri, 02 Oct 2026 10:53:30 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 21/27] target/avr: convert debug/break/sleep to raise_excp Date: Sat, 3 Oct 2026 01:50:29 +0800 Message-ID: <20261002175037.1747-22-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1330; envelope-from=luoyonggang@gmail.com; helo=mail-dy1-x1330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790964426624158500 Content-Type: text/plain; charset="utf-8" Use the shared raise_excp helper for AVR debug, break, and sleep exceptions while preserving target-specific unsupported handling. Signed-off-by: Yonggang Luo --- target/avr/helper.c | 24 ------------------------ target/avr/helper.h | 3 --- target/avr/translate.c | 4 ++-- 3 files changed, 2 insertions(+), 29 deletions(-) diff --git a/target/avr/helper.c b/target/avr/helper.c index f452c9d9040..ca58a0191fd 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -152,14 +152,6 @@ bool avr_cpu_tlb_fill(CPUState *cs, vaddr address, int= size, * helpers */ =20 -void helper_sleep(CPUAVRState *env) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D EXCP_HLT; - cpu_loop_exit(cs); -} - void helper_unsupported(CPUAVRState *env) { CPUState *cs =3D env_cpu(env); @@ -176,22 +168,6 @@ void helper_unsupported(CPUAVRState *env) cpu_loop_exit(cs); } =20 -void helper_debug(CPUAVRState *env) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D EXCP_DEBUG; - cpu_loop_exit(cs); -} - -void helper_break(CPUAVRState *env) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D EXCP_DEBUG; - cpu_loop_exit(cs); -} - void helper_wdr(CPUAVRState *env) { qemu_log_mask(LOG_UNIMP, "WDG reset (not implemented)\n"); diff --git a/target/avr/helper.h b/target/avr/helper.h index e8d13e925f4..09ce0624915 100644 --- a/target/avr/helper.h +++ b/target/avr/helper.h @@ -19,8 +19,5 @@ */ =20 DEF_HELPER_1(wdr, void, env) -DEF_HELPER_1(debug, noreturn, env) -DEF_HELPER_1(break, noreturn, env) -DEF_HELPER_1(sleep, noreturn, env) DEF_HELPER_1(unsupported, noreturn, env) DEF_HELPER_3(fullwr, void, env, i32, i32) diff --git a/target/avr/translate.c b/target/avr/translate.c index 3c576060970..477610cd349 100644 --- a/target/avr/translate.c +++ b/target/avr/translate.c @@ -2554,7 +2554,7 @@ static bool trans_BREAK(DisasContext *ctx, arg_BREAK = *a) =20 #ifdef BREAKPOINT_ON_BREAK tcg_gen_movi_tl(cpu_pc, ctx->npc - 1); - gen_helper_debug(tcg_env); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(EXCP_DEBUG)); ctx->base.is_jmp =3D DISAS_EXIT; #else /* NOP */ @@ -2580,7 +2580,7 @@ static bool trans_NOP(DisasContext *ctx, arg_NOP *a) */ static bool trans_SLEEP(DisasContext *ctx, arg_SLEEP *a) { - gen_helper_sleep(tcg_env); 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Fri, 02 Oct 2026 10:53:38 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 22/27] target/arm: convert exception_internal to raise_excp Date: Sat, 3 Oct 2026 01:50:30 +0800 Message-ID: <20261002175037.1747-23-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::e; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790963985460158500 Content-Type: text/plain; charset="utf-8" Use the shared raise_excp helper for exception_internal and adapt zero-PC C exception exits to cpu_raise_excp(). Preserve ARM-specific exception helpers that carry additional state. Signed-off-by: Yonggang Luo --- target/arm/tcg/helper-defs.h | 1 - target/arm/tcg/m_helper.c | 3 ++- target/arm/tcg/op_helper.c | 33 ++++++--------------------------- target/arm/tcg/translate.c | 2 +- 4 files changed, 9 insertions(+), 30 deletions(-) diff --git a/target/arm/tcg/helper-defs.h b/target/arm/tcg/helper-defs.h index 269ac515065..14ef3120373 100644 --- a/target/arm/tcg/helper-defs.h +++ b/target/arm/tcg/helper-defs.h @@ -45,7 +45,6 @@ DEF_HELPER_FLAGS_2(usad8, TCG_CALL_NO_RWG_SE, i32, i32, i= 32) =20 DEF_HELPER_FLAGS_3(sel_flags, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32) -DEF_HELPER_2(exception_internal, noreturn, env, i32) DEF_HELPER_3(exception_with_syndrome, noreturn, env, i32, i32) DEF_HELPER_4(exception_with_syndrome_el, noreturn, env, i32, i32, i32) DEF_HELPER_2(exception_bkpt_insn, noreturn, env, i32) diff --git a/target/arm/tcg/m_helper.c b/target/arm/tcg/m_helper.c index 65dcf97adef..9c21df772ab 100644 --- a/target/arm/tcg/m_helper.c +++ b/target/arm/tcg/m_helper.c @@ -18,6 +18,7 @@ #include "exec/page-protection.h" #ifdef CONFIG_TCG #include "accel/tcg/cpu-ldst-common.h" +#include "accel/tcg/cpu-loop.h" #include "semihosting/common-semi.h" #endif #if !defined(CONFIG_USER_ONLY) @@ -575,7 +576,7 @@ void HELPER(v7m_bxns)(CPUARMState *env, uint32_t dest) */ env->regs[15] =3D dest & ~1; env->thumb =3D dest & 1; - HELPER(exception_internal)(env, EXCP_EXCEPTION_EXIT); + cpu_raise_excp(env_cpu(env), EXCP_EXCEPTION_EXIT); /* notreached */ } =20 diff --git a/target/arm/tcg/op_helper.c b/target/arm/tcg/op_helper.c index af56eff9f18..522c309fa39 100644 --- a/target/arm/tcg/op_helper.c +++ b/target/arm/tcg/op_helper.c @@ -64,10 +64,9 @@ void raise_exception(CPUARMState *env, uint32_t excp, } =20 assert(!excp_is_internal(excp)); - cs->exception_index =3D excp; env->exception.syndrome =3D syndrome; env->exception.target_el =3D target_el; - cpu_loop_exit(cs); + cpu_raise_excp(cs, excp); } =20 void raise_exception_ra(CPUARMState *env, uint32_t excp, uint64_t syndrome, @@ -399,9 +398,8 @@ void HELPER(wfi)(CPUARMState *env, uint32_t insn_len) } =20 qatomic_set(&env->halt_reason, HALT_WFI); - cs->exception_index =3D EXCP_HLT; cs->halted =3D 1; - cpu_loop_exit(cs); + cpu_raise_excp(cs, EXCP_HLT); #endif } =20 @@ -462,9 +460,8 @@ void HELPER(wfit)(CPUARMState *env, uint32_t rd) timer_mod(cpu->wfxt_timer, nexttick); } qatomic_set(&env->halt_reason, HALT_WFI); - cs->exception_index =3D EXCP_HLT; cs->halted =3D 1; - cpu_loop_exit(cs); + cpu_raise_excp(cs, EXCP_HLT); #endif } =20 @@ -631,9 +628,8 @@ void HELPER(wfe)(CPUARMState *env, uint32_t insn_len) } =20 qatomic_set(&env->halt_reason, HALT_WFE); - cs->exception_index =3D EXCP_HLT; cs->halted =3D 1; - cpu_loop_exit(cs); + cpu_raise_excp(cs, EXCP_HLT); #endif } =20 @@ -726,9 +722,8 @@ void HELPER(wfet)(CPUARMState *env, uint32_t rd) } =20 qatomic_set(&env->halt_reason, HALT_WFE); - cs->exception_index =3D EXCP_HLT; cs->halted =3D 1; - cpu_loop_exit(cs); + cpu_raise_excp(cs, EXCP_HLT); #endif } =20 @@ -740,23 +735,7 @@ void HELPER(yield)(CPUARMState *env) * that the guest is currently busy-looping. Yield control back to the * top level loop so that a more deserving VCPU has a chance to run. */ - cs->exception_index =3D EXCP_YIELD; - cpu_loop_exit(cs); -} - -/* Raise an internal-to-QEMU exception. This is limited to only - * those EXCP values which are special cases for QEMU to interrupt - * execution and not to be used for exceptions which are passed to - * the guest (those must all have syndrome information and thus should - * use exception_with_syndrome*). - */ -void HELPER(exception_internal)(CPUARMState *env, uint32_t excp) -{ - CPUState *cs =3D env_cpu(env); - - assert(excp_is_internal(excp)); - cs->exception_index =3D excp; - cpu_loop_exit(cs); + cpu_raise_excp(cs, EXCP_YIELD); } =20 /* Raise an exception with the specified syndrome register value */ diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c index 6983153ffc6..ad73813fe53 100644 --- a/target/arm/tcg/translate.c +++ b/target/arm/tcg/translate.c @@ -379,7 +379,7 @@ static void gen_rebuild_hflags(DisasContext *s, bool ne= w_el) void gen_exception_internal(int excp) { assert(excp_is_internal(excp)); - gen_helper_exception_internal(tcg_env, tcg_constant_i32(excp)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(excp)); 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Fri, 02 Oct 2026 10:53:46 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 23/27] target/riscv: use cpu_raise_excp_restore for exception exits Date: Sat, 3 Oct 2026 01:50:31 +0800 Message-ID: <20261002175037.1747-24-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::d; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x0d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790964036032158500 Content-Type: text/plain; charset="utf-8" Keep riscv_raise_exception() for PMU bookkeeping, but delegate exception handling to cpu_raise_excp_restore(). It restores guest state when pc is nonzero and falls back to a plain exception exit otherwise. Signed-off-by: Yonggang Luo --- target/riscv/tcg/op_helper.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/riscv/tcg/op_helper.c b/target/riscv/tcg/op_helper.c index b67c7718db4..ca4efadec50 100644 --- a/target/riscv/tcg/op_helper.c +++ b/target/riscv/tcg/op_helper.c @@ -47,8 +47,7 @@ G_NORETURN void riscv_raise_exception(CPURISCVState *env, riscv_cpu_get_trap_name(exception, false), env->pc); =20 - cs->exception_index =3D exception; - cpu_loop_exit_restore(cs, pc); + cpu_raise_excp_restore(cs, exception, pc); } =20 void helper_raise_exception(CPURISCVState *env, uint32_t exception) --=20 2.52.0.windows.1 From nobody Sat Oct 24 00:33:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1790964062; 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Fri, 02 Oct 2026 10:53:54 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 24/27] target/mips: call do_raise_exception directly Date: Sat, 3 Oct 2026 01:50:32 +0800 Message-ID: <20261002175037.1747-25-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::f; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x0f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790964064204158500 Content-Type: text/plain; charset="utf-8" Use do_raise_exception() directly for reserved-instruction traps in the FPU helpers, passing GETPC() to restore guest state. Keep helper_wait() on the zero-PC path, where the guest PC was already updated. Signed-off-by: Yonggang Luo --- target/mips/tcg/exception.c | 7 +------ target/mips/tcg/fpu_helper.c | 6 +++--- 2 files changed, 4 insertions(+), 9 deletions(-) diff --git a/target/mips/tcg/exception.c b/target/mips/tcg/exception.c index 630b8b809fa..514880ccba8 100644 --- a/target/mips/tcg/exception.c +++ b/target/mips/tcg/exception.c @@ -60,11 +60,6 @@ void helper_raise_exception_debug(CPUMIPSState *env) do_raise_exception(env, EXCP_DEBUG, 0); } =20 -static void raise_exception(CPUMIPSState *env, uint32_t exception) -{ - do_raise_exception(env, exception, 0); -} - void helper_wait(CPUMIPSState *env) { CPUState *cs =3D env_cpu(env); @@ -75,7 +70,7 @@ void helper_wait(CPUMIPSState *env) * Last instruction in the block, PC was updated before * - no need to recover PC and icount. */ - raise_exception(env, EXCP_HLT); + do_raise_exception(env, EXCP_HLT, 0); } =20 void mips_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) diff --git a/target/mips/tcg/fpu_helper.c b/target/mips/tcg/fpu_helper.c index 36af9808025..ce68cda1e43 100644 --- a/target/mips/tcg/fpu_helper.c +++ b/target/mips/tcg/fpu_helper.c @@ -61,7 +61,7 @@ target_ulong helper_cfc1(CPUMIPSState *env, uint32_t reg) if (env->CP0_Config5 & (1 << CP0C5_UFE)) { arg1 =3D (env->CP0_Config5 >> CP0C5_FRE) & 1; } else { - helper_raise_exception(env, EXCP_RI); + do_raise_exception(env, EXCP_RI, GETPC()); } } break; @@ -120,7 +120,7 @@ void helper_ctc1(CPUMIPSState *env, target_ulong arg1, = uint32_t fs, uint32_t rt) env->CP0_Config5 &=3D ~(1 << CP0C5_FRE); compute_hflags(env); } else { - helper_raise_exception(env, EXCP_RI); + do_raise_exception(env, EXCP_RI, GETPC()); } break; case 6: @@ -132,7 +132,7 @@ void helper_ctc1(CPUMIPSState *env, target_ulong arg1, = uint32_t fs, uint32_t rt) env->CP0_Config5 |=3D (1 << CP0C5_FRE); compute_hflags(env); } else { - helper_raise_exception(env, EXCP_RI); + do_raise_exception(env, EXCP_RI, GETPC()); } break; case 25: --=20 2.52.0.windows.1 From nobody Sat Oct 24 00:33:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; 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Fri, 02 Oct 2026 10:54:01 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 25/27] target/mips: use shared TCG exception helpers Date: Sat, 3 Oct 2026 01:50:33 +0800 Message-ID: <20261002175037.1747-26-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::d; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x0d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790964302058158500 Content-Type: text/plain; charset="utf-8" Generate exceptions with gen_helper_raise_excp() and gen_helper_raise_excp_restore(), storing error_code in CPUMIPSState before raising. Route do_raise_exception_err() through cpu_raise_excp_restore() to preserve guest-state restoration. Signed-off-by: Yonggang Luo --- target/mips/cpu.h | 2 +- target/mips/helper.h | 4 ---- target/mips/tcg/exception.c | 20 +------------------- target/mips/tcg/translate.c | 9 ++++++--- 4 files changed, 8 insertions(+), 27 deletions(-) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 32549791a18..b6bb9028ecf 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1141,7 +1141,7 @@ typedef struct CPUArchState { TCState tcs[MIPS_SHADOW_SET_MAX]; CPUMIPSFPUContext fpus[MIPS_FPU_MAX]; /* QEMU */ - int error_code; + int32_t error_code; #define EXCP_TLB_NOMATCH 0x1 #define EXCP_INST_NOTAVAIL 0x2 /* No valid instruction word for BadInstr */ uint32_t hflags; /* CPU State */ diff --git a/target/mips/helper.h b/target/mips/helper.h index 779b87101db..83a6dd0b3c4 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -1,7 +1,3 @@ -DEF_HELPER_3(raise_exception_err, noreturn, env, i32, int) -DEF_HELPER_2(raise_exception, noreturn, env, i32) -DEF_HELPER_1(raise_exception_debug, noreturn, env) - #ifdef TARGET_MIPS64 DEF_HELPER_4(sdl, void, env, tl, tl, int) DEF_HELPER_4(sdr, void, env, tl, tl, int) diff --git a/target/mips/tcg/exception.c b/target/mips/tcg/exception.c index 514880ccba8..20705192988 100644 --- a/target/mips/tcg/exception.c +++ b/target/mips/tcg/exception.c @@ -44,22 +44,6 @@ target_ulong exception_resume_pc(CPUMIPSState *env) return bad_pc; } =20 -void helper_raise_exception_err(CPUMIPSState *env, uint32_t exception, - int error_code) -{ - do_raise_exception_err(env, exception, error_code, 0); -} - -void helper_raise_exception(CPUMIPSState *env, uint32_t exception) -{ - do_raise_exception(env, exception, GETPC()); -} - -void helper_raise_exception_debug(CPUMIPSState *env) -{ - do_raise_exception(env, EXCP_DEBUG, 0); -} - void helper_wait(CPUMIPSState *env) { CPUState *cs =3D env_cpu(env); @@ -140,8 +124,6 @@ void do_raise_exception_err(CPUMIPSState *env, uint32_t= exception, qemu_log_mask(CPU_LOG_INT, "%s: %d (%s) %d\n", __func__, exception, mips_exception_name(exception), error_code); - cs->exception_index =3D exception; env->error_code =3D error_code; - - cpu_loop_exit_restore(cs, pc); + cpu_raise_excp_restore(cs, exception, pc); } diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 936f8c4eddc..81c4301f625 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -1316,14 +1316,17 @@ static inline void restore_cpu_state(CPUMIPSState *= env, DisasContext *ctx) void generate_exception_err(DisasContext *ctx, int excp, int err) { save_cpu_state(ctx, 1); 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Fri, 02 Oct 2026 10:54:09 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 26/27] target/ppc: reuse the error-aware NIP exception path Date: Sat, 3 Oct 2026 01:50:34 +0800 Message-ID: <20261002175037.1747-27-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:38::e; envelope-from=luoyonggang@gmail.com; helo=mail-dl2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790964376407158500 Content-Type: text/plain; charset="utf-8" Route gen_exception_nip() through gen_exception_err_nip() with a zero error code, reusing its NIP update and exception-generation path. Signed-off-by: Yonggang Luo --- target/ppc/translate.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 467b8f3d4ec..f1a7039a325 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -330,12 +330,7 @@ static inline void gen_exception_err(DisasContext *ctx= , uint32_t excp, static void gen_exception_nip(DisasContext *ctx, uint32_t excp, target_ulong nip) { - TCGv_i32 t0; - - gen_update_nip(ctx, nip); - t0 =3D tcg_constant_i32(excp); - gen_helper_raise_exception(tcg_env, t0); - ctx->base.is_jmp =3D DISAS_NORETURN; + gen_exception_err_nip(ctx, excp, 0, nip); } =20 static inline void gen_exception(DisasContext *ctx, uint32_t excp) --=20 2.52.0.windows.1 From nobody Sat Oct 24 00:33:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 02 Oct 2026 10:54:16 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Max Filippov , Stafford Horne , Brian Cain , Eric Farman , Song Gao <17746591750@163.com>, qemu-riscv@nongnu.org, Pierrick Bouvier , Aleksandar Rikalo , qemu-s390x@nongnu.org, Palmer Dabbelt , Alistair Francis , Philippe Mathieu-Daude , Mark Cave-Ayland , Michael Rolnik , Harsh Prateek Bora , Nicholas Piggin , Cornelia Huck , Helge Deller , Chinmay Rath , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Peter Maydell , Chao Liu , Aurelien Jarno , Richard Henderson , David Hildenbrand , "Edgar E. Iglesias" , Daniel Henrique Barboza , Weiwei Li , Yoshinori Sato , Artyom Tarasenko , Matthew Rosato , Laurent Vivier , qemu-arm@nongnu.org, Paolo Bonzini , Glenn Miles , Ilya Leoshkevich Subject: [PATCH v3 27/27] target/ppc: use shared helpers for translated exceptions Date: Sat, 3 Oct 2026 01:50:35 +0800 Message-ID: <20261002175037.1747-28-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20261002175037.1747-1-luoyonggang@gmail.com> References: <20261002175037.1747-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:38::10; envelope-from=luoyonggang@gmail.com; helo=mail-dl2-x10.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790964036021158500 Content-Type: text/plain; charset="utf-8" Store error_code before gen_helper_raise_excp() and define raise_exception_err_ra() inline in internal.h to preserve PPC error-code handling while using cpu_raise_excp_restore(). Remove the obsolete TCG exception helpers. Signed-off-by: Yonggang Luo --- target/ppc/cpu.h | 5 +---- target/ppc/helper.h | 2 -- target/ppc/internal.h | 9 +++++++++ target/ppc/misc_helper.c | 1 + target/ppc/tcg-excp_helper.c | 21 --------------------- target/ppc/timebase_helper.c | 1 + target/ppc/translate.c | 13 ++++++------- 7 files changed, 18 insertions(+), 34 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 3fb51bbeb82..f1b1cf94331 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1392,7 +1392,7 @@ struct CPUArchState { uint64_t insns_flags; uint64_t insns_flags2; =20 - int error_code; + int32_t error_code; uint32_t pending_interrupts; #if !defined(CONFIG_USER_ONLY) uint64_t excp_stats[POWERPC_EXCP_NB]; @@ -2819,9 +2819,6 @@ void cpu_write_xer(CPUPPCState *env, target_ulong xer= ); */ #define is_book3s_arch2x(ctx) (!!((ctx)->insns_flags & PPC_SEGMENT_64B)) =20 -G_NORETURN void raise_exception_err_ra(CPUPPCState *env, uint32_t exceptio= n, - uint32_t error_code, uintptr_t radd= r); - /* PERFM EBB helper*/ #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY) void raise_ebb_perfm_exception(CPUPPCState *env); diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 80d6616bab4..8a804d326ac 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -1,5 +1,3 @@ -DEF_HELPER_FLAGS_3(raise_exception_err, TCG_CALL_NO_WG, noreturn, env, i32= , i32) -DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32) DEF_HELPER_FLAGS_4(TW, TCG_CALL_NO_WG, void, env, tl, tl, i32) #if defined(TARGET_PPC64) DEF_HELPER_FLAGS_4(TD, TCG_CALL_NO_WG, void, env, tl, tl, i32) diff --git a/target/ppc/internal.h b/target/ppc/internal.h index a20a0f9f7e0..66e017be74b 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -320,8 +320,17 @@ static inline int ger_pack_masks(int pmsk, int ymsk, i= nt xmsk) =20 #ifdef CONFIG_TCG #include "accel/tcg/tb-cpu-state.h" +#include "accel/tcg/cpu-loop.h" =20 TCGTBCPUState ppc_get_tb_cpu_state(CPUState *cs); + +static inline G_NORETURN +void raise_exception_err_ra(CPUPPCState *env, uint32_t excp, + uint32_t err, uintptr_t ra) +{ + env->error_code =3D err; + cpu_raise_excp_restore(env_cpu(env), excp, ra); +} #endif =20 #endif /* PPC_INTERNAL_H */ diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c index 0e625cbb704..527af513f92 100644 --- a/target/ppc/misc_helper.c +++ b/target/ppc/misc_helper.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "cpu.h" +#include "internal.h" #include "exec/cputlb.h" #include "exec/helper-proto.h" #include "qemu/error-report.h" diff --git a/target/ppc/tcg-excp_helper.c b/target/ppc/tcg-excp_helper.c index 93aedb0c8e2..6289ca7dfd5 100644 --- a/target/ppc/tcg-excp_helper.c +++ b/target/ppc/tcg-excp_helper.c @@ -34,27 +34,6 @@ /*************************************************************************= ****/ /* Exceptions processing helpers */ =20 -void raise_exception_err_ra(CPUPPCState *env, uint32_t exception, - uint32_t error_code, uintptr_t raddr) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D exception; - env->error_code =3D error_code; - cpu_loop_exit_restore(cs, raddr); -} - -void helper_raise_exception_err(CPUPPCState *env, uint32_t exception, - uint32_t error_code) -{ - raise_exception_err_ra(env, exception, error_code, 0); -} - -void helper_raise_exception(CPUPPCState *env, uint32_t exception) -{ - raise_exception_err_ra(env, exception, 0, 0); -} - #ifndef CONFIG_USER_ONLY =20 static G_NORETURN void raise_exception_err(CPUPPCState *env, uint32_t exce= ption, diff --git a/target/ppc/timebase_helper.c b/target/ppc/timebase_helper.c index 7209b418fb6..d0986ff261a 100644 --- a/target/ppc/timebase_helper.c +++ b/target/ppc/timebase_helper.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" #include "cpu.h" +#include "internal.h" #include "hw/ppc/ppc.h" #include "exec/helper-proto.h" #include "qemu/log.h" diff --git a/target/ppc/translate.c b/target/ppc/translate.c index f1a7039a325..767b8ed7697 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -308,12 +308,10 @@ static inline void gen_update_nip(DisasContext *ctx, = target_ulong nip) static void gen_exception_err_nip(DisasContext *ctx, uint32_t excp, uint32_t error, target_ulong nip) { - TCGv_i32 t0, t1; - gen_update_nip(ctx, nip); - t0 =3D tcg_constant_i32(excp); - t1 =3D tcg_constant_i32(error); - gen_helper_raise_exception_err(tcg_env, t0, t1); + tcg_gen_st_i32(tcg_constant_i32(error), tcg_env, + offsetof(CPUPPCState, error_code)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(excp)); ctx->base.is_jmp =3D DISAS_NORETURN; } =20 @@ -372,8 +370,9 @@ static void gen_debug_exception(DisasContext *ctx, bool= rfi_type) gen_load_spr(t0, SPR_BOOKE_DBSR); tcg_gen_ori_tl(t0, t0, dbsr); gen_store_spr(SPR_BOOKE_DBSR, t0); - gen_helper_raise_exception(tcg_env, - tcg_constant_i32(POWERPC_EXCP_DEBUG)); + tcg_gen_st_i32(tcg_constant_i32(0), tcg_env, + offsetof(CPUPPCState, error_code)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(POWERPC_EXCP_DEBUG= )); ctx->base.is_jmp =3D DISAS_NORETURN; } else { if (!rfi_type) { /* BookS does not single step rfi type instructio= ns */ --=20 2.52.0.windows.1