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Sat, 26 Sep 2026 04:08:33 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Brian Cain , Igor Mammedov , Aurelien Jarno , Palmer Dabbelt , Alistair Francis , Sunil V L , Paolo Bonzini , Song Gao <17746591750@163.com>, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Peter Maydell , qemu-arm@nongnu.org, Yoshinori Sato , Daniel Henrique Barboza , "Michael S. Tsirkin" , qemu-riscv@nongnu.org, Philippe Mathieu-Daude , Ani Sinha , Jiaxun Yang , Richard Henderson , Chao Liu , Weiwei Li , Zhao Liu , Pierrick Bouvier Subject: [PATCH 1/9] target/i386: convert raise_exception to i386_raise_exception Date: Sat, 26 Sep 2026 19:08:09 +0800 Message-ID: <20260926110818.1912-2-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260926110818.1912-1-luoyonggang@gmail.com> References: <20260926110818.1912-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:38::f; envelope-from=luoyonggang@gmail.com; helo=mail-dl2-x0f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790421082795158500 Content-Type: text/plain; charset="utf-8" Prefix leftover TCG raise_exception to i386_raise_exception. Rename C raise_exception family globals to i386_raise_exception*, and keep the short names as static inline wrappers in helper-tcg.h. Wrappers still call raise_interrupt2. Signed-off-by: Yonggang Luo --- target/i386/helper.h | 2 +- target/i386/tcg/excp_helper.c | 18 +++++++-------- target/i386/tcg/helper-tcg.h | 42 +++++++++++++++++++++++++++++------ target/i386/tcg/translate.c | 2 +- 4 files changed, 46 insertions(+), 18 deletions(-) diff --git a/target/i386/helper.h b/target/i386/helper.h index 3f67098f11f..cf643e820a6 100644 --- a/target/i386/helper.h +++ b/target/i386/helper.h @@ -56,7 +56,7 @@ DEF_HELPER_2(syscall, void, env, int) DEF_HELPER_2(sysret, void, env, int) DEF_HELPER_FLAGS_1(pause, TCG_CALL_NO_WG, noreturn, env) DEF_HELPER_FLAGS_3(raise_interrupt, TCG_CALL_NO_WG, noreturn, env, int, in= t) -DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, int) +DEF_HELPER_FLAGS_2(i386_raise_exception, TCG_CALL_NO_WG, noreturn, env, in= t) DEF_HELPER_FLAGS_1(icebp, TCG_CALL_NO_WG, noreturn, env) DEF_HELPER_3(boundw, void, env, tl, int) DEF_HELPER_3(boundl, void, env, tl, int) diff --git a/target/i386/tcg/excp_helper.c b/target/i386/tcg/excp_helper.c index 1eaa602c91d..ab3aa17a870 100644 --- a/target/i386/tcg/excp_helper.c +++ b/target/i386/tcg/excp_helper.c @@ -32,9 +32,9 @@ G_NORETURN void helper_raise_interrupt(CPUX86State *env, = int intno, raise_interrupt(env, intno, next_eip_addend); } =20 -G_NORETURN void helper_raise_exception(CPUX86State *env, int exception_ind= ex) +G_NORETURN void helper_i386_raise_exception(CPUX86State *env, int exceptio= n_index) { - raise_exception(env, exception_index); + i386_raise_exception(env, exception_index); } =20 /* @@ -120,25 +120,25 @@ G_NORETURN void raise_interrupt(CPUX86State *env, int= intno, int next_eip_addend raise_interrupt2(env, intno, 1, 0, next_eip_addend, 0); } =20 -G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index, - int error_code) +G_NORETURN void i386_raise_exception_err(CPUX86State *env, int exception_i= ndex, + int error_code) { raise_interrupt2(env, exception_index, 0, error_code, 0, 0); } =20 -G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_ind= ex, - int error_code, uintptr_t retaddr) +G_NORETURN void i386_raise_exception_err_ra(CPUX86State *env, int exceptio= n_index, + int error_code, uintptr_t reta= ddr) { raise_interrupt2(env, exception_index, 0, error_code, 0, retaddr); } =20 -G_NORETURN void raise_exception(CPUX86State *env, int exception_index) +G_NORETURN void i386_raise_exception(CPUX86State *env, int exception_index) { raise_interrupt2(env, exception_index, 0, 0, 0, 0); } =20 -G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index, - uintptr_t retaddr) +G_NORETURN void i386_raise_exception_ra(CPUX86State *env, int exception_in= dex, + uintptr_t retaddr) { raise_interrupt2(env, exception_index, 0, 0, 0, retaddr); } diff --git a/target/i386/tcg/helper-tcg.h b/target/i386/tcg/helper-tcg.h index f4b2ff740d5..430e49efe0e 100644 --- a/target/i386/tcg/helper-tcg.h +++ b/target/i386/tcg/helper-tcg.h @@ -60,13 +60,41 @@ void x86_translate_code(CPUState *cs, TranslationBlock = *tb, int *max_insns, vaddr pc, void *host_pc); =20 /* excp_helper.c */ -G_NORETURN void raise_exception(CPUX86State *env, int exception_index); -G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index, - uintptr_t retaddr); -G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index, - int error_code); -G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_ind= ex, - int error_code, uintptr_t retaddr); +G_NORETURN void i386_raise_exception(CPUX86State *env, int exception_index= ); +G_NORETURN void i386_raise_exception_ra(CPUX86State *env, int exception_in= dex, + uintptr_t retaddr); +G_NORETURN void i386_raise_exception_err(CPUX86State *env, int exception_i= ndex, + int error_code); +G_NORETURN void i386_raise_exception_err_ra(CPUX86State *env, + int exception_index, + int error_code, uintptr_t reta= ddr); + +static inline G_NORETURN +void raise_exception(CPUX86State *env, int exception_index) +{ + i386_raise_exception(env, exception_index); +} + +static inline G_NORETURN +void raise_exception_ra(CPUX86State *env, int exception_index, + uintptr_t retaddr) +{ + i386_raise_exception_ra(env, exception_index, retaddr); +} + +static inline G_NORETURN +void raise_exception_err(CPUX86State *env, int exception_index, + int error_code) +{ + i386_raise_exception_err(env, exception_index, error_code); +} + +static inline G_NORETURN +void raise_exception_err_ra(CPUX86State *env, int exception_index, + int error_code, uintptr_t retaddr) +{ + i386_raise_exception_err_ra(env, exception_index, error_code, retaddr); +} G_NORETURN void raise_interrupt(CPUX86State *nenv, int intno, int next_eip= _addend); G_NORETURN void handle_unaligned_access(CPUX86State *env, vaddr vaddr, MMUAccessType access_type, diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 192cf43215e..1425a45ad39 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -1506,7 +1506,7 @@ static void gen_exception(DisasContext *s, int trapno) { gen_update_cc_op(s); gen_update_eip_cur(s); - gen_helper_raise_exception(tcg_env, tcg_constant_i32(trapno)); + gen_helper_i386_raise_exception(tcg_env, tcg_constant_i32(trapno)); s->base.is_jmp =3D DISAS_NORETURN; } =20 --=20 2.52.0.windows.1 From nobody Sat Sep 26 19:16:11 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Sat, 26 Sep 2026 04:08:39 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Brian Cain , Igor Mammedov , Aurelien Jarno , Palmer Dabbelt , Alistair Francis , Sunil V L , Paolo Bonzini , Song Gao <17746591750@163.com>, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Peter Maydell , qemu-arm@nongnu.org, Yoshinori Sato , Daniel Henrique Barboza , "Michael S. Tsirkin" , qemu-riscv@nongnu.org, Philippe Mathieu-Daude , Ani Sinha , Jiaxun Yang , Richard Henderson , Chao Liu , Weiwei Li , Zhao Liu , Pierrick Bouvier Subject: [PATCH 2/9] target/rx: rename helper_wait to helper_rx_wait Date: Sat, 26 Sep 2026 19:08:10 +0800 Message-ID: <20260926110818.1912-3-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260926110818.1912-1-luoyonggang@gmail.com> References: <20260926110818.1912-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:38::f; envelope-from=luoyonggang@gmail.com; helo=mail-dl2-x0f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790420988455158500 Content-Type: text/plain; charset="utf-8" helper_wait is a global C symbol. Prefix it so one binary can keep that short name free for another target. Signed-off-by: Yonggang Luo --- target/rx/helper.h | 2 +- target/rx/op_helper.c | 2 +- target/rx/translate.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target/rx/helper.h b/target/rx/helper.h index 8cc38b0cb71..e88782cf227 100644 --- a/target/rx/helper.h +++ b/target/rx/helper.h @@ -1,7 +1,7 @@ DEF_HELPER_1(raise_illegal_instruction, noreturn, env) DEF_HELPER_1(raise_access_fault, noreturn, env) DEF_HELPER_1(raise_privilege_violation, noreturn, env) -DEF_HELPER_1(wait, noreturn, env) +DEF_HELPER_1(rx_wait, noreturn, env) DEF_HELPER_2(rxint, noreturn, env, i32) DEF_HELPER_1(rxbrk, noreturn, env) DEF_HELPER_3(fadd, f32, env, f32, f32) diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c index 36df7d377e5..4bd25bb7d00 100644 --- a/target/rx/op_helper.c +++ b/target/rx/op_helper.c @@ -445,7 +445,7 @@ G_NORETURN void helper_raise_illegal_instruction(CPURXS= tate *env) raise_exception(env, 23, GETPC()); } =20 -G_NORETURN void helper_wait(CPURXState *env) +G_NORETURN void helper_rx_wait(CPURXState *env) { CPUState *cs =3D env_cpu(env); =20 diff --git a/target/rx/translate.c b/target/rx/translate.c index 132d495710c..b2e3d346147 100644 --- a/target/rx/translate.c +++ b/target/rx/translate.c @@ -2197,7 +2197,7 @@ static bool trans_WAIT(DisasContext *ctx, arg_WAIT *a) { if (is_privileged(ctx, 1)) { tcg_gen_movi_i32(cpu_pc, ctx->base.pc_next); - gen_helper_wait(tcg_env); + gen_helper_rx_wait(tcg_env); } return true; } --=20 2.52.0.windows.1 From nobody Sat Sep 26 19:16:11 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1790421011; cv=none; d=zohomail.com; s=zohoarc; b=aVhRsqJgxALQIdiW6hGcFzkEsA1HG+bnJ+bFf+GiibQdekENS5Ikr7ctsDoxSfrf9Oj7veDERtgqAtUyPRPn/+zn3q5/VOqX+5V5j0Q38/kFP6qxnAQuo1TUPCsEjk7qWp4Fym128RRGCYK46YpKrd+hQuFIDIswA05q0bhsOlk= ARC-Message-Signature: i=1; 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Sat, 26 Sep 2026 04:08:45 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Brian Cain , Igor Mammedov , Aurelien Jarno , Palmer Dabbelt , Alistair Francis , Sunil V L , Paolo Bonzini , Song Gao <17746591750@163.com>, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Peter Maydell , qemu-arm@nongnu.org, Yoshinori Sato , Daniel Henrique Barboza , "Michael S. Tsirkin" , qemu-riscv@nongnu.org, Philippe Mathieu-Daude , Ani Sinha , Jiaxun Yang , Richard Henderson , Chao Liu , Weiwei Li , Zhao Liu , Pierrick Bouvier Subject: [PATCH 3/9] target/hexagon: rename helper_wait to helper_hexagon_wait Date: Sat, 26 Sep 2026 19:08:11 +0800 Message-ID: <20260926110818.1912-4-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260926110818.1912-1-luoyonggang@gmail.com> References: <20260926110818.1912-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:38::f; envelope-from=luoyonggang@gmail.com; helo=mail-dl2-x0f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790421012478158500 Content-Type: text/plain; charset="utf-8" helper_wait is a global C symbol. Prefix it and take the resume PC as vaddr. Signed-off-by: Yonggang Luo --- target/hexagon/gen_tcg_sys.h | 2 +- target/hexagon/helper.h | 2 +- target/hexagon/op_helper.c | 8 ++++---- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/target/hexagon/gen_tcg_sys.h b/target/hexagon/gen_tcg_sys.h index af5032214c4..489d2780470 100644 --- a/target/hexagon/gen_tcg_sys.h +++ b/target/hexagon/gen_tcg_sys.h @@ -80,7 +80,7 @@ #define fGEN_TCG_Y2_wait(SHORTCODE) \ do { \ RsV =3D RsV; \ - gen_helper_wait(tcg_env, tcg_constant_tl(ctx->pkt.pc)); \ + gen_helper_hexagon_wait(tcg_env, tcg_constant_vaddr(ctx->pkt.pc));= \ } while (0) =20 #define fGEN_TCG_Y2_resume(SHORTCODE) \ diff --git a/target/hexagon/helper.h b/target/hexagon/helper.h index 71c8da4c46d..030ed6dcef5 100644 --- a/target/hexagon/helper.h +++ b/target/hexagon/helper.h @@ -136,7 +136,7 @@ DEF_HELPER_3(sreg_write_masked, void, env, i32, i32) DEF_HELPER_3(setprio, void, env, i32, i32) DEF_HELPER_2(start, void, env, i32) DEF_HELPER_1(stop, void, env) -DEF_HELPER_2(wait, void, env, i32) +DEF_HELPER_2(hexagon_wait, void, env, vaddr) DEF_HELPER_2(resume, void, env, i32) DEF_HELPER_1(resched, void, env) DEF_HELPER_3(modify_ssr, void, env, i32, i32) diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c index 4f00ca773f3..7f026292ce8 100644 --- a/target/hexagon/op_helper.c +++ b/target/hexagon/op_helper.c @@ -1741,7 +1741,7 @@ static void set_wait_mode(CPUHexagonState *env) SET_SYSTEM_FIELD(env, HEX_SREG_MODECTL, MODECTL_W, thread_wait_mask); } =20 -static void hexagon_wait_thread(CPUHexagonState *env, uint32_t PC) +static void hexagon_wait_thread(CPUHexagonState *env, vaddr pc) { CPUState *cs; =20 @@ -1768,7 +1768,7 @@ static void hexagon_wait_thread(CPUHexagonState *env,= uint32_t PC) return; } set_wait_mode(env); - env->wait_next_pc =3D PC + 4; + env->wait_next_pc =3D pc + 4; =20 cpu_interrupt(cs, CPU_INTERRUPT_HALT); } @@ -1836,12 +1836,12 @@ void HELPER(resched)(CPUHexagonState *env) resched(env); } =20 -void HELPER(wait)(CPUHexagonState *env, uint32_t PC) +void HELPER(hexagon_wait)(CPUHexagonState *env, vaddr pc) { BQL_LOCK_GUARD(); =20 if (!fIN_DEBUG_MODE(env->threadId)) { - hexagon_wait_thread(env, PC); + hexagon_wait_thread(env, pc); } } =20 --=20 2.52.0.windows.1 From nobody Sat Sep 26 19:16:11 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Sat, 26 Sep 2026 04:08:52 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Brian Cain , Igor Mammedov , Aurelien Jarno , Palmer Dabbelt , Alistair Francis , Sunil V L , Paolo Bonzini , Song Gao <17746591750@163.com>, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Peter Maydell , qemu-arm@nongnu.org, Yoshinori Sato , Daniel Henrique Barboza , "Michael S. Tsirkin" , qemu-riscv@nongnu.org, Philippe Mathieu-Daude , Ani Sinha , Jiaxun Yang , Richard Henderson , Chao Liu , Weiwei Li , Zhao Liu , Pierrick Bouvier Subject: [PATCH 4/9] target/arm: rename raise_exception to arm_raise_exception Date: Sat, 26 Sep 2026 19:08:12 +0800 Message-ID: <20260926110818.1912-5-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260926110818.1912-1-luoyonggang@gmail.com> References: <20260926110818.1912-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:38::e; envelope-from=luoyonggang@gmail.com; helo=mail-dl2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790421068845158500 Content-Type: text/plain; charset="utf-8" raise_exception is a global C symbol. Prefix it so one binary can keep that short name free for another target, and keep the short name as a static inline wrapper. Signed-off-by: Yonggang Luo --- target/arm/internals.h | 27 ++++++++++++++++++++------- target/arm/tcg-stubs.c | 4 ++-- target/arm/tcg/op_helper.c | 10 +++++----- 3 files changed, 27 insertions(+), 14 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 1efda543270..672fec7d52a 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -333,20 +333,33 @@ FIELD(FPMR, LSCALE2, 32, 6) #define M_FAKE_FSR_SFAULT 0xe /* SecureFault INVTRAN, INVEP or AUVIOL */ =20 /** - * raise_exception: Raise the specified exception. + * arm_raise_exception: Raise the specified exception. * Raise a guest exception with the specified value, syndrome register * and target exception level. This should be called from helper functions, * and never returns because we will longjump back up to the CPU main loop. */ -G_NORETURN void raise_exception(CPUARMState *env, uint32_t excp, - uint64_t syndrome, uint32_t target_el); - +G_NORETURN void arm_raise_exception(CPUARMState *env, uint32_t excp, + uint64_t syndrome, uint32_t target_el); /* * Similarly, but also use unwinding to restore cpu state. */ -G_NORETURN void raise_exception_ra(CPUARMState *env, uint32_t excp, - uint64_t syndrome, uint32_t target_el, - uintptr_t ra); +G_NORETURN void arm_raise_exception_ra(CPUARMState *env, uint32_t excp, + uint64_t syndrome, uint32_t target_= el, + uintptr_t ra); + +static inline G_NORETURN +void raise_exception(CPUARMState *env, uint32_t excp, + uint64_t syndrome, uint32_t target_el) +{ + arm_raise_exception(env, excp, syndrome, target_el); +} + +static inline G_NORETURN +void raise_exception_ra(CPUARMState *env, uint32_t excp, uint64_t syndrome, + uint32_t target_el, uintptr_t ra) +{ + arm_raise_exception_ra(env, excp, syndrome, target_el, ra); +} =20 /* * For AArch64, map a given EL to an index in the banked_spsr array. diff --git a/target/arm/tcg-stubs.c b/target/arm/tcg-stubs.c index aeeede80661..7f9f684ed70 100644 --- a/target/arm/tcg-stubs.c +++ b/target/arm/tcg-stubs.c @@ -16,8 +16,8 @@ void write_v7m_exception(CPUARMState *env, uint32_t new_e= xc) g_assert_not_reached(); } =20 -void raise_exception_ra(CPUARMState *env, uint32_t excp, uint64_t syndrome, - uint32_t target_el, uintptr_t ra) +void arm_raise_exception_ra(CPUARMState *env, uint32_t excp, uint64_t synd= rome, + uint32_t target_el, uintptr_t ra) { g_assert_not_reached(); } diff --git a/target/arm/tcg/op_helper.c b/target/arm/tcg/op_helper.c index 643b1482523..040aeabddd5 100644 --- a/target/arm/tcg/op_helper.c +++ b/target/arm/tcg/op_helper.c @@ -45,8 +45,8 @@ int exception_target_el(CPUARMState *env) return target_el; } =20 -void raise_exception(CPUARMState *env, uint32_t excp, - uint64_t syndrome, uint32_t target_el) +void arm_raise_exception(CPUARMState *env, uint32_t excp, + uint64_t syndrome, uint32_t target_el) { CPUState *cs =3D env_cpu(env); =20 @@ -70,8 +70,8 @@ void raise_exception(CPUARMState *env, uint32_t excp, cpu_loop_exit(cs); } =20 -void raise_exception_ra(CPUARMState *env, uint32_t excp, uint64_t syndrome, - uint32_t target_el, uintptr_t ra) +void arm_raise_exception_ra(CPUARMState *env, uint32_t excp, uint64_t synd= rome, + uint32_t target_el, uintptr_t ra) { CPUState *cs =3D env_cpu(env); =20 @@ -81,7 +81,7 @@ void raise_exception_ra(CPUARMState *env, uint32_t excp, = uint64_t syndrome, * the caller passed us, and cannot use cpu_loop_exit_restore(). */ cpu_restore_state(cs, ra); - raise_exception(env, excp, syndrome, target_el); + arm_raise_exception(env, excp, syndrome, target_el); } =20 uint64_t HELPER(neon_tbl)(CPUARMState *env, uint32_t desc, --=20 2.52.0.windows.1 From nobody Sat Sep 26 19:16:11 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Sat, 26 Sep 2026 04:08:58 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Brian Cain , Igor Mammedov , Aurelien Jarno , Palmer Dabbelt , Alistair Francis , Sunil V L , Paolo Bonzini , Song Gao <17746591750@163.com>, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Peter Maydell , qemu-arm@nongnu.org, Yoshinori Sato , Daniel Henrique Barboza , "Michael S. Tsirkin" , qemu-riscv@nongnu.org, Philippe Mathieu-Daude , Ani Sinha , Jiaxun Yang , Richard Henderson , Chao Liu , Weiwei Li , Zhao Liu , Pierrick Bouvier Subject: [PATCH 5/9] target/mips: rename helper_wait to helper_mips_wait Date: Sat, 26 Sep 2026 19:08:13 +0800 Message-ID: <20260926110818.1912-6-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260926110818.1912-1-luoyonggang@gmail.com> References: <20260926110818.1912-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1336; envelope-from=luoyonggang@gmail.com; helo=mail-dy1-x1336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790421036656158500 Content-Type: text/plain; charset="utf-8" helper_wait is a global C symbol. Prefix it so one binary can keep that short name free for another target. Signed-off-by: Yonggang Luo --- target/mips/helper.h | 2 +- target/mips/tcg/exception.c | 2 +- target/mips/tcg/translate.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target/mips/helper.h b/target/mips/helper.h index 779b87101db..f2091c78e26 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -250,7 +250,7 @@ DEF_HELPER_1(rdhwr_xnp, tl, env) DEF_HELPER_1(rdhwr_chord, tl, env) DEF_HELPER_1(rdhwr_cvmcount, tl, env) DEF_HELPER_2(pmon, void, env, int) -DEF_HELPER_1(wait, void, env) +DEF_HELPER_1(mips_wait, void, env) =20 #ifdef TARGET_MIPS64 DEF_HELPER_FLAGS_2(lcsr_cpucfg, TCG_CALL_NO_RWG_SE, tl, env, tl) diff --git a/target/mips/tcg/exception.c b/target/mips/tcg/exception.c index 630b8b809fa..95fc922aa68 100644 --- a/target/mips/tcg/exception.c +++ b/target/mips/tcg/exception.c @@ -65,7 +65,7 @@ static void raise_exception(CPUMIPSState *env, uint32_t e= xception) do_raise_exception(env, exception, 0); } =20 -void helper_wait(CPUMIPSState *env) +void helper_mips_wait(CPUMIPSState *env) { CPUState *cs =3D env_cpu(env); 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Sat, 26 Sep 2026 04:09:03 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Brian Cain , Igor Mammedov , Aurelien Jarno , Palmer Dabbelt , Alistair Francis , Sunil V L , Paolo Bonzini , Song Gao <17746591750@163.com>, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Peter Maydell , qemu-arm@nongnu.org, Yoshinori Sato , Daniel Henrique Barboza , "Michael S. Tsirkin" , qemu-riscv@nongnu.org, Philippe Mathieu-Daude , Ani Sinha , Jiaxun Yang , Richard Henderson , Chao Liu , Weiwei Li , Zhao Liu , Pierrick Bouvier Subject: [PATCH 6/9] hw/arm/virt: prefix ACPI helpers with arm_virt_ Date: Sat, 26 Sep 2026 19:08:14 +0800 Message-ID: <20260926110818.1912-7-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260926110818.1912-1-luoyonggang@gmail.com> References: <20260926110818.1912-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:38::f; envelope-from=luoyonggang@gmail.com; helo=mail-dl2-x0f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790421006655158500 - virt_acpi_setup and virt_is_acpi_enabled are generic names also used by RISC-V and LoongArch virt. A combined binary cannot export two functions with the same C symbol. - Rename the ARM helpers to arm_virt_acpi_setup and arm_virt_is_acpi_enabled. Leave the trace event virt_acpi_setup unchanged; it is a separate identifier. Signed-off-by: Yonggang Luo Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/virt-acpi-build.c | 4 ++-- hw/arm/virt.c | 12 ++++++------ include/hw/arm/virt.h | 4 ++-- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index d368913e766..5737c3a8fa4 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -1559,7 +1559,7 @@ static const VMStateDescription vmstate_virt_acpi_bui= ld =3D { }, }; =20 -void virt_acpi_setup(VirtMachineState *vms) +void arm_virt_acpi_setup(VirtMachineState *vms) { AcpiBuildTables tables; AcpiBuildState *build_state; @@ -1570,7 +1570,7 @@ void virt_acpi_setup(VirtMachineState *vms) return; } =20 - if (!virt_is_acpi_enabled(vms)) { + if (!arm_virt_is_acpi_enabled(vms)) { trace_virt_acpi_setup(); return; } diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 3eecf094bcc..c3e256347f3 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -768,7 +768,7 @@ static void fdt_add_cpu_nodes(VirtMachineState *vms) &bottom_node, CPU_TOPOLOGY_LEVEL_SOCKET); if (cache_at_topo_level) { - if (bottom_node =3D=3D 1 && !virt_is_acpi_enabled(vms)) + if (bottom_node =3D=3D 1 && !arm_virt_is_acpi_enabled(vms)) error_setg( &error_fatal, "Cannot share L1 at socket_id %d." @@ -808,7 +808,7 @@ static void fdt_add_cpu_nodes(VirtMachineState *vms) top_cluster, bottom_cluster, cp= u, &cluster_offset); - if (bottom_cluster =3D=3D 1 && !virt_is_acpi_enabled(vms))= { + if (bottom_cluster =3D=3D 1 && !arm_virt_is_acpi_enabled(v= ms)) { error_setg(&error_fatal, "Cannot share L1 at socket_id %d, cluster_id %d. " "DT limitation on sharing at cache level =3D 1.", @@ -2035,7 +2035,7 @@ static void create_smmuv3_dev_dtb(VirtMachineState *v= ms, DeviceState *dev, hwaddr base =3D platform_bus_get_mmio_addr(pbus, sbdev, 0); MachineState *ms =3D MACHINE(vms); =20 - if (!(vms->bootinfo.firmware_loaded && virt_is_acpi_enabled(vms))) { + if (!(vms->bootinfo.firmware_loaded && arm_virt_is_acpi_enabled(vms)))= { if (object_property_get_bool(OBJECT(dev), "accel", &error_abort)) { error_setg(errp, "SMMUv3 with accel=3Don not supported for DT"= ); return; @@ -2445,7 +2445,7 @@ void virt_machine_done(Notifier *notifier, void *data) pci_bus_add_fw_cfg_extra_pci_roots(vms->fw_cfg, vms->bus, &error_abort); =20 - virt_acpi_setup(vms); + arm_virt_acpi_setup(vms); virt_build_smbios(vms); } =20 @@ -3209,7 +3209,7 @@ static void machvirt_init(MachineState *machine) create_pcie(vms); create_cxl_host_reg_region(vms); =20 - if (aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) { + if (aarch64 && firmware_loaded && arm_virt_is_acpi_enabled(vms)) { vms->acpi_dev =3D create_acpi_ged(vms); vms->generic_error_notifier.notify =3D virt_generic_error_req; notifier_list_add(&acpi_generic_error_notifiers, @@ -3559,7 +3559,7 @@ static void virt_set_oem_table_id(Object *obj, const = char *value, } =20 =20 -bool virt_is_acpi_enabled(const VirtMachineState *vms) +bool arm_virt_is_acpi_enabled(const VirtMachineState *vms) { if (vms->acpi =3D=3D ON_OFF_AUTO_OFF) { return false; diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 22e66d1a113..695e5d5728a 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -218,8 +218,8 @@ struct VirtMachineState { #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt") OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClass, VIRT_MACHINE) =20 -void virt_acpi_setup(VirtMachineState *vms); -bool virt_is_acpi_enabled(const VirtMachineState *vms); +void arm_virt_acpi_setup(VirtMachineState *vms); +bool arm_virt_is_acpi_enabled(const VirtMachineState *vms); =20 #define CLIDR_CTYPE_NO_CACHE 0x00 #define CLIDR_CTYPE_I_CACHE 0x01 --=20 2.52.0.windows.1 From nobody Sat Sep 26 19:16:11 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Sat, 26 Sep 2026 04:09:09 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Brian Cain , Igor Mammedov , Aurelien Jarno , Palmer Dabbelt , Alistair Francis , Sunil V L , Paolo Bonzini , Song Gao <17746591750@163.com>, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Peter Maydell , qemu-arm@nongnu.org, Yoshinori Sato , Daniel Henrique Barboza , "Michael S. Tsirkin" , qemu-riscv@nongnu.org, Philippe Mathieu-Daude , Ani Sinha , Jiaxun Yang , Richard Henderson , Chao Liu , Weiwei Li , Zhao Liu , Pierrick Bouvier Subject: [PATCH 7/9] hw/riscv/virt: prefix ACPI helpers with riscv_virt_ Date: Sat, 26 Sep 2026 19:08:15 +0800 Message-ID: <20260926110818.1912-8-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260926110818.1912-1-luoyonggang@gmail.com> References: <20260926110818.1912-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:38::f; envelope-from=luoyonggang@gmail.com; helo=mail-dl2-x0f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790421006628158500 - virt_acpi_setup and virt_is_acpi_enabled collide with ARM virt when both architectures are linked into one qemu-system binary. - Rename the RISC-V helpers to riscv_virt_acpi_setup and riscv_virt_is_acpi_enabled. Leave file-local virt_acpi_build* names unchanged. Signed-off-by: Yonggang Luo Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/riscv/virt-acpi-build.c | 2 +- hw/riscv/virt.c | 6 +++--- include/hw/riscv/virt.h | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c index 8e516ec1148..de47631852f 100644 --- a/hw/riscv/virt-acpi-build.c +++ b/hw/riscv/virt-acpi-build.c @@ -1021,7 +1021,7 @@ static const VMStateDescription vmstate_virt_acpi_bui= ld =3D { }, }; =20 -void virt_acpi_setup(RISCVVirtState *s) +void riscv_virt_acpi_setup(RISCVVirtState *s) { AcpiBuildTables tables; AcpiBuildState *build_state; diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index d4b501802f6..9bd1274841e 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -705,8 +705,8 @@ static void virt_machine_done(Notifier *notifier, void = *data) =20 virt_build_smbios(s); =20 - if (virt_is_acpi_enabled(s)) { - virt_acpi_setup(s); + if (riscv_virt_is_acpi_enabled(s)) { + riscv_virt_acpi_setup(s); } } =20 @@ -1066,7 +1066,7 @@ static void virt_set_iommu_sys(Object *obj, Visitor *= v, const char *name, visit_type_OnOffAuto(v, name, &s->iommu_sys, errp); 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Sat, 26 Sep 2026 04:09:15 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Brian Cain , Igor Mammedov , Aurelien Jarno , Palmer Dabbelt , Alistair Francis , Sunil V L , Paolo Bonzini , Song Gao <17746591750@163.com>, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Peter Maydell , qemu-arm@nongnu.org, Yoshinori Sato , Daniel Henrique Barboza , "Michael S. Tsirkin" , qemu-riscv@nongnu.org, Philippe Mathieu-Daude , Ani Sinha , Jiaxun Yang , Richard Henderson , Chao Liu , Weiwei Li , Zhao Liu , Pierrick Bouvier Subject: [PATCH 8/9] hw/loongarch/virt: prefix ACPI helper with loongarch_virt_ Date: Sat, 26 Sep 2026 19:08:16 +0800 Message-ID: <20260926110818.1912-9-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260926110818.1912-1-luoyonggang@gmail.com> References: <20260926110818.1912-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:36::10; envelope-from=luoyonggang@gmail.com; helo=mail-dy2-x10.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790421040682158500 - virt_acpi_setup is the same C symbol used by ARM and RISC-V virt. Rename it now so a later combined binary does not need meson -D prefixes for LoongArch. - Rename the file-local virt_is_acpi_enabled to loongarch_virt_is_acpi_enabled to match. Signed-off-by: Yonggang Luo Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Song Gao --- hw/loongarch/virt-acpi-build.c | 6 +++--- hw/loongarch/virt.c | 2 +- include/hw/loongarch/virt.h | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/loongarch/virt-acpi-build.c b/hw/loongarch/virt-acpi-build.c index 600ef60fc58..b9df9b3a127 100644 --- a/hw/loongarch/virt-acpi-build.c +++ b/hw/loongarch/virt-acpi-build.c @@ -674,7 +674,7 @@ static const VMStateDescription vmstate_acpi_build =3D { }, }; =20 -static bool virt_is_acpi_enabled(LoongArchVirtMachineState *lvms) +static bool loongarch_virt_is_acpi_enabled(LoongArchVirtMachineState *lvms) { if (lvms->acpi =3D=3D ON_OFF_AUTO_OFF) { return false; @@ -682,7 +682,7 @@ static bool virt_is_acpi_enabled(LoongArchVirtMachineSt= ate *lvms) return true; } =20 -void virt_acpi_setup(LoongArchVirtMachineState *lvms) +void loongarch_virt_acpi_setup(LoongArchVirtMachineState *lvms) { AcpiBuildTables tables; AcpiBuildState *build_state; @@ -692,7 +692,7 @@ void virt_acpi_setup(LoongArchVirtMachineState *lvms) return; } =20 - if (!virt_is_acpi_enabled(lvms)) { + if (!loongarch_virt_is_acpi_enabled(lvms)) { ACPI_BUILD_DPRINTF("ACPI disabled. Bailing out.\n"); return; } diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 9c5371af9de..19fbf6db0d9 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -242,7 +242,7 @@ static void virt_done(Notifier *notifier, void *data) LoongArchVirtMachineState *lvms =3D container_of(notifier, LoongArchVirtMachineState, machine_d= one); virt_build_smbios(lvms); - virt_acpi_setup(lvms); + loongarch_virt_acpi_setup(lvms); virt_fdt_setup(lvms); } =20 diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h index d39a9bbf5dd..72268466def 100644 --- a/include/hw/loongarch/virt.h +++ b/include/hw/loongarch/virt.h @@ -132,7 +132,7 @@ struct LoongArchVirtMachineState { =20 #define TYPE_LOONGARCH_VIRT_MACHINE MACHINE_TYPE_NAME("virt") OBJECT_DECLARE_SIMPLE_TYPE(LoongArchVirtMachineState, LOONGARCH_VIRT_MACHI= NE) -void virt_acpi_setup(LoongArchVirtMachineState *lvms); +void loongarch_virt_acpi_setup(LoongArchVirtMachineState *lvms); void virt_fdt_setup(LoongArchVirtMachineState *lvms); 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Sat, 26 Sep 2026 04:09:20 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Brian Cain , Igor Mammedov , Aurelien Jarno , Palmer Dabbelt , Alistair Francis , Sunil V L , Paolo Bonzini , Song Gao <17746591750@163.com>, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Peter Maydell , qemu-arm@nongnu.org, Yoshinori Sato , Daniel Henrique Barboza , "Michael S. Tsirkin" , qemu-riscv@nongnu.org, Philippe Mathieu-Daude , Ani Sinha , Jiaxun Yang , Richard Henderson , Chao Liu , Weiwei Li , Zhao Liu , Pierrick Bouvier Subject: [PATCH 9/9] target/riscv: uniquify TCG crc32, crc32c, and wfi helper names Date: Sat, 26 Sep 2026 19:08:17 +0800 Message-ID: <20260926110818.1912-10-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260926110818.1912-1-luoyonggang@gmail.com> References: <20260926110818.1912-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:38::28; envelope-from=luoyonggang@gmail.com; helo=mail-dl2-x28.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1790421016842158500 Content-Type: text/plain; charset="utf-8" - ARM already exports helper_crc32, helper_crc32c, helper_wfi, and the matching helper_info_* objects. RISC-V used the same DEF_HELPER names, which collide in a combined qemu-system link. - Rename the RISC-V helpers to riscv_crc32, riscv_crc32c, and riscv_wfi so the generated C symbols are unique without meson -D prefixes. Signed-off-by: Yonggang Luo --- target/riscv/helper.h | 6 +++--- target/riscv/tcg/bitmanip_helper.c | 4 ++-- target/riscv/tcg/insn_trans/trans_privileged.c.inc | 2 +- target/riscv/tcg/insn_trans/trans_xlrbr.c.inc | 4 ++-- target/riscv/tcg/op_helper.c | 2 +- 5 files changed, 9 insertions(+), 9 deletions(-) diff --git a/target/riscv/helper.h b/target/riscv/helper.h index aab92bf132a..9aa68480f2d 100644 --- a/target/riscv/helper.h +++ b/target/riscv/helper.h @@ -83,8 +83,8 @@ DEF_HELPER_FLAGS_1(unzip, TCG_CALL_NO_RWG_SE, tl, tl) DEF_HELPER_FLAGS_1(zip, TCG_CALL_NO_RWG_SE, tl, tl) DEF_HELPER_FLAGS_2(xperm4, TCG_CALL_NO_RWG_SE, tl, tl, tl) DEF_HELPER_FLAGS_2(xperm8, TCG_CALL_NO_RWG_SE, tl, tl, tl) -DEF_HELPER_FLAGS_2(crc32, TCG_CALL_NO_RWG_SE, tl, tl, tl) -DEF_HELPER_FLAGS_2(crc32c, TCG_CALL_NO_RWG_SE, tl, tl, tl) +DEF_HELPER_FLAGS_2(riscv_crc32, TCG_CALL_NO_RWG_SE, tl, tl, tl) +DEF_HELPER_FLAGS_2(riscv_crc32c, TCG_CALL_NO_RWG_SE, tl, tl, tl) =20 /* Floating Point - Half Precision */ DEF_HELPER_FLAGS_3(fadd_h, TCG_CALL_NO_RWG, i64, env, i64, i64) @@ -134,7 +134,7 @@ DEF_HELPER_1(sret, tl, env) DEF_HELPER_1(mret, tl, env) DEF_HELPER_1(mnret, tl, env) DEF_HELPER_1(ctr_clear, void, env) -DEF_HELPER_1(wfi, void, env) +DEF_HELPER_1(riscv_wfi, void, env) DEF_HELPER_1(wrs_nto, void, env) DEF_HELPER_1(tlb_flush, void, env) DEF_HELPER_1(tlb_flush_all, void, env) diff --git a/target/riscv/tcg/bitmanip_helper.c b/target/riscv/tcg/bitmanip= _helper.c index d8d94bca7ba..5af3efe194d 100644 --- a/target/riscv/tcg/bitmanip_helper.c +++ b/target/riscv/tcg/bitmanip_helper.c @@ -117,7 +117,7 @@ target_ulong HELPER(xperm8)(target_ulong rs1, target_ul= ong rs2) return do_xperm(rs1, rs2, 3); } =20 -target_ulong HELPER(crc32)(target_ulong rs1, target_ulong sz) +target_ulong HELPER(riscv_crc32)(target_ulong rs1, target_ulong sz) { for (target_ulong i =3D 0; i < sz; i++) { rs1 =3D crc32_table[rs1 & 0xFF] ^ (rs1 >> 8); @@ -126,7 +126,7 @@ target_ulong HELPER(crc32)(target_ulong rs1, target_ulo= ng sz) return rs1; } =20 -target_ulong HELPER(crc32c)(target_ulong rs1, target_ulong sz) +target_ulong HELPER(riscv_crc32c)(target_ulong rs1, target_ulong sz) { for (target_ulong i =3D 0; i < sz; i++) { rs1 =3D crc32c_table[rs1 & 0xFF] ^ (rs1 >> 8); diff --git a/target/riscv/tcg/insn_trans/trans_privileged.c.inc b/target/ri= scv/tcg/insn_trans/trans_privileged.c.inc index a8eaccef67e..0df78e89745 100644 --- a/target/riscv/tcg/insn_trans/trans_privileged.c.inc +++ b/target/riscv/tcg/insn_trans/trans_privileged.c.inc @@ -144,7 +144,7 @@ static bool trans_wfi(DisasContext *ctx, arg_wfi *a) #ifndef CONFIG_USER_ONLY decode_save_opc(ctx, 0); gen_update_pc(ctx, ctx->cur_insn_len); - gen_helper_wfi(tcg_env); + gen_helper_riscv_wfi(tcg_env); return true; #else return false; diff --git a/target/riscv/tcg/insn_trans/trans_xlrbr.c.inc b/target/riscv/t= cg/insn_trans/trans_xlrbr.c.inc index 01da2b6ce1d..795231f0839 100644 --- a/target/riscv/tcg/insn_trans/trans_xlrbr.c.inc +++ b/target/riscv/tcg/insn_trans/trans_xlrbr.c.inc @@ -29,11 +29,11 @@ static bool gen_crc(DisasContext *ctx, arg_r2 *a, #define TRANS_CRC32(NAME, SIZE) \ static bool trans_crc32_##NAME(DisasContext *ctx, arg_r2 *a) \ { if (SIZE =3D=3D 8) { REQUIRE_64BIT(ctx); }; \ - return gen_crc(ctx, a, gen_helper_crc32, tcg_constant_tl(SIZE)); } + return gen_crc(ctx, a, gen_helper_riscv_crc32, tcg_constant_tl(SIZE)= ); } #define TRANS_CRC32C(NAME, SIZE) \ static bool trans_crc32c_##NAME(DisasContext *ctx, arg_r2 *a) \ { if (SIZE =3D=3D 8) { REQUIRE_64BIT(ctx); }; \ - return gen_crc(ctx, a, gen_helper_crc32c, tcg_constant_tl(SIZE)); } + return gen_crc(ctx, a, gen_helper_riscv_crc32c, tcg_constant_tl(SIZE= )); } =20 TRANS_CRC32(b, 1); TRANS_CRC32(h, 2); diff --git a/target/riscv/tcg/op_helper.c b/target/riscv/tcg/op_helper.c index b67c7718db4..bdfd42e7ccf 100644 --- a/target/riscv/tcg/op_helper.c +++ b/target/riscv/tcg/op_helper.c @@ -592,7 +592,7 @@ void helper_ctr_clear(CPURISCVState *env) riscv_ctr_clear(env); } =20 -void helper_wfi(CPURISCVState *env) +void HELPER(riscv_wfi)(CPURISCVState *env) { CPUState *cs =3D env_cpu(env); bool rvs =3D riscv_has_ext(env, RVS); --=20 2.52.0.windows.1