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Thu, 17 Sep 2026 17:42:45 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 01/21] accel/tcg: add cpu_loop_exit_excp Date: Fri, 18 Sep 2026 08:42:03 +0800 Message-ID: <20260918004225.827-2-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::10; envelope-from=luoyonggang@gmail.com; helo=mail-pj2-x10.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692210557158500 Content-Type: text/plain; charset="utf-8" Add cpu_loop_exit_excp next to cpu_loop_exit_restore. Set cpu->exception_index then restore and exit the TB. host_pc =3D=3D 0 skips restore, matching existing wrappers. Signed-off-by: Yonggang Luo --- accel/tcg/cpu-exec-common.c | 6 ++++++ include/accel/tcg/cpu-loop.h | 13 +++++++++++++ 2 files changed, 19 insertions(+) diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c index 44e84344f3b..a33ec922745 100644 --- a/accel/tcg/cpu-exec-common.c +++ b/accel/tcg/cpu-exec-common.c @@ -82,6 +82,12 @@ void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc) cpu_loop_exit(cpu); } =20 +void cpu_loop_exit_excp(CPUState *cpu, int exception_index, uintptr_t pc) +{ + cpu->exception_index =3D exception_index; + cpu_loop_exit_restore(cpu, pc); +} + void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc) { /* Prevent looping if already executing in a serial context. */ diff --git a/include/accel/tcg/cpu-loop.h b/include/accel/tcg/cpu-loop.h index f4d38bc2bca..04c14396d93 100644 --- a/include/accel/tcg/cpu-loop.h +++ b/include/accel/tcg/cpu-loop.h @@ -65,6 +65,19 @@ G_NORETURN void cpu_loop_exit_noexc(CPUState *cpu); G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t host_pc); G_NORETURN void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t host_pc); =20 +/** + * cpu_loop_exit_excp: + * @cpu: the cpu context + * @exception_index: EXCP_* or target trap number + * @host_pc: the host pc within the translation, or 0 + * + * Set cpu->exception_index and exit the TB. If @host_pc is in + * translated code, restore guest state first (same as + * cpu_loop_exit_restore). @host_pc =3D=3D 0 skips restore. + */ +G_NORETURN void cpu_loop_exit_excp(CPUState *cpu, int exception_index, + uintptr_t host_pc); + /** * cpu_loop_exit: * @cpu: the cpu context --=20 2.52.0.windows.1 From nobody Sat Sep 26 20:52:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1789692478; cv=none; d=zohomail.com; s=zohoarc; b=Uo/OQDeSIe6MrW5ueYjSyJHhdtwCMk9HOaEEMXTrSOz6p1yB88NBVApCP9LsMDAuLEX18o7cHoJXqLnN6AzV+M6XLWcDK2Ixxf3wuI81CB7zrHR4BldKP+NOC0IzOs6VWRUTFYvWF9VVPER5UHs7lkFMR45AIy9ix5HGr0n10IU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1789692478; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Thu, 17 Sep 2026 17:42:53 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 02/21] helper-gen: move helper_info extern into gen_helper Date: Fri, 18 Sep 2026 08:42:04 +0800 Message-ID: <20260918004225.827-3-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:3b::d; envelope-from=luoyonggang@gmail.com; helo=mail-pz2-x0d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692479321158500 Content-Type: text/plain; charset="utf-8" Declare helper_info inside each gen_helper_* body so a comment on DEF_HELPER attaches to gen_helper_*, not helper_info_*. The extern still refers to the global from helper-info.c.inc. Silence -Wnested-externs around the HELPER_H expansion only. Signed-off-by: Yonggang Luo --- include/exec/helper-gen.h.inc | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/include/exec/helper-gen.h.inc b/include/exec/helper-gen.h.inc index dabe138e205..1a4dc27d436 100644 --- a/include/exec/helper-gen.h.inc +++ b/include/exec/helper-gen.h.inc @@ -11,49 +11,49 @@ #include "exec/helper-head.h.inc" =20 #define DEF_HELPER_FLAGS_0(name, flags, ret) \ -extern TCGHelperInfo glue(helper_info_, name); \ static inline void glue(gen_helper_, name)(dh_retvar_decl0(ret)) \ { \ + extern TCGHelperInfo glue(helper_info_, name); \ tcg_gen_call0(glue(helper_info_,name).func, \ &glue(helper_info_,name), dh_retvar(ret)); \ } =20 #define DEF_HELPER_FLAGS_1(name, flags, ret, t1) \ -extern TCGHelperInfo glue(helper_info_, name); \ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ dh_arg_decl(t1, 1)) \ { \ + extern TCGHelperInfo glue(helper_info_, name); \ tcg_gen_call1(glue(helper_info_,name).func, \ &glue(helper_info_,name), dh_retvar(ret), \ dh_arg(t1, 1)); \ } =20 #define DEF_HELPER_FLAGS_2(name, flags, ret, t1, t2) \ -extern TCGHelperInfo glue(helper_info_, name); \ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ dh_arg_decl(t1, 1), dh_arg_decl(t2, 2)) \ { \ + extern TCGHelperInfo glue(helper_info_, name); \ tcg_gen_call2(glue(helper_info_,name).func, \ &glue(helper_info_,name), dh_retvar(ret), \ dh_arg(t1, 1), dh_arg(t2, 2)); \ } =20 #define DEF_HELPER_FLAGS_3(name, flags, ret, t1, t2, t3) \ -extern TCGHelperInfo glue(helper_info_, name); \ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3)) \ { \ + extern TCGHelperInfo glue(helper_info_, name); \ tcg_gen_call3(glue(helper_info_,name).func, \ &glue(helper_info_,name), dh_retvar(ret), \ dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3)); \ } =20 #define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \ -extern TCGHelperInfo glue(helper_info_, name); \ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), \ dh_arg_decl(t3, 3), dh_arg_decl(t4, 4)) \ { \ + extern TCGHelperInfo glue(helper_info_, name); \ tcg_gen_call4(glue(helper_info_,name).func, \ &glue(helper_info_,name), dh_retvar(ret), \ dh_arg(t1, 1), dh_arg(t2, 2), \ @@ -61,11 +61,11 @@ static inline void glue(gen_helper_, name)(dh_retvar_de= cl(ret) \ } =20 #define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \ -extern TCGHelperInfo glue(helper_info_, name); \ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \ dh_arg_decl(t4, 4), dh_arg_decl(t5, 5)) \ { \ + extern TCGHelperInfo glue(helper_info_, name); \ tcg_gen_call5(glue(helper_info_,name).func, \ &glue(helper_info_,name), dh_retvar(ret), \ dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3), \ @@ -73,11 +73,11 @@ static inline void glue(gen_helper_, name)(dh_retvar_de= cl(ret) \ } =20 #define DEF_HELPER_FLAGS_6(name, flags, ret, t1, t2, t3, t4, t5, t6) \ -extern TCGHelperInfo glue(helper_info_, name); \ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \ dh_arg_decl(t4, 4), dh_arg_decl(t5, 5), dh_arg_decl(t6, 6)) \ { \ + extern TCGHelperInfo glue(helper_info_, name); \ tcg_gen_call6(glue(helper_info_,name).func, \ &glue(helper_info_,name), dh_retvar(ret), \ dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3), \ @@ -85,12 +85,12 @@ static inline void glue(gen_helper_, name)(dh_retvar_de= cl(ret) \ } =20 #define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7)\ -extern TCGHelperInfo glue(helper_info_, name); \ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \ dh_arg_decl(t4, 4), dh_arg_decl(t5, 5), dh_arg_decl(t6, 6), \ dh_arg_decl(t7, 7)) \ { \ + extern TCGHelperInfo glue(helper_info_, name); \ tcg_gen_call7(glue(helper_info_,name).func, \ &glue(helper_info_,name), dh_retvar(ret), \ dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3), \ @@ -98,7 +98,15 @@ static inline void glue(gen_helper_, name)(dh_retvar_dec= l(ret) \ dh_arg(t7, 7)); \ } =20 +/* + * helper_info_* is declared inside gen_helper_* so a comment on + * DEF_HELPER attaches to gen_helper_*, not helper_info_*. That is a + * nested extern; silence -Wnested-externs for this expansion only. + */ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wnested-externs" #include HELPER_H +#pragma GCC diagnostic pop =20 #undef DEF_HELPER_FLAGS_0 #undef DEF_HELPER_FLAGS_1 --=20 2.52.0.windows.1 From nobody Sat Sep 26 20:52:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1789692426; cv=none; d=zohomail.com; s=zohoarc; b=QGIfM1JZpuMI3BL+Tj1NkZsXLyRThn3XH0PDYItsQ2ECAl56m+ZD1QombPHy33YohiQ5ZTKEFeyjgyVIE1ZviLoYLSKpYCVet4fWZxUMm5c7x2jUhlSuSAG6SB0rMKvKoX5Mqt4YDMpTh1kF90QSjaYRqQigb5dXafKV4aZl6ag= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1789692426; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Thu, 17 Sep 2026 17:43:02 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 03/21] accel/tcg: add helper raise_excp Date: Fri, 18 Sep 2026 08:42:05 +0800 Message-ID: <20260918004225.827-4-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::e; envelope-from=luoyonggang@gmail.com; helo=mail-pj2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692427148158500 Content-Type: text/plain; charset="utf-8" Add TCG raise_excp (env, exception, restore) that exits with GETPC() or 0 via cpu_loop_exit_excp. Signed-off-by: Yonggang Luo --- accel/tcg/tcg-runtime.c | 6 ++++++ accel/tcg/tcg-runtime.h | 11 +++++++++++ 2 files changed, 17 insertions(+) diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c index 7c0aab98a80..ae93765b09e 100644 --- a/accel/tcg/tcg-runtime.c +++ b/accel/tcg/tcg-runtime.c @@ -130,6 +130,12 @@ uint64_t HELPER(ctpop_i64)(uint64_t arg) return ctpop64(arg); } =20 +void HELPER(raise_excp)(CPUArchState *env, uint32_t exception, + uint32_t restore) +{ + cpu_loop_exit_excp(env_cpu(env), exception, restore ? GETPC() : 0); +} + void HELPER(exit_atomic)(CPUArchState *env) { cpu_loop_exit_atomic(env_cpu(env), GETPC()); diff --git a/accel/tcg/tcg-runtime.h b/accel/tcg/tcg-runtime.h index 0b832176b33..036a33d566b 100644 --- a/accel/tcg/tcg-runtime.h +++ b/accel/tcg/tcg-runtime.h @@ -22,6 +22,17 @@ DEF_HELPER_FLAGS_1(ctpop_i64, TCG_CALL_NO_RWG_SE, i64, i= 64) =20 DEF_HELPER_FLAGS_1(lookup_tb_ptr, TCG_CALL_NO_WG_SE, cptr, env) =20 +/** + * raise_excp: + * @arg1: env -- CPU env + * @arg2: exception -- EXCP_* or target trap number + * @arg3: restore -- 0 skip unwind, 1 use GETPC() + * + * Shared TCG exception raise. Translate calls gen_helper_raise_excp. + * Exits via cpu_loop_exit_excp. + */ +DEF_HELPER_FLAGS_3(raise_excp, TCG_CALL_NO_WG, noreturn, env, i32, i32) + DEF_HELPER_FLAGS_1(exit_atomic, TCG_CALL_NO_WG, noreturn, env) =20 #ifndef IN_HELPER_PROTO --=20 2.52.0.windows.1 From nobody Sat Sep 26 20:52:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1789692319; cv=none; d=zohomail.com; s=zohoarc; b=fbvA9zB/JBXV3P7DhyaKsRt4uiCDYSp8PAEHf6pp3sQAUq7JtQzDDj4UOlxufWuIlvG3QYIKlFQO9WCPJo4AML1P+vmx6H7oR+YV56nWGasuwzTeXOMYUrDNc4mqrdzlO6Gd9FTYgKuU55mh8egHFCCpXBUAdZr63j9RJh6Yi3E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1789692319; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Thu, 17 Sep 2026 17:43:12 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 04/21] target/rx: convert raises to raise_excp Date: Fri, 18 Sep 2026 08:42:06 +0800 Message-ID: <20260918004225.827-5-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:3b::15; envelope-from=luoyonggang@gmail.com; helo=mail-pz2-x15.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692320860158500 Content-Type: text/plain; charset="utf-8" Name guest trap numbers RX_EXCP_* in cpu.h. TCG loop codes such as EXCP_INTERRUPT start at 0x10000. Translate privilege, illegal, BRK, and INT through gen_helper_raise_excp. Prefix leftover TCG wait as rx_wait, and drop unused raise_access_fault and the one-line raise_exception wrapper. FPSW still exits with RX_EXCP_ACCESS. Signed-off-by: Yonggang Luo --- target/rx/cpu.h | 13 ++++++++++++ target/rx/helper.c | 16 +++++++-------- target/rx/helper.h | 7 +------ target/rx/op_helper.c | 46 +++---------------------------------------- target/rx/translate.c | 19 ++++++++++-------- 5 files changed, 36 insertions(+), 65 deletions(-) diff --git a/target/rx/cpu.h b/target/rx/cpu.h index 64ba48a7329..233615c32dc 100644 --- a/target/rx/cpu.h +++ b/target/rx/cpu.h @@ -71,6 +71,19 @@ enum { NUM_REGS =3D 16, }; =20 +/* + * Guest trap numbers in cs->exception_index. TCG loop codes such as + * EXCP_INTERRUPT start at 0x10000 in cpu-common.h and do not overlap thes= e. + */ +enum { + RX_EXCP_PRIVILEGE_VIOLATION =3D 20, + RX_EXCP_ACCESS =3D 21, + RX_EXCP_ILLEGAL_INSTRUCTION =3D 23, + RX_EXCP_FPU =3D 25, + RX_EXCP_NMI =3D 30, + RX_EXCP_INT =3D 0x100, +}; + typedef struct CPUArchState { /* CPU registers */ uint32_t regs[NUM_REGS]; /* general registers */ diff --git a/target/rx/helper.c b/target/rx/helper.c index 0f99279bbaa..2ebda733489 100644 --- a/target/rx/helper.c +++ b/target/rx/helper.c @@ -86,13 +86,13 @@ void rx_cpu_do_interrupt(CPUState *cs) env->isp -=3D 4; cpu_stl_le_data(env, env->isp, env->pc); =20 - if (vec < 0x100) { + if (vec < RX_EXCP_INT) { env->pc =3D cpu_ldl_le_data(env, 0xffffff80 + vec * 4); } else { env->pc =3D cpu_ldl_le_data(env, env->intb + (vec & 0xff) * 4); } =20 - if (vec =3D=3D 30) { + if (vec =3D=3D RX_EXCP_NMI) { /* Non-maskable interrupt */ qemu_plugin_vcpu_interrupt_cb(cs, last_pc); } else { @@ -100,22 +100,22 @@ void rx_cpu_do_interrupt(CPUState *cs) } =20 switch (vec) { - case 20: + case RX_EXCP_PRIVILEGE_VIOLATION: expname =3D "privilege violation"; break; - case 21: + case RX_EXCP_ACCESS: expname =3D "access exception"; break; - case 23: + case RX_EXCP_ILLEGAL_INSTRUCTION: expname =3D "illegal instruction"; break; - case 25: + case RX_EXCP_FPU: expname =3D "fpu exception"; break; - case 30: + case RX_EXCP_NMI: expname =3D "non-maskable interrupt"; break; - case 0x100 ... 0x1ff: + case RX_EXCP_INT ... RX_EXCP_INT + 0xff: expname =3D "unconditional trap"; } qemu_log_mask(CPU_LOG_INT, "exception 0x%02x [%s] raised\n", diff --git a/target/rx/helper.h b/target/rx/helper.h index 8cc38b0cb71..1c749198b9b 100644 --- a/target/rx/helper.h +++ b/target/rx/helper.h @@ -1,9 +1,4 @@ -DEF_HELPER_1(raise_illegal_instruction, noreturn, env) -DEF_HELPER_1(raise_access_fault, noreturn, env) -DEF_HELPER_1(raise_privilege_violation, noreturn, env) -DEF_HELPER_1(wait, noreturn, env) -DEF_HELPER_2(rxint, noreturn, env, i32) -DEF_HELPER_1(rxbrk, noreturn, env) +DEF_HELPER_1(rx_wait, noreturn, env) DEF_HELPER_3(fadd, f32, env, f32, f32) DEF_HELPER_3(fsub, f32, env, f32, f32) DEF_HELPER_3(fmul, f32, env, f32, f32) diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c index 36df7d377e5..4ff61fb555b 100644 --- a/target/rx/op_helper.c +++ b/target/rx/op_helper.c @@ -25,10 +25,6 @@ #include "fpu/softfloat.h" #include "tcg/debug-assert.h" =20 -static inline G_NORETURN -void raise_exception(CPURXState *env, int index, - uintptr_t retaddr); - static void _set_psw(CPURXState *env, uint32_t psw, uint32_t rte) { uint32_t prev_u; @@ -115,7 +111,7 @@ static void update_fpsw(CPURXState *env, float32 ret, u= intptr_t retaddr) enable =3D FIELD_EX32(env->fpsw, FPSW, ENABLE); enable |=3D 1 << 5; /* CE always enabled */ if (cause & enable) { - raise_exception(env, 21, retaddr); + cpu_loop_exit_excp(env_cpu(env), RX_EXCP_ACCESS, retaddr); } } } @@ -419,48 +415,12 @@ uint32_t helper_divu(CPURXState *env, uint32_t num, u= int32_t den) return ret; } =20 -/* exception */ -static inline G_NORETURN -void raise_exception(CPURXState *env, int index, - uintptr_t retaddr) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D index; - cpu_loop_exit_restore(cs, retaddr); -} - -G_NORETURN void helper_raise_privilege_violation(CPURXState *env) -{ - raise_exception(env, 20, GETPC()); -} - -G_NORETURN void helper_raise_access_fault(CPURXState *env) -{ - raise_exception(env, 21, GETPC()); -} - -G_NORETURN void helper_raise_illegal_instruction(CPURXState *env) -{ - raise_exception(env, 23, GETPC()); -} - -G_NORETURN void helper_wait(CPURXState *env) +G_NORETURN void helper_rx_wait(CPURXState *env) { CPUState *cs =3D env_cpu(env); =20 cs->halted =3D 1; env->in_sleep =3D 1; env->psw_i =3D 1; - raise_exception(env, EXCP_HLT, 0); -} - -G_NORETURN void helper_rxint(CPURXState *env, uint32_t vec) -{ - raise_exception(env, 0x100 + vec, 0); -} - -G_NORETURN void helper_rxbrk(CPURXState *env) -{ - raise_exception(env, 0x100, 0); + cpu_loop_exit_excp(cs, EXCP_HLT, 0); } diff --git a/target/rx/translate.c b/target/rx/translate.c index 132d495710c..95c5fd4ac8c 100644 --- a/target/rx/translate.c +++ b/target/rx/translate.c @@ -245,7 +245,9 @@ static int is_privileged(DisasContext *ctx, int is_exce= ption) { if (FIELD_EX32(ctx->tb_flags, PSW, PM)) { if (is_exception) { - gen_helper_raise_privilege_violation(tcg_env); + gen_helper_raise_excp(tcg_env, + tcg_constant_i32(RX_EXCP_PRIVILEGE_VIOLA= TION), + tcg_constant_i32(1)); } return 0; } else { @@ -2174,7 +2176,8 @@ static bool trans_RTE(DisasContext *ctx, arg_RTE *a) static bool trans_BRK(DisasContext *ctx, arg_BRK *a) { tcg_gen_movi_i32(cpu_pc, ctx->base.pc_next); - gen_helper_rxbrk(tcg_env); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(RX_EXCP_INT), + tcg_constant_i32(0)); ctx->base.is_jmp =3D DISAS_NORETURN; return true; } @@ -2182,12 +2185,10 @@ static bool trans_BRK(DisasContext *ctx, arg_BRK *a) /* int #imm */ static bool trans_INT(DisasContext *ctx, arg_INT *a) { - TCGv_i32 vec; - tcg_debug_assert(a->imm < 0x100); - vec =3D tcg_constant_i32(a->imm); tcg_gen_movi_i32(cpu_pc, ctx->base.pc_next); - gen_helper_rxint(tcg_env, vec); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(RX_EXCP_INT + a->imm), + tcg_constant_i32(0)); ctx->base.is_jmp =3D DISAS_NORETURN; return true; } @@ -2197,7 +2198,7 @@ static bool trans_WAIT(DisasContext *ctx, arg_WAIT *a) { if (is_privileged(ctx, 1)) { tcg_gen_movi_i32(cpu_pc, ctx->base.pc_next); - gen_helper_wait(tcg_env); + gen_helper_rx_wait(tcg_env); } return true; } @@ -2228,7 +2229,9 @@ static void rx_tr_translate_insn(DisasContextBase *dc= base, CPUState *cs) ctx->pc =3D ctx->base.pc_next; insn =3D decode_load(ctx); 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Thu, 17 Sep 2026 17:43:20 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 05/21] target/sh4: convert raises to raise_excp Date: Fri, 18 Sep 2026 08:42:07 +0800 Message-ID: <20260918004225.827-6-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:3b::e; envelope-from=luoyonggang@gmail.com; helo=mail-pz2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692234690158500 Content-Type: text/plain; charset="utf-8" Name guest trap numbers SH4_EXCP_* in cpu.h. TCG loop codes such as EXCP_INTERRUPT start at 0x10000. Translate illegal and FPU-disable through gen_helper_raise_excp. Drop unused raise_* TCG helpers and the one-line raise_exception wrapper. Keep leftover sleep, trapa, and exclusive helpers. Exit unaligned and tlb_fill through cpu_loop_exit_excp. Log reset, manual reset, TLB multiple, and user break. Signed-off-by: Yonggang Luo --- target/sh4/cpu.h | 24 +++++++++++++ target/sh4/helper.c | 82 +++++++++++++++++++++--------------------- target/sh4/helper.h | 4 --- target/sh4/op_helper.c | 43 +++------------------- target/sh4/translate.c | 17 ++++++--- 5 files changed, 84 insertions(+), 86 deletions(-) diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 33027023763..d440aa6dbe7 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -137,6 +137,30 @@ typedef struct memory_content { struct memory_content *next; } memory_content; =20 +/* + * Guest trap numbers in cs->exception_index. TCG loop codes such as + * EXCP_INTERRUPT start at 0x10000 in cpu-common.h and do not overlap thes= e. + */ +enum { + SH4_EXCP_RESET =3D 0x000, + SH4_EXCP_MANUAL_RESET =3D 0x020, + SH4_EXCP_TLB_MISS =3D 0x040, + SH4_EXCP_DTLB_MISS_WRITE =3D 0x060, + SH4_EXCP_INITIAL_PAGE_WRITE =3D 0x080, + SH4_EXCP_TLB_VIOLATION =3D 0x0a0, + SH4_EXCP_DTLB_VIOLATION_WRITE =3D 0x0c0, + SH4_EXCP_ADDR_ERROR =3D 0x0e0, + SH4_EXCP_DATA_WRITE =3D 0x100, + SH4_EXCP_FPU =3D 0x120, + SH4_EXCP_TLB_MULTIPLE =3D 0x140, + SH4_EXCP_TRAPA =3D 0x160, + SH4_EXCP_ILLEGAL_INSTRUCTION =3D 0x180, + SH4_EXCP_SLOT_ILLEGAL_INSTRUCTION =3D 0x1a0, + SH4_EXCP_USER_BREAK =3D 0x1e0, + SH4_EXCP_FPU_DISABLE =3D 0x800, + SH4_EXCP_SLOT_FPU_DISABLE =3D 0x820, +}; + typedef struct CPUArchState { uint32_t flags; /* general execution flags */ uint32_t gregs[24]; /* general registers */ diff --git a/target/sh4/helper.c b/target/sh4/helper.c index b6b057f104b..e22f02a5647 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -70,7 +70,7 @@ void superh_cpu_do_interrupt(CPUState *cs) do_irq =3D do_irq && (cs->exception_index =3D=3D -1); =20 if (env->sr & (1u << SR_BL)) { - if (do_exp && cs->exception_index !=3D 0x1e0) { + if (do_exp && cs->exception_index !=3D SH4_EXCP_USER_BREAK) { /* In theory a masked exception generates a reset exception, which in turn jumps to the reset vector. However this only works when using a bootloader. When using a kernel and an @@ -97,45 +97,57 @@ void superh_cpu_do_interrupt(CPUState *cs) if (qemu_loglevel_mask(CPU_LOG_INT)) { const char *expname; switch (cs->exception_index) { - case 0x0e0: + case SH4_EXCP_RESET: + expname =3D "reset"; + break; + case SH4_EXCP_MANUAL_RESET: + expname =3D "manual_reset"; + break; + case SH4_EXCP_ADDR_ERROR: expname =3D "addr_error"; break; - case 0x040: + case SH4_EXCP_TLB_MISS: expname =3D "tlb_miss"; break; - case 0x0a0: + case SH4_EXCP_TLB_MULTIPLE: + expname =3D "tlb_multiple"; + break; + case SH4_EXCP_TLB_VIOLATION: expname =3D "tlb_violation"; break; - case 0x180: + case SH4_EXCP_ILLEGAL_INSTRUCTION: expname =3D "illegal_instruction"; break; - case 0x1a0: + case SH4_EXCP_SLOT_ILLEGAL_INSTRUCTION: expname =3D "slot_illegal_instruction"; break; - case 0x800: + case SH4_EXCP_FPU_DISABLE: expname =3D "fpu_disable"; break; - case 0x820: + case SH4_EXCP_SLOT_FPU_DISABLE: expname =3D "slot_fpu"; break; - case 0x100: + case SH4_EXCP_DATA_WRITE: expname =3D "data_write"; break; - case 0x060: + case SH4_EXCP_DTLB_MISS_WRITE: expname =3D "dtlb_miss_write"; break; - case 0x0c0: + case SH4_EXCP_DTLB_VIOLATION_WRITE: expname =3D "dtlb_violation_write"; break; - case 0x120: + case SH4_EXCP_FPU: expname =3D "fpu_exception"; break; - case 0x080: + case SH4_EXCP_INITIAL_PAGE_WRITE: expname =3D "initial_page_write"; break; - case 0x160: + case SH4_EXCP_TRAPA: expname =3D "trapa"; break; + case SH4_EXCP_USER_BREAK: + expname =3D "user_break"; + break; default: expname =3D do_irq ? "interrupt" : "???"; break; @@ -161,18 +173,18 @@ void superh_cpu_do_interrupt(CPUState *cs) if (do_exp) { env->expevt =3D cs->exception_index; switch (cs->exception_index) { - case 0x000: - case 0x020: - case 0x140: + case SH4_EXCP_RESET: + case SH4_EXCP_MANUAL_RESET: + case SH4_EXCP_TLB_MULTIPLE: env->sr &=3D ~(1u << SR_FD); env->sr |=3D 0xf << 4; /* IMASK */ env->pc =3D 0xa0000000; break; - case 0x040: - case 0x060: + case SH4_EXCP_TLB_MISS: + case SH4_EXCP_DTLB_MISS_WRITE: env->pc =3D env->vbr + 0x400; break; - case 0x160: + case SH4_EXCP_TRAPA: env->spc +=3D 2; /* special case for TRAPA */ /* fall through */ default: @@ -632,7 +644,7 @@ void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, hwa= ddr addr, CPUState *cs =3D env_cpu(s); =20 /* Multiple TLB Exception */ - cs->exception_index =3D 0x140; + cs->exception_index =3D SH4_EXCP_TLB_MULTIPLE; s->tea =3D addr; break; } @@ -828,37 +840,27 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address,= int size, switch (ret) { case MMU_ITLB_MISS: case MMU_DTLB_MISS_READ: - cs->exception_index =3D 0x040; - break; + cpu_loop_exit_excp(cs, SH4_EXCP_TLB_MISS, retaddr); case MMU_DTLB_MULTIPLE: case MMU_ITLB_MULTIPLE: - cs->exception_index =3D 0x140; - break; + cpu_loop_exit_excp(cs, SH4_EXCP_TLB_MULTIPLE, retaddr); case MMU_ITLB_VIOLATION: - cs->exception_index =3D 0x0a0; - break; + cpu_loop_exit_excp(cs, SH4_EXCP_TLB_VIOLATION, retaddr); case MMU_DTLB_MISS_WRITE: - cs->exception_index =3D 0x060; - break; + cpu_loop_exit_excp(cs, SH4_EXCP_DTLB_MISS_WRITE, retaddr); case MMU_DTLB_INITIAL_WRITE: - cs->exception_index =3D 0x080; - break; + cpu_loop_exit_excp(cs, SH4_EXCP_INITIAL_PAGE_WRITE, retaddr); case MMU_DTLB_VIOLATION_READ: - cs->exception_index =3D 0x0a0; - break; + cpu_loop_exit_excp(cs, SH4_EXCP_TLB_VIOLATION, retaddr); case MMU_DTLB_VIOLATION_WRITE: - cs->exception_index =3D 0x0c0; - break; + cpu_loop_exit_excp(cs, SH4_EXCP_DTLB_VIOLATION_WRITE, retaddr); case MMU_IADDR_ERROR: case MMU_DADDR_ERROR_READ: - cs->exception_index =3D 0x0e0; - break; + cpu_loop_exit_excp(cs, SH4_EXCP_ADDR_ERROR, retaddr); case MMU_DADDR_ERROR_WRITE: - cs->exception_index =3D 0x100; - break; + cpu_loop_exit_excp(cs, SH4_EXCP_DATA_WRITE, retaddr); default: cpu_abort(cs, "Unhandled MMU fault"); } - cpu_loop_exit_restore(cs, retaddr); } #endif /* !CONFIG_USER_ONLY */ diff --git a/target/sh4/helper.h b/target/sh4/helper.h index 29011d3dbbb..593b20c0af2 100644 --- a/target/sh4/helper.h +++ b/target/sh4/helper.h @@ -1,8 +1,4 @@ DEF_HELPER_1(ldtlb, void, env) -DEF_HELPER_1(raise_illegal_instruction, noreturn, env) -DEF_HELPER_1(raise_slot_illegal_instruction, noreturn, env) -DEF_HELPER_1(raise_fpu_disable, noreturn, env) -DEF_HELPER_1(raise_slot_fpu_disable, noreturn, env) DEF_HELPER_1(sleep, noreturn, env) DEF_HELPER_2(trapa, noreturn, env, i32) DEF_HELPER_1(exclusive, noreturn, env) diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index 777380f8e40..535bffb08f1 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -33,15 +33,12 @@ void superh_cpu_do_unaligned_access(CPUState *cs, vaddr= addr, switch (access_type) { case MMU_INST_FETCH: case MMU_DATA_LOAD: - cs->exception_index =3D 0x0e0; - break; + cpu_loop_exit_excp(cs, SH4_EXCP_ADDR_ERROR, retaddr); case MMU_DATA_STORE: - cs->exception_index =3D 0x100; - break; + cpu_loop_exit_excp(cs, SH4_EXCP_DATA_WRITE, retaddr); default: g_assert_not_reached(); } - cpu_loop_exit_restore(cs, retaddr); } =20 #endif @@ -55,49 +52,19 @@ void helper_ldtlb(CPUSH4State *env) #endif } =20 -static inline G_NORETURN -void raise_exception(CPUSH4State *env, int index, - uintptr_t retaddr) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D index; - cpu_loop_exit_restore(cs, retaddr); -} - -void helper_raise_illegal_instruction(CPUSH4State *env) -{ - raise_exception(env, 0x180, 0); -} - -void helper_raise_slot_illegal_instruction(CPUSH4State *env) -{ - raise_exception(env, 0x1a0, 0); -} - -void helper_raise_fpu_disable(CPUSH4State *env) -{ - raise_exception(env, 0x800, 0); -} - -void helper_raise_slot_fpu_disable(CPUSH4State *env) -{ - raise_exception(env, 0x820, 0); -} - void helper_sleep(CPUSH4State *env) { CPUState *cs =3D env_cpu(env); =20 cs->halted =3D 1; env->in_sleep =3D 1; - raise_exception(env, EXCP_HLT, 0); + cpu_loop_exit_excp(cs, EXCP_HLT, 0); } =20 void helper_trapa(CPUSH4State *env, uint32_t tra) { env->tra =3D tra << 2; - raise_exception(env, 0x160, 0); + cpu_loop_exit_excp(env_cpu(env), SH4_EXCP_TRAPA, 0); } =20 void helper_exclusive(CPUSH4State *env) @@ -255,7 +222,7 @@ static void update_fpscr(CPUSH4State *env, uintptr_t re= taddr) cause =3D (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT; enable =3D (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT; if (cause & enable) { - raise_exception(env, 0x120, retaddr); + cpu_loop_exit_excp(env_cpu(env), SH4_EXCP_FPU, retaddr); } } } diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 373950fd662..a439be4c74e 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -1765,10 +1765,15 @@ static void _decode_opc(DisasContext * ctx) if (ctx->envflags & TB_FLAG_DELAY_SLOT_MASK) { do_illegal_slot: gen_save_cpu_state(ctx, true); - gen_helper_raise_slot_illegal_instruction(tcg_env); + gen_helper_raise_excp(tcg_env, + tcg_constant_i32( + SH4_EXCP_SLOT_ILLEGAL_INSTRUCTION), + tcg_constant_i32(0)); } else { gen_save_cpu_state(ctx, true); - gen_helper_raise_illegal_instruction(tcg_env); + gen_helper_raise_excp(tcg_env, + tcg_constant_i32(SH4_EXCP_ILLEGAL_INSTRUCTIO= N), + tcg_constant_i32(0)); } ctx->base.is_jmp =3D DISAS_NORETURN; return; @@ -1776,9 +1781,13 @@ static void _decode_opc(DisasContext * ctx) do_fpu_disabled: gen_save_cpu_state(ctx, true); if (ctx->envflags & TB_FLAG_DELAY_SLOT_MASK) { - gen_helper_raise_slot_fpu_disable(tcg_env); + gen_helper_raise_excp(tcg_env, + tcg_constant_i32(SH4_EXCP_SLOT_FPU_DISABLE), + tcg_constant_i32(0)); } else { - gen_helper_raise_fpu_disable(tcg_env); + gen_helper_raise_excp(tcg_env, + tcg_constant_i32(SH4_EXCP_FPU_DISABLE), + tcg_constant_i32(0)); } ctx->base.is_jmp =3D DISAS_NORETURN; } --=20 2.52.0.windows.1 From nobody Sat Sep 26 20:52:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; 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Thu, 17 Sep 2026 17:43:30 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 06/21] target/m68k: convert raises to raise_excp Date: Fri, 18 Sep 2026 08:42:08 +0800 Message-ID: <20260918004225.827-7-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:3b::e; envelope-from=luoyonggang@gmail.com; helo=mail-pz2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692467318158500 Content-Type: text/plain; charset="utf-8" Translate through gen_helper_raise_excp with restore 0. Drop TCG raise_exception and the one-line raise_exception_ra wrappers. Keep leftover raise_exception_format2. Signed-off-by: Yonggang Luo --- target/m68k/helper.c | 12 ++---------- target/m68k/helper.h | 1 - target/m68k/op_helper.c | 19 ------------------- target/m68k/translate.c | 2 +- 4 files changed, 3 insertions(+), 31 deletions(-) diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 5f91d206f59..3c62e15735d 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -162,14 +162,6 @@ void HELPER(cf_movec_to)(CPUM68KState *env, uint32_t r= eg, uint32_t val) } } =20 -static void raise_exception_ra(CPUM68KState *env, int tt, uintptr_t raddr) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D tt; - cpu_loop_exit_restore(cs, raddr); -} - void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val) { switch (reg) { @@ -291,7 +283,7 @@ void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t = reg, uint32_t val) } =20 /* Invalid control registers will generate an exception. */ - raise_exception_ra(env, EXCP_ILLEGAL, 0); + cpu_loop_exit_excp(env_cpu(env), EXCP_ILLEGAL, 0); } =20 uint32_t HELPER(m68k_movec_from)(CPUM68KState *env, uint32_t reg) @@ -394,7 +386,7 @@ uint32_t HELPER(m68k_movec_from)(CPUM68KState *env, uin= t32_t reg) } =20 /* Invalid control registers will generate an exception. */ - raise_exception_ra(env, EXCP_ILLEGAL, 0); + cpu_loop_exit_excp(env_cpu(env), EXCP_ILLEGAL, 0); =20 return 0; } diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 0bda8f8152d..a6ca811ebe2 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -111,7 +111,6 @@ DEF_HELPER_3(set_mac_extu, void, env, i32, i32) DEF_HELPER_2(flush_flags, void, env, i32) DEF_HELPER_2(set_ccr, void, env, i32) DEF_HELPER_FLAGS_1(get_ccr, TCG_CALL_NO_WG_SE, i32, env) -DEF_HELPER_2(raise_exception, noreturn, env, i32) =20 DEF_HELPER_FLAGS_3(bfffo_reg, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32) =20 diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 38f7a689814..5f539f8fd75 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -539,25 +539,6 @@ bool m68k_cpu_exec_interrupt(CPUState *cs, int interru= pt_request) =20 #endif /* !CONFIG_USER_ONLY */ =20 -G_NORETURN static void -raise_exception_ra(CPUM68KState *env, int tt, uintptr_t raddr) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D tt; - cpu_loop_exit_restore(cs, raddr); -} - -G_NORETURN static void raise_exception(CPUM68KState *env, int tt) -{ - raise_exception_ra(env, tt, 0); -} - -void HELPER(raise_exception)(CPUM68KState *env, uint32_t tt) -{ - raise_exception(env, tt); -} - G_NORETURN static void raise_exception_format2(CPUM68KState *env, int tt, int ilen, uintptr_t rad= dr) { diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 138c89d3e53..15f368afd54 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -252,7 +252,7 @@ static void gen_jmp(DisasContext *s, TCGv dest) =20 static void gen_raise_exception(int nr) { - gen_helper_raise_exception(tcg_env, tcg_constant_i32(nr)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(nr), tcg_constant_i32(= 0)); } =20 static void gen_raise_exception_format2(DisasContext *s, int nr, --=20 2.52.0.windows.1 From nobody Sat Sep 26 20:52:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 17 Sep 2026 17:43:38 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 07/21] target/or1k: convert exception to raise_excp Date: Fri, 18 Sep 2026 08:42:09 +0800 Message-ID: <20260918004225.827-8-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::10; envelope-from=luoyonggang@gmail.com; helo=mail-pj2-x10.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692312735158500 Content-Type: text/plain; charset="utf-8" Translate through gen_helper_raise_excp with restore 0. Drop TCG exception helper and exception.c. Keep C raise_exception as a static inline in exception.h. Exit RANGE overflow through cpu_loop_exit_excp. Signed-off-by: Yonggang Luo --- target/or1k/exception.c | 31 ------------------------------- target/or1k/exception.h | 7 ++++++- target/or1k/exception_helper.c | 13 +------------ target/or1k/helper.h | 1 - target/or1k/meson.build | 1 - target/or1k/translate.c | 2 +- 6 files changed, 8 insertions(+), 47 deletions(-) delete mode 100644 target/or1k/exception.c diff --git a/target/or1k/exception.c b/target/or1k/exception.c deleted file mode 100644 index 0479a069592..00000000000 --- a/target/or1k/exception.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * OpenRISC exception. - * - * Copyright (c) 2011-2012 Jia Liu - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see . - */ - -#include "qemu/osdep.h" -#include "accel/tcg/cpu-loop.h" -#include "cpu.h" -#include "exception.h" - -G_NORETURN void raise_exception(OpenRISCCPU *cpu, uint32_t excp) -{ - CPUState *cs =3D CPU(cpu); - - cs->exception_index =3D excp; - cpu_loop_exit(cs); -} diff --git a/target/or1k/exception.h b/target/or1k/exception.h index f62fc314c1f..a49a6c90f0d 100644 --- a/target/or1k/exception.h +++ b/target/or1k/exception.h @@ -21,7 +21,12 @@ #define TARGET_OPENRISC_EXCEPTION_H =20 #include "cpu.h" +#include "accel/tcg/cpu-loop.h" =20 -G_NORETURN void raise_exception(OpenRISCCPU *cpu, uint32_t excp); +static inline G_NORETURN +void raise_exception(OpenRISCCPU *cpu, uint32_t excp) +{ + cpu_loop_exit_excp(CPU(cpu), excp, 0); +} =20 #endif /* TARGET_OPENRISC_EXCEPTION_H */ diff --git a/target/or1k/exception_helper.c b/target/or1k/exception_helper.c index 3bd82b29719..c9b80093b25 100644 --- a/target/or1k/exception_helper.c +++ b/target/or1k/exception_helper.c @@ -21,22 +21,11 @@ #include "cpu.h" #include "accel/tcg/cpu-loop.h" #include "exec/helper-proto.h" -#include "exception.h" - -void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp) -{ - OpenRISCCPU *cpu =3D env_archcpu(env); - - raise_exception(cpu, excp); -} =20 static G_NORETURN void do_range(CPUOpenRISCState *env, uintptr_t pc) { - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D EXCP_RANGE; - cpu_loop_exit_restore(cs, pc); + cpu_loop_exit_excp(env_cpu(env), EXCP_RANGE, pc); } =20 void HELPER(ove_cy)(CPUOpenRISCState *env) diff --git a/target/or1k/helper.h b/target/or1k/helper.h index e0a8d402271..d6e6bd4ffbc 100644 --- a/target/or1k/helper.h +++ b/target/or1k/helper.h @@ -18,7 +18,6 @@ */ =20 /* exception */ -DEF_HELPER_FLAGS_2(exception, TCG_CALL_NO_WG, void, env, i32) DEF_HELPER_FLAGS_1(ove_cy, TCG_CALL_NO_WG, void, env) DEF_HELPER_FLAGS_1(ove_ov, TCG_CALL_NO_WG, void, env) DEF_HELPER_FLAGS_1(ove_cyov, TCG_CALL_NO_WG, void, env) diff --git a/target/or1k/meson.build b/target/or1k/meson.build index 7cea45287a2..dba5044b655 100644 --- a/target/or1k/meson.build +++ b/target/or1k/meson.build @@ -5,7 +5,6 @@ or1k_ss.add(gen) or1k_ss.add(files( 'cpu.c', 'disas.c', - 'exception.c', 'exception_helper.c', 'fpu_helper.c', 'interrupt_helper.c', diff --git a/target/or1k/translate.c b/target/or1k/translate.c index eb4485312f2..44b408b56cd 100644 --- a/target/or1k/translate.c +++ b/target/or1k/translate.c @@ -140,7 +140,7 @@ void openrisc_translate_init(void) =20 static void gen_exception(DisasContext *dc, unsigned int excp) { - gen_helper_exception(tcg_env, tcg_constant_i32(excp)); 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Thu, 17 Sep 2026 17:43:47 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 08/21] target/microblaze: convert raise_exception to raise_excp Date: Fri, 18 Sep 2026 08:42:10 +0800 Message-ID: <20260918004225.827-9-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:3b::10; envelope-from=luoyonggang@gmail.com; helo=mail-pz2-x10.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692388987158500 Content-Type: text/plain; charset="utf-8" Translate through gen_helper_raise_excp with restore 0 after syncing PC. Drop TCG raise_exception. Exit HW_EXCP and MMU through cpu_loop_exit_excp. Signed-off-by: Yonggang Luo --- target/microblaze/helper.c | 3 +-- target/microblaze/helper.h | 2 -- target/microblaze/op_helper.c | 22 ++++------------------ target/microblaze/translate.c | 3 ++- 4 files changed, 7 insertions(+), 23 deletions(-) diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index 05a90f5ecb2..d092e916db4 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -146,8 +146,7 @@ bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int s= ize, } =20 /* TLB miss. */ - cs->exception_index =3D EXCP_MMU; - cpu_loop_exit_restore(cs, retaddr); + cpu_loop_exit_excp(cs, EXCP_MMU, retaddr); } =20 void mb_cpu_do_interrupt(CPUState *cs) diff --git a/target/microblaze/helper.h b/target/microblaze/helper.h index 1429c1727ef..ad9c22ed5b7 100644 --- a/target/microblaze/helper.h +++ b/target/microblaze/helper.h @@ -1,5 +1,3 @@ -DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32) - DEF_HELPER_FLAGS_3(divs, TCG_CALL_NO_WG, i32, env, i32, i32) DEF_HELPER_FLAGS_3(divu, TCG_CALL_NO_WG, i32, env, i32, i32) =20 diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c index 3da0c68da39..f3dc42d5bdd 100644 --- a/target/microblaze/op_helper.c +++ b/target/microblaze/op_helper.c @@ -62,25 +62,14 @@ uint32_t helper_get(uint32_t id, uint32_t ctrl) return 0xdead0000 | id; } =20 -void helper_raise_exception(CPUMBState *env, uint32_t index) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D index; - cpu_loop_exit(cs); -} - /* Raises ESR_EC_DIVZERO if exceptions are enabled. */ static void raise_divzero(CPUMBState *env, uint32_t esr, uintptr_t unwind_= pc) { env->msr |=3D MSR_DZ; =20 if ((env->msr & MSR_EE) && env_archcpu(env)->cfg.div_zero_exception) { - CPUState *cs =3D env_cpu(env); - env->esr =3D esr; - cs->exception_index =3D EXCP_HW_EXCP; - cpu_loop_exit_restore(cs, unwind_pc); + cpu_loop_exit_excp(env_cpu(env), EXCP_HW_EXCP, unwind_pc); } } =20 @@ -123,8 +112,7 @@ static void raise_fpu_exception(CPUMBState *env, uintpt= r_t ra) CPUState *cs =3D env_cpu(env); =20 env->esr =3D ESR_EC_FPU; - cs->exception_index =3D EXCP_HW_EXCP; - cpu_loop_exit_restore(cs, ra); + cpu_loop_exit_excp(cs, EXCP_HW_EXCP, ra); } =20 static void update_fpu_flags(CPUMBState *env, int flags, uintptr_t ra) @@ -390,8 +378,7 @@ void helper_stackprot(CPUMBState *env, uint32_t addr) =20 env->ear =3D addr; env->esr =3D ESR_EC_STACKPROT; - cs->exception_index =3D EXCP_HW_EXCP; - cpu_loop_exit_restore(cs, GETPC()); + cpu_loop_exit_excp(cs, EXCP_HW_EXCP, GETPC()); } } =20 @@ -444,8 +431,7 @@ static void mb_transaction_failed_internal(CPUState *cs= , hwaddr physaddr, if (take) { env->esr =3D esr; env->ear =3D addr; - cs->exception_index =3D EXCP_HW_EXCP; - cpu_loop_exit_restore(cs, retaddr); + cpu_loop_exit_excp(cs, EXCP_HW_EXCP, retaddr); } } =20 diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 8b219afb5dd..8893fa0d4fe 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -100,7 +100,8 @@ static void t_sync_flags(DisasContext *dc) =20 static void gen_raise_exception(DisasContext *dc, uint32_t index) { - gen_helper_raise_exception(tcg_env, tcg_constant_i32(index)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(index), + tcg_constant_i32(0)); dc->base.is_jmp =3D DISAS_NORETURN; } =20 --=20 2.52.0.windows.1 From nobody Sat Sep 26 20:52:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 17 Sep 2026 17:43:55 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 09/21] target/sparc: convert raise_exception to raise_excp Date: Fri, 18 Sep 2026 08:42:11 +0800 Message-ID: <20260918004225.827-10-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::e; envelope-from=luoyonggang@gmail.com; helo=mail-pj2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692338806158500 Content-Type: text/plain; charset="utf-8" Translate through gen_helper_raise_excp with restore 0 after save_state. Drop TCG raise_exception. Keep C cpu_raise_exception_ra. Exit DEBUG and HLT through cpu_loop_exit_excp. Signed-off-by: Yonggang Luo --- target/sparc/helper.c | 21 +++------------------ target/sparc/helper.h | 2 -- target/sparc/translate.c | 7 ++++--- 3 files changed, 7 insertions(+), 23 deletions(-) diff --git a/target/sparc/helper.c b/target/sparc/helper.c index 8de261b0e30..411a8dfe359 100644 --- a/target/sparc/helper.c +++ b/target/sparc/helper.c @@ -27,26 +27,12 @@ =20 void cpu_raise_exception_ra(CPUSPARCState *env, int tt, uintptr_t ra) { - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D tt; - cpu_loop_exit_restore(cs, ra); -} - -void helper_raise_exception(CPUSPARCState *env, int tt) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D tt; - cpu_loop_exit(cs); + cpu_loop_exit_excp(env_cpu(env), tt, ra); } =20 void helper_debug(CPUSPARCState *env) { - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D EXCP_DEBUG; - cpu_loop_exit(cs); + cpu_loop_exit_excp(env_cpu(env), EXCP_DEBUG, 0); } =20 #ifdef TARGET_SPARC64 @@ -208,10 +194,9 @@ void helper_power_down(CPUSPARCState *env) CPUState *cs =3D env_cpu(env); =20 cs->halted =3D 1; - cs->exception_index =3D EXCP_HLT; env->pc =3D env->npc; env->npc =3D env->pc + 4; - cpu_loop_exit(cs); + cpu_loop_exit_excp(cs, EXCP_HLT, 0); } =20 target_ulong helper_rdasr17(CPUSPARCState *env) diff --git a/target/sparc/helper.h b/target/sparc/helper.h index 3a7f7dc1296..9fc38f5706a 100644 --- a/target/sparc/helper.h +++ b/target/sparc/helper.h @@ -53,8 +53,6 @@ DEF_HELPER_FLAGS_3(fcmpq, TCG_CALL_NO_WG, i32, env, i128,= i128) DEF_HELPER_FLAGS_3(fcmpeq, TCG_CALL_NO_WG, i32, env, i128, i128) DEF_HELPER_FLAGS_3(flcmps, TCG_CALL_NO_RWG_SE, i32, env, f32, f32) DEF_HELPER_FLAGS_3(flcmpd, TCG_CALL_NO_RWG_SE, i32, env, f64, f64) -DEF_HELPER_2(raise_exception, noreturn, env, int) - DEF_HELPER_FLAGS_3(faddd, TCG_CALL_NO_WG, f64, env, f64, f64) DEF_HELPER_FLAGS_3(fsubd, TCG_CALL_NO_WG, f64, env, f64, f64) DEF_HELPER_FLAGS_3(fmuld, TCG_CALL_NO_WG, f64, env, f64, f64) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 3156be6a94c..8b22b8e54db 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -1048,7 +1048,8 @@ static void gen_exception(DisasContext *dc, int which) { finishing_insn(dc); save_state(dc); - gen_helper_raise_exception(tcg_env, tcg_constant_i32(which)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(which), + tcg_constant_i32(0)); dc->base.is_jmp =3D DISAS_NORETURN; } =20 @@ -2811,7 +2812,7 @@ static bool do_tcc(DisasContext *dc, int cond, int cc, /* Trap always. */ if (cond =3D=3D 8) { save_state(dc); - gen_helper_raise_exception(tcg_env, trap); + gen_helper_raise_excp(tcg_env, trap, tcg_constant_i32(0)); dc->base.is_jmp =3D DISAS_NORETURN; return true; } @@ -5833,7 +5834,7 @@ static void sparc_tr_tb_stop(DisasContextBase *dcbase= , CPUState *cs) if (e->npc % 4 =3D=3D 0) { tcg_gen_movi_tl(cpu_npc, e->npc); } - gen_helper_raise_exception(tcg_env, e->excp); + gen_helper_raise_excp(tcg_env, e->excp, tcg_constant_i32(0)); =20 e_next =3D e->next; g_free(e); --=20 2.52.0.windows.1 From nobody Sat Sep 26 20:52:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 17 Sep 2026 17:44:04 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 10/21] target/loongarch: convert raise_exception to raise_excp Date: Fri, 18 Sep 2026 08:42:12 +0800 Message-ID: <20260918004225.827-11-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:3b::e; envelope-from=luoyonggang@gmail.com; helo=mail-pz2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692421135158500 Content-Type: text/plain; charset="utf-8" Translate through gen_helper_raise_excp with restore 1 after storing PC. Drop TCG raise_exception. Keep C do_raise_exception and use cpu_loop_exit_excp. Signed-off-by: Yonggang Luo --- target/loongarch/tcg/helper.h | 2 -- target/loongarch/tcg/op_helper.c | 6 ------ target/loongarch/tcg/tcg_cpu.c | 4 +--- target/loongarch/tcg/translate.c | 3 ++- 4 files changed, 3 insertions(+), 12 deletions(-) diff --git a/target/loongarch/tcg/helper.h b/target/loongarch/tcg/helper.h index e76c73c7755..e3a7bc9e9da 100644 --- a/target/loongarch/tcg/helper.h +++ b/target/loongarch/tcg/helper.h @@ -3,8 +3,6 @@ * Copyright (c) 2021 Loongson Technology Corporation Limited */ =20 -DEF_HELPER_2(raise_exception, noreturn, env, i32) - DEF_HELPER_FLAGS_3(asrtle_d, TCG_CALL_NO_WG, void, env, tl, tl) DEF_HELPER_FLAGS_3(asrtgt_d, TCG_CALL_NO_WG, void, env, tl, tl) =20 diff --git a/target/loongarch/tcg/op_helper.c b/target/loongarch/tcg/op_hel= per.c index f41f0cb1e6e..36719617b85 100644 --- a/target/loongarch/tcg/op_helper.c +++ b/target/loongarch/tcg/op_helper.c @@ -16,12 +16,6 @@ #include /* for crc32 */ #include "cpu-csr.h" =20 -/* Exceptions helpers */ -void helper_raise_exception(CPULoongArchState *env, uint32_t exception) -{ - do_raise_exception(env, exception, GETPC()); -} - /* loongarch assert op */ void helper_asrtle_d(CPULoongArchState *env, target_ulong rj, target_ulong= rk) { diff --git a/target/loongarch/tcg/tcg_cpu.c b/target/loongarch/tcg/tcg_cpu.c index 4b1d44a1644..56ef0d912cc 100644 --- a/target/loongarch/tcg/tcg_cpu.c +++ b/target/loongarch/tcg/tcg_cpu.c @@ -69,9 +69,7 @@ void G_NORETURN do_raise_exception(CPULoongArchState *env, __func__, exception, loongarch_exception_name(exception)); - cs->exception_index =3D exception; - - cpu_loop_exit_restore(cs, pc); + cpu_loop_exit_excp(cs, exception, pc); } =20 #ifndef CONFIG_USER_ONLY diff --git a/target/loongarch/tcg/translate.c b/target/loongarch/tcg/transl= ate.c index 124dce62695..ddadfb84285 100644 --- a/target/loongarch/tcg/translate.c +++ b/target/loongarch/tcg/translate.c @@ -95,7 +95,8 @@ static void gen_nanbox_s(TCGv_i64 out, TCGv_i64 in) void generate_exception(DisasContext *ctx, int excp) { tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); - gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp)); 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Thu, 17 Sep 2026 17:44:12 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 11/21] target/hexagon: convert raise_exception to hexagon_raise_exception Date: Fri, 18 Sep 2026 08:42:13 +0800 Message-ID: <20260918004225.827-12-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::11; envelope-from=luoyonggang@gmail.com; helo=mail-pj2-x11.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692403140158500 Content-Type: text/plain; charset="utf-8" Fold C do_raise_exception into hexagon_raise_exception_err with vaddr pc and a retaddr parameter, and exit via cpu_loop_exit_excp. Prefix leftover TCG raise_exception to hexagon_raise_exception so translate keeps the CPU_LOG_INT log and ASSERT_DIRECT_TO_GUEST_UNSET. Prefix leftover TCG wait to hexagon_wait with vaddr pc. Signed-off-by: Yonggang Luo Reviewed-by: Brian Cain --- target/hexagon/cpu.c | 13 +++++++------ target/hexagon/cpu.h | 2 +- target/hexagon/gen_tcg_sys.h | 2 +- target/hexagon/helper.h | 5 +++-- target/hexagon/internal.h | 5 ----- target/hexagon/macros.h | 2 +- target/hexagon/op_helper.c | 37 +++++++++++++++--------------------- target/hexagon/translate.c | 11 ++++++----- 8 files changed, 34 insertions(+), 43 deletions(-) diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index fad526ccfb5..0d2441b1671 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -333,7 +333,7 @@ static TCGTBCPUState hexagon_get_tb_cpu_state(CPUState = *cs) } if (pc & PCALIGN_MASK) { env->cause_code =3D HEX_CAUSE_PC_NOT_ALIGNED; - hexagon_raise_exception_err(env, HEX_EVENT_PRECISE, pc); + hexagon_raise_exception_err(env, HEX_EVENT_PRECISE, pc, 0); } =20 #ifndef CONFIG_USER_ONLY @@ -711,14 +711,15 @@ static bool hexagon_tlb_fill(CPUState *cs, vaddr addr= ess, int size, return false; } raise_perm_exception(cs, address, slot, access_type, excp); - do_raise_exception(env, cs->exception_index, env->gpr[HEX_REG_PC], - retaddr); + hexagon_raise_exception_err(env, cs->exception_index, + env->gpr[HEX_REG_PC], retaddr); } if (probe) { return false; } raise_tlbmiss_exception(cs, address, slot, access_type); - do_raise_exception(env, cs->exception_index, env->gpr[HEX_REG_PC], ret= addr); + hexagon_raise_exception_err(env, cs->exception_index, + env->gpr[HEX_REG_PC], retaddr); } =20 #include "hw/core/sysemu-cpu-ops.h" @@ -761,8 +762,8 @@ void hexagon_cpu_do_unaligned_access(CPUState *cs, vadd= r addr, CPUHexagonState *env =3D cpu_env(cs); =20 raise_misaligned_exception(cs, addr, 0, access_type); - do_raise_exception(env, cs->exception_index, env->gpr[HEX_REG_PC], - retaddr); + hexagon_raise_exception_err(env, cs->exception_index, + env->gpr[HEX_REG_PC], retaddr); } =20 #endif diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index b1533680bd7..e79d8000304 100644 --- a/target/hexagon/cpu.h +++ b/target/hexagon/cpu.h @@ -210,7 +210,7 @@ FIELD(TB_FLAGS, PCYCLE_ENABLED, 4, 1) =20 G_NORETURN void hexagon_raise_exception_err(CPUHexagonState *env, uint32_t exception, - uintptr_t pc); + vaddr pc, uintptr_t retaddr); =20 #ifndef CONFIG_USER_ONLY /* diff --git a/target/hexagon/gen_tcg_sys.h b/target/hexagon/gen_tcg_sys.h index af5032214c4..489d2780470 100644 --- a/target/hexagon/gen_tcg_sys.h +++ b/target/hexagon/gen_tcg_sys.h @@ -80,7 +80,7 @@ #define fGEN_TCG_Y2_wait(SHORTCODE) \ do { \ RsV =3D RsV; \ - gen_helper_wait(tcg_env, tcg_constant_tl(ctx->pkt.pc)); \ + gen_helper_hexagon_wait(tcg_env, tcg_constant_vaddr(ctx->pkt.pc));= \ } while (0) =20 #define fGEN_TCG_Y2_resume(SHORTCODE) \ diff --git a/target/hexagon/helper.h b/target/hexagon/helper.h index 71c8da4c46d..cf1b977f33c 100644 --- a/target/hexagon/helper.h +++ b/target/hexagon/helper.h @@ -18,7 +18,8 @@ #include "internal.h" #include "helper_protos_generated.h.inc" =20 -DEF_HELPER_FLAGS_3(raise_exception, TCG_CALL_NO_RETURN, noreturn, env, i32= , i32) +DEF_HELPER_FLAGS_3(hexagon_raise_exception, TCG_CALL_NO_RETURN, noreturn, + env, i32, vaddr) DEF_HELPER_2(commit_store, void, env, int) DEF_HELPER_3(gather_store, void, env, i32, int) DEF_HELPER_1(commit_hvx_stores, void, env) @@ -136,7 +137,7 @@ DEF_HELPER_3(sreg_write_masked, void, env, i32, i32) DEF_HELPER_3(setprio, void, env, i32, i32) DEF_HELPER_2(start, void, env, i32) DEF_HELPER_1(stop, void, env) -DEF_HELPER_2(wait, void, env, i32) +DEF_HELPER_2(hexagon_wait, void, env, vaddr) DEF_HELPER_2(resume, void, env, i32) DEF_HELPER_1(resched, void, env) DEF_HELPER_3(modify_ssr, void, env, i32, i32) diff --git a/target/hexagon/internal.h b/target/hexagon/internal.h index 05d1129916e..4b7a784fbc7 100644 --- a/target/hexagon/internal.h +++ b/target/hexagon/internal.h @@ -36,11 +36,6 @@ extern const char * const hexagon_sregnames[]; extern const char * const hexagon_gregnames[]; #endif =20 -void G_NORETURN do_raise_exception(CPUHexagonState *env, - uint32_t exception, - uint32_t PC, - uintptr_t retaddr); - #define hexagon_cpu_mmu_enabled(env) ({ \ HexagonCPU *cpu =3D env_archcpu(env); \ cpu->globalregs ? \ diff --git a/target/hexagon/macros.h b/target/hexagon/macros.h index a5b9c24c6bb..4a87f6d72f1 100644 --- a/target/hexagon/macros.h +++ b/target/hexagon/macros.h @@ -637,7 +637,7 @@ static inline TCGv gen_read_ireg(TCGv result, TCGv val,= int shift) #ifdef CONFIG_USER_ONLY #define fTRAP(TRAPTYPE, IMM) \ do { \ - hexagon_raise_exception_err(env, HEX_EVENT_TRAP0, PC); \ + hexagon_raise_exception_err(env, HEX_EVENT_TRAP0, PC, 0); \ } while (0) #endif =20 diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c index 0d08ac77361..715dfd3ce13 100644 --- a/target/hexagon/op_helper.c +++ b/target/hexagon/op_helper.c @@ -72,31 +72,24 @@ uint64_t HELPER(utimer)(void) #define SF_MANTBITS 23 =20 /* Exceptions processing helpers */ -G_NORETURN -void do_raise_exception(CPUHexagonState *env, uint32_t exception, - uint32_t PC, uintptr_t retaddr) +G_NORETURN void hexagon_raise_exception_err(CPUHexagonState *env, + uint32_t exception, + vaddr pc, uintptr_t retaddr) { CPUState *cs =3D env_cpu(env); - qemu_log_mask(CPU_LOG_INT, "%s: 0x%08" PRIx32 ", @ %08" PRIx32 "\n", - __func__, exception, PC); + qemu_log_mask(CPU_LOG_INT, "%s: 0x%08" PRIx32 ", @ %08" VADDR_PRIx "\n= ", + __func__, exception, pc); ASSERT_DIRECT_TO_GUEST_UNSET(env, exception); =20 - env->gpr[HEX_REG_PC] =3D PC; - cs->exception_index =3D exception; - cpu_loop_exit_restore(cs, retaddr); -} - -G_NORETURN void hexagon_raise_exception_err(CPUHexagonState *env, - uint32_t exception, - uintptr_t pc) -{ - do_raise_exception(env, exception, pc, 0); + env->gpr[HEX_REG_PC] =3D pc; + cpu_loop_exit_excp(cs, exception, retaddr); } =20 -G_NORETURN void HELPER(raise_exception)(CPUHexagonState *env, uint32_t exc= p, - uint32_t PC) +G_NORETURN void HELPER(hexagon_raise_exception)(CPUHexagonState *env, + uint32_t exception, + vaddr pc) { - hexagon_raise_exception_err(env, excp, PC); + hexagon_raise_exception_err(env, exception, pc, 0); } =20 void log_store32(CPUHexagonState *env, target_ulong addr, @@ -1733,7 +1726,7 @@ static void set_wait_mode(CPUHexagonState *env) SET_SYSTEM_FIELD(env, HEX_SREG_MODECTL, MODECTL_W, thread_wait_mask); } =20 -static void hexagon_wait_thread(CPUHexagonState *env, uint32_t PC) +static void hexagon_wait_thread(CPUHexagonState *env, vaddr pc) { CPUState *cs; =20 @@ -1760,7 +1753,7 @@ static void hexagon_wait_thread(CPUHexagonState *env,= uint32_t PC) return; } set_wait_mode(env); - env->wait_next_pc =3D PC + 4; + env->wait_next_pc =3D pc + 4; =20 cpu_interrupt(cs, CPU_INTERRUPT_HALT); } @@ -1828,12 +1821,12 @@ void HELPER(resched)(CPUHexagonState *env) resched(env); } =20 -void HELPER(wait)(CPUHexagonState *env, uint32_t PC) +void HELPER(hexagon_wait)(CPUHexagonState *env, vaddr pc) { BQL_LOCK_GUARD(); =20 if (!fIN_DEBUG_MODE(env->threadId)) { - hexagon_wait_thread(env, PC); + hexagon_wait_thread(env, pc); } } =20 diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index fd1de87405c..2774a01a47c 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -129,11 +129,12 @@ intptr_t ctx_tmp_vreg_off(DisasContext *ctx, int regn= um, return offset; } =20 -static void gen_precise_exception(int cause, uint32_t PC) +static void gen_precise_exception(int cause, vaddr pc) { tcg_gen_movi_i32(hex_cause_code, cause); - gen_helper_raise_exception(tcg_env, tcg_constant_i32(HEX_EVENT_PRECISE= ), - tcg_constant_i32(PC)); + gen_helper_hexagon_raise_exception(tcg_env, + tcg_constant_i32(HEX_EVENT_PRECISE), + tcg_constant_vaddr(pc)); } =20 #ifndef CONFIG_USER_ONLY @@ -1071,11 +1072,11 @@ static void update_exec_counters(DisasContext *ctx) */ static void check_imprecise_exception(DisasContext *ctx) { - TCGv PC =3D tcg_constant_tl(ctx->pkt.pc); TCGLabel *label =3D gen_new_label(); =20 tcg_gen_brcondi_tl(TCG_COND_EQ, hex_imprecise_exception, 0, label); - gen_helper_raise_exception(tcg_env, hex_imprecise_exception, PC); + gen_helper_hexagon_raise_exception(tcg_env, hex_imprecise_exception, + tcg_constant_vaddr(ctx->pkt.pc)); gen_set_label(label); } #endif --=20 2.52.0.windows.1 From nobody Sat Sep 26 20:52:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 17 Sep 2026 17:44:21 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 12/21] target/hppa: convert excp to raise_excp Date: Fri, 18 Sep 2026 08:42:14 +0800 Message-ID: <20260918004225.827-13-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::d; envelope-from=luoyonggang@gmail.com; helo=mail-pj2-x0d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692312786158500 Content-Type: text/plain; charset="utf-8" Drop TCG excp and call gen_helper_raise_excp with restore 0. Keep C hppa_dynamic_excp and use cpu_loop_exit_excp. Route leftover C callers through hppa_dynamic_excp instead of helper_excp. Signed-off-by: Yonggang Luo --- target/hppa/helper.h | 2 -- target/hppa/op_helper.c | 15 ++------------- target/hppa/sys_helper.c | 4 ++-- target/hppa/translate.c | 3 ++- 4 files changed, 6 insertions(+), 18 deletions(-) diff --git a/target/hppa/helper.h b/target/hppa/helper.h index 8369855d78e..5ed39e01e31 100644 --- a/target/hppa/helper.h +++ b/target/hppa/helper.h @@ -1,5 +1,3 @@ -DEF_HELPER_2(excp, noreturn, env, int) - DEF_HELPER_FLAGS_3(stby_b, TCG_CALL_NO_WG, void, env, tl, tl) DEF_HELPER_FLAGS_3(stby_b_parallel, TCG_CALL_NO_WG, void, env, tl, tl) DEF_HELPER_FLAGS_3(stby_e, TCG_CALL_NO_WG, void, env, tl, tl) diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index 76a8d8a0d34..c4651f0d85a 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -30,20 +30,9 @@ #include "user/page-protection.h" #endif =20 -G_NORETURN void HELPER(excp)(CPUHPPAState *env, int excp) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D excp; - cpu_loop_exit(cs); -} - G_NORETURN void hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t r= a) { - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D excp; - cpu_loop_exit_restore(cs, ra); + cpu_loop_exit_excp(env_cpu(env), excp, ra); } =20 static void atomic_store_mask32(CPUHPPAState *env, target_ulong addr, @@ -341,7 +330,7 @@ target_ulong HELPER(probe)(CPUHPPAState *env, target_ul= ong addr, if (excp =3D=3D EXCP_DTLB_MISS) { excp =3D EXCP_NA_DTLB_MISS; } - helper_excp(env, excp); + hppa_dynamic_excp(env, excp, 0); } return (want & prot) !=3D 0; #endif diff --git a/target/hppa/sys_helper.c b/target/hppa/sys_helper.c index 88109f0181a..dd3be1bfc90 100644 --- a/target/hppa/sys_helper.c +++ b/target/hppa/sys_helper.c @@ -51,13 +51,13 @@ void HELPER(write_interval_timer)(CPUHPPAState *env, ta= rget_ulong val) void HELPER(halt)(CPUHPPAState *env) { qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); - helper_excp(env, EXCP_HLT); + hppa_dynamic_excp(env, EXCP_HLT, 0); } =20 void HELPER(reset)(CPUHPPAState *env) { qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); - helper_excp(env, EXCP_HLT); + hppa_dynamic_excp(env, EXCP_HLT, 0); } =20 target_ulong HELPER(swap_system_mask)(CPUHPPAState *env, target_ulong nsm) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 002189ddfbd..6221c98fbf7 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -726,7 +726,8 @@ static void install_link(DisasContext *ctx, unsigned li= nk, bool with_sr0) =20 static void gen_excp_1(int exception) { - gen_helper_excp(tcg_env, tcg_constant_i32(exception)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(exception), + tcg_constant_i32(0)); } =20 static void gen_excp(DisasContext *ctx, int exception) --=20 2.52.0.windows.1 From nobody Sat Sep 26 20:52:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1789692412; cv=none; d=zohomail.com; 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Thu, 17 Sep 2026 17:44:30 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 13/21] target/alpha: convert excp to raise_excp Date: Fri, 18 Sep 2026 08:42:15 +0800 Message-ID: <20260918004225.827-14-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:3b::d; envelope-from=luoyonggang@gmail.com; helo=mail-pz2-x0d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692413101158500 Content-Type: text/plain; charset="utf-8" Store error_code in translate, then call gen_helper_raise_excp with restore 0. Drop TCG excp. Keep C dynamic_excp and arith_excp. Signed-off-by: Yonggang Luo --- target/alpha/helper.c | 11 ----------- target/alpha/helper.h | 1 - target/alpha/translate.c | 9 ++++----- 3 files changed, 4 insertions(+), 17 deletions(-) diff --git a/target/alpha/helper.c b/target/alpha/helper.c index c3614ecafda..d1497547181 100644 --- a/target/alpha/helper.c +++ b/target/alpha/helper.c @@ -533,17 +533,6 @@ void alpha_cpu_dump_state(CPUState *cs, FILE *f, int f= lags) qemu_fprintf(f, "\n"); } =20 -/* This should only be called from translate, via gen_excp. - We expect that ENV->PC has already been updated. */ -G_NORETURN void helper_excp(CPUAlphaState *env, int excp, int error) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D excp; - env->error_code =3D error; - cpu_loop_exit(cs); -} - /* This may be called from any of the helpers to set up EXCEPTION_INDEX. = */ G_NORETURN void dynamic_excp(CPUAlphaState *env, uintptr_t retaddr, int excp, int error) diff --git a/target/alpha/helper.h b/target/alpha/helper.h index 954a5c8294c..cdb36384a7b 100644 --- a/target/alpha/helper.h +++ b/target/alpha/helper.h @@ -1,4 +1,3 @@ -DEF_HELPER_3(excp, noreturn, env, int, int) DEF_HELPER_FLAGS_1(load_pcc, TCG_CALL_NO_RWG_SE, i64, env) =20 DEF_HELPER_FLAGS_3(check_overflow, TCG_CALL_NO_WG, void, env, i64, i64) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index c66e3f9c146..b9970f4aa5b 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -264,11 +264,10 @@ static void gen_pc_disp(DisasContext *ctx, TCGv_i64 d= est, int32_t disp) =20 static void gen_excp_1(int exception, int error_code) { - TCGv_i32 tmp1, tmp2; - - tmp1 =3D tcg_constant_i32(exception); - tmp2 =3D tcg_constant_i32(error_code); - gen_helper_excp(tcg_env, tmp1, tmp2); + tcg_gen_st_i32(tcg_constant_i32(error_code), tcg_env, + offsetof(CPUAlphaState, error_code)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(exception), + tcg_constant_i32(0)); } =20 static DisasJumpType gen_excp(DisasContext *ctx, int exception, int error_= code) --=20 2.52.0.windows.1 From nobody Sat Sep 26 20:52:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1789692374; cv=none; d=zohomail.com; s=zohoarc; b=MAPhc1FNCqbB8NOPdmK4gPrZm8hrTw+6GJvNlDwSIw4EorCkdDPJ05yL/55iqnKbdyUDu1glhyGo6UrxDANMOT/cgSI2+TRnLmefyQaZLb6vqeVpyddRpSVka6h0HvvUP/JSOmxHal+AzyPXKyPXCsVgTUg3Hr27mQLUtkRX7dI= ARC-Message-Signature: i=1; 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Thu, 17 Sep 2026 17:44:38 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 14/21] target/s390x: convert exception to raise_excp Date: Fri, 18 Sep 2026 08:42:16 +0800 Message-ID: <20260918004225.827-15-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::11; envelope-from=luoyonggang@gmail.com; helo=mail-pj2-x11.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692376971158500 Content-Type: text/plain; charset="utf-8" Drop TCG exception and call gen_helper_raise_excp with restore 0. Keep data_exception. Route leftover C SVC execute through cpu_loop_exit_excp. Signed-off-by: Yonggang Luo --- target/s390x/helper.h | 1 - target/s390x/tcg/mem_helper.c | 2 +- target/s390x/tcg/misc_helper.c | 10 ---------- target/s390x/tcg/translate.c | 2 +- 4 files changed, 2 insertions(+), 13 deletions(-) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 6a7426fdac7..ec27ef104f2 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -1,4 +1,3 @@ -DEF_HELPER_2(exception, noreturn, env, i32) DEF_HELPER_2(data_exception, noreturn, env, i32) DEF_HELPER_FLAGS_4(nc, TCG_CALL_NO_WG, i32, env, i32, i64, i64) DEF_HELPER_FLAGS_4(oc, TCG_CALL_NO_WG, i32, env, i32, i64, i64) diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index 414e6838c87..3f754dac00f 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -2488,7 +2488,7 @@ void HELPER(ex)(CPUS390XState *env, uint32_t ilen, ui= nt64_t r1, uint64_t addr) } else if (opc =3D=3D 0x0a) { env->int_svc_code =3D extract64(insn, 48, 8); env->int_svc_ilen =3D ilen; - helper_exception(env, EXCP_SVC); + cpu_loop_exit_excp(env_cpu(env), EXCP_SVC, 0); g_assert_not_reached(); } =20 diff --git a/target/s390x/tcg/misc_helper.c b/target/s390x/tcg/misc_helper.c index f1c8563af00..f5e31419268 100644 --- a/target/s390x/tcg/misc_helper.c +++ b/target/s390x/tcg/misc_helper.c @@ -56,16 +56,6 @@ #define HELPER_LOG(x...) #endif =20 -/* Raise an exception statically from a TB. */ -void HELPER(exception)(CPUS390XState *env, uint32_t excp) -{ - CPUState *cs =3D env_cpu(env); - - HELPER_LOG("%s: exception %d\n", __func__, excp); - cs->exception_index =3D excp; - cpu_loop_exit(cs); -} - /* Store CPU Timer (also used for EXTRACT CPU TIME) */ uint64_t HELPER(stpt)(CPUS390XState *env) { diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 1b6023168bb..2107ecfbdc9 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -400,7 +400,7 @@ static int get_mem_index(DisasContext *s) =20 static void gen_exception(int excp) { - gen_helper_exception(tcg_env, tcg_constant_i32(excp)); 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Thu, 17 Sep 2026 17:44:47 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 15/21] target/xtensa: convert exception to raise_excp Date: Fri, 18 Sep 2026 08:42:17 +0800 Message-ID: <20260918004225.827-16-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:3b::e; envelope-from=luoyonggang@gmail.com; helo=mail-pz2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692381024158500 Content-Type: text/plain; charset="utf-8" Store yield_needed =3D 0 when raising YIELD, then call gen_helper_raise_excp with restore 0. Drop TCG exception. Keep exception_cause helpers. C callers use xtensa_exception for the old helper_exception body. Signed-off-by: Yonggang Luo --- target/xtensa/cpu.h | 1 + target/xtensa/exc_helper.c | 13 +++++-------- target/xtensa/helper.h | 1 - target/xtensa/translate.c | 7 ++++++- target/xtensa/win_helper.c | 12 ++++++------ 5 files changed, 18 insertions(+), 16 deletions(-) diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 49d6ad9083d..0b2cb5a250d 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -601,6 +601,7 @@ int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_= t *buf, int reg); G_NORETURN void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, MMUAccessType access_type, = int mmu_idx, uintptr_t retaddr); +G_NORETURN void xtensa_exception(CPUXtensaState *env, uint32_t excp); =20 #define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU =20 diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c index 7cb67d179a8..3049432f4c4 100644 --- a/target/xtensa/exc_helper.c +++ b/target/xtensa/exc_helper.c @@ -35,15 +35,12 @@ #include "qemu/atomic.h" #include "qemu/plugin.h" =20 -void HELPER(exception)(CPUXtensaState *env, uint32_t excp) +void xtensa_exception(CPUXtensaState *env, uint32_t excp) { - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D excp; if (excp =3D=3D EXCP_YIELD) { env->yield_needed =3D 0; } - cpu_loop_exit(cs); + cpu_loop_exit_excp(env_cpu(env), excp, 0); } =20 void HELPER(exception_cause)(CPUXtensaState *env, uint32_t pc, uint32_t ca= use) @@ -66,7 +63,7 @@ void HELPER(exception_cause)(CPUXtensaState *env, uint32_= t pc, uint32_t cause) env->sregs[EXCCAUSE] =3D cause; env->sregs[PS] |=3D PS_EXCM; =20 - HELPER(exception)(env, vector); + xtensa_exception(env, vector); } =20 void HELPER(exception_cause_vaddr)(CPUXtensaState *env, @@ -93,7 +90,7 @@ void HELPER(debug_exception)(CPUXtensaState *env, uint32_= t pc, uint32_t cause) env->sregs[EPS2 + level - 2] =3D env->sregs[PS]; env->sregs[PS] =3D (env->sregs[PS] & ~PS_INTLEVEL) | PS_EXCM | (level << PS_INTLEVEL_SHIFT); - HELPER(exception)(env, EXC_DEBUG); + xtensa_exception(env, EXC_DEBUG); } =20 #ifndef CONFIG_USER_ONLY @@ -116,7 +113,7 @@ void HELPER(waiti)(CPUXtensaState *env, uint32_t pc, ui= nt32_t intlevel) } =20 cpu->halted =3D 1; - HELPER(exception)(env, EXCP_HLT); + xtensa_exception(env, EXCP_HLT); } =20 void HELPER(check_interrupts)(CPUXtensaState *env) diff --git a/target/xtensa/helper.h b/target/xtensa/helper.h index ae938ceedb8..4640d0da59a 100644 --- a/target/xtensa/helper.h +++ b/target/xtensa/helper.h @@ -1,4 +1,3 @@ -DEF_HELPER_2(exception, noreturn, env, i32) DEF_HELPER_3(exception_cause, noreturn, env, i32, i32) DEF_HELPER_4(exception_cause_vaddr, noreturn, env, i32, i32, i32) DEF_HELPER_3(debug_exception, noreturn, env, i32, i32) diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 175fd4b5cfc..58fbe8496aa 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -305,7 +305,12 @@ static void gen_left_shift_sar(DisasContext *dc, TCGv_= i32 sa) =20 static void gen_exception(DisasContext *dc, int excp) { - gen_helper_exception(tcg_env, tcg_constant_i32(excp)); + if (excp =3D=3D EXCP_YIELD) { + tcg_gen_st_i32(tcg_constant_i32(0), tcg_env, + offsetof(CPUXtensaState, yield_needed)); + } + gen_helper_raise_excp(tcg_env, tcg_constant_i32(excp), + tcg_constant_i32(0)); } =20 static void gen_exception_cause(DisasContext *dc, uint32_t cause) diff --git a/target/xtensa/win_helper.c b/target/xtensa/win_helper.c index 4b25f8f4de7..3e4d7c0f768 100644 --- a/target/xtensa/win_helper.c +++ b/target/xtensa/win_helper.c @@ -125,13 +125,13 @@ void HELPER(window_check)(CPUXtensaState *env, uint32= _t pc, uint32_t w) =20 switch (ctz32(windowstart >> n)) { case 0: - HELPER(exception)(env, EXC_WINDOW_OVERFLOW4); + xtensa_exception(env, EXC_WINDOW_OVERFLOW4); break; case 1: - HELPER(exception)(env, EXC_WINDOW_OVERFLOW8); + xtensa_exception(env, EXC_WINDOW_OVERFLOW8); break; default: - HELPER(exception)(env, EXC_WINDOW_OVERFLOW12); + xtensa_exception(env, EXC_WINDOW_OVERFLOW12); break; } } @@ -174,11 +174,11 @@ void HELPER(test_underflow_retw)(CPUXtensaState *env,= uint32_t pc) env->sregs[EPC1] =3D env->pc =3D pc; =20 if (n =3D=3D 1) { - HELPER(exception)(env, EXC_WINDOW_UNDERFLOW4); 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Thu, 17 Sep 2026 17:44:56 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 16/21] target/avr: convert debug/break/sleep to raise_excp Date: Fri, 18 Sep 2026 08:42:18 +0800 Message-ID: <20260918004225.827-17-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::10; envelope-from=luoyonggang@gmail.com; helo=mail-pj2-x10.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692397013158500 Content-Type: text/plain; charset="utf-8" Replace debug, break, and sleep TCG helpers with gen_helper_raise_excp. Keep unsupported. Signed-off-by: Yonggang Luo --- target/avr/helper.c | 24 ------------------------ target/avr/helper.h | 3 --- target/avr/translate.c | 6 ++++-- 3 files changed, 4 insertions(+), 29 deletions(-) diff --git a/target/avr/helper.c b/target/avr/helper.c index f452c9d9040..ca58a0191fd 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -152,14 +152,6 @@ bool avr_cpu_tlb_fill(CPUState *cs, vaddr address, int= size, * helpers */ =20 -void helper_sleep(CPUAVRState *env) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D EXCP_HLT; - cpu_loop_exit(cs); -} - void helper_unsupported(CPUAVRState *env) { CPUState *cs =3D env_cpu(env); @@ -176,22 +168,6 @@ void helper_unsupported(CPUAVRState *env) cpu_loop_exit(cs); } =20 -void helper_debug(CPUAVRState *env) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D EXCP_DEBUG; - cpu_loop_exit(cs); -} - -void helper_break(CPUAVRState *env) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D EXCP_DEBUG; - cpu_loop_exit(cs); -} - void helper_wdr(CPUAVRState *env) { qemu_log_mask(LOG_UNIMP, "WDG reset (not implemented)\n"); diff --git a/target/avr/helper.h b/target/avr/helper.h index e8d13e925f4..09ce0624915 100644 --- a/target/avr/helper.h +++ b/target/avr/helper.h @@ -19,8 +19,5 @@ */ =20 DEF_HELPER_1(wdr, void, env) -DEF_HELPER_1(debug, noreturn, env) -DEF_HELPER_1(break, noreturn, env) -DEF_HELPER_1(sleep, noreturn, env) DEF_HELPER_1(unsupported, noreturn, env) DEF_HELPER_3(fullwr, void, env, i32, i32) diff --git a/target/avr/translate.c b/target/avr/translate.c index 3c576060970..d259ee90963 100644 --- a/target/avr/translate.c +++ b/target/avr/translate.c @@ -2554,7 +2554,8 @@ static bool trans_BREAK(DisasContext *ctx, arg_BREAK = *a) =20 #ifdef BREAKPOINT_ON_BREAK tcg_gen_movi_tl(cpu_pc, ctx->npc - 1); - gen_helper_debug(tcg_env); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(EXCP_DEBUG), + tcg_constant_i32(0)); ctx->base.is_jmp =3D DISAS_EXIT; #else /* NOP */ @@ -2580,7 +2581,8 @@ static bool trans_NOP(DisasContext *ctx, arg_NOP *a) */ static bool trans_SLEEP(DisasContext *ctx, arg_SLEEP *a) { - gen_helper_sleep(tcg_env); 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Thu, 17 Sep 2026 17:45:06 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 17/21] target/arm: convert exception_internal to raise_excp Date: Fri, 18 Sep 2026 08:42:19 +0800 Message-ID: <20260918004225.827-18-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=luoyonggang@gmail.com; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692369270158500 Content-Type: text/plain; charset="utf-8" Switch gen_exception_internal to gen_helper_raise_excp with restore 0, and drop TCG exception_internal. Keep syndrome helpers. Rename C raise_exception globals to arm_raise_exception*, and keep the short names as static inline wrappers in internals.h. Fold leftover C exits into cpu_loop_exit_excp. Keep arm_raise_exception_ra via restore then arm_raise_exception. Signed-off-by: Yonggang Luo --- target/arm/internals.h | 27 ++++++++++++++++------ target/arm/tcg-stubs.c | 4 ++-- target/arm/tcg/helper-defs.h | 1 - target/arm/tcg/m_helper.c | 3 ++- target/arm/tcg/op_helper.c | 43 +++++++++--------------------------- target/arm/tcg/translate.c | 2 +- 6 files changed, 36 insertions(+), 44 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 1775835ad50..ee8ee766327 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -333,20 +333,33 @@ FIELD(FPMR, LSCALE2, 32, 6) #define M_FAKE_FSR_SFAULT 0xe /* SecureFault INVTRAN, INVEP or AUVIOL */ =20 /** - * raise_exception: Raise the specified exception. + * arm_raise_exception: Raise the specified exception. * Raise a guest exception with the specified value, syndrome register * and target exception level. This should be called from helper functions, * and never returns because we will longjump back up to the CPU main loop. */ -G_NORETURN void raise_exception(CPUARMState *env, uint32_t excp, - uint64_t syndrome, uint32_t target_el); - +G_NORETURN void arm_raise_exception(CPUARMState *env, uint32_t excp, + uint64_t syndrome, uint32_t target_el); /* * Similarly, but also use unwinding to restore cpu state. */ -G_NORETURN void raise_exception_ra(CPUARMState *env, uint32_t excp, - uint64_t syndrome, uint32_t target_el, - uintptr_t ra); +G_NORETURN void arm_raise_exception_ra(CPUARMState *env, uint32_t excp, + uint64_t syndrome, uint32_t target_= el, + uintptr_t ra); + +static inline G_NORETURN +void raise_exception(CPUARMState *env, uint32_t excp, + uint64_t syndrome, uint32_t target_el) +{ + arm_raise_exception(env, excp, syndrome, target_el); +} + +static inline G_NORETURN +void raise_exception_ra(CPUARMState *env, uint32_t excp, uint64_t syndrome, + uint32_t target_el, uintptr_t ra) +{ + arm_raise_exception_ra(env, excp, syndrome, target_el, ra); +} =20 /* * For AArch64, map a given EL to an index in the banked_spsr array. diff --git a/target/arm/tcg-stubs.c b/target/arm/tcg-stubs.c index aeeede80661..7f9f684ed70 100644 --- a/target/arm/tcg-stubs.c +++ b/target/arm/tcg-stubs.c @@ -16,8 +16,8 @@ void write_v7m_exception(CPUARMState *env, uint32_t new_e= xc) g_assert_not_reached(); } =20 -void raise_exception_ra(CPUARMState *env, uint32_t excp, uint64_t syndrome, - uint32_t target_el, uintptr_t ra) +void arm_raise_exception_ra(CPUARMState *env, uint32_t excp, uint64_t synd= rome, + uint32_t target_el, uintptr_t ra) { g_assert_not_reached(); } diff --git a/target/arm/tcg/helper-defs.h b/target/arm/tcg/helper-defs.h index 269ac515065..14ef3120373 100644 --- a/target/arm/tcg/helper-defs.h +++ b/target/arm/tcg/helper-defs.h @@ -45,7 +45,6 @@ DEF_HELPER_FLAGS_2(usad8, TCG_CALL_NO_RWG_SE, i32, i32, i= 32) =20 DEF_HELPER_FLAGS_3(sel_flags, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32) -DEF_HELPER_2(exception_internal, noreturn, env, i32) DEF_HELPER_3(exception_with_syndrome, noreturn, env, i32, i32) DEF_HELPER_4(exception_with_syndrome_el, noreturn, env, i32, i32, i32) DEF_HELPER_2(exception_bkpt_insn, noreturn, env, i32) diff --git a/target/arm/tcg/m_helper.c b/target/arm/tcg/m_helper.c index 33c9e7c55bc..161c5460217 100644 --- a/target/arm/tcg/m_helper.c +++ b/target/arm/tcg/m_helper.c @@ -18,6 +18,7 @@ #include "exec/page-protection.h" #ifdef CONFIG_TCG #include "accel/tcg/cpu-ldst-common.h" +#include "accel/tcg/cpu-loop.h" #include "semihosting/common-semi.h" #endif #if !defined(CONFIG_USER_ONLY) @@ -575,7 +576,7 @@ void HELPER(v7m_bxns)(CPUARMState *env, uint32_t dest) */ env->regs[15] =3D dest & ~1; env->thumb =3D dest & 1; - HELPER(exception_internal)(env, EXCP_EXCEPTION_EXIT); + cpu_loop_exit_excp(env_cpu(env), EXCP_EXCEPTION_EXIT, 0); /* notreached */ } =20 diff --git a/target/arm/tcg/op_helper.c b/target/arm/tcg/op_helper.c index c2b09176cb1..f1d1f52ccee 100644 --- a/target/arm/tcg/op_helper.c +++ b/target/arm/tcg/op_helper.c @@ -45,8 +45,8 @@ int exception_target_el(CPUARMState *env) return target_el; } =20 -void raise_exception(CPUARMState *env, uint32_t excp, - uint64_t syndrome, uint32_t target_el) +void arm_raise_exception(CPUARMState *env, uint32_t excp, + uint64_t syndrome, uint32_t target_el) { CPUState *cs =3D env_cpu(env); =20 @@ -64,14 +64,13 @@ void raise_exception(CPUARMState *env, uint32_t excp, } =20 assert(!excp_is_internal(excp)); - cs->exception_index =3D excp; env->exception.syndrome =3D syndrome; env->exception.target_el =3D target_el; - cpu_loop_exit(cs); + cpu_loop_exit_excp(cs, excp, 0); } =20 -void raise_exception_ra(CPUARMState *env, uint32_t excp, uint64_t syndrome, - uint32_t target_el, uintptr_t ra) +void arm_raise_exception_ra(CPUARMState *env, uint32_t excp, uint64_t synd= rome, + uint32_t target_el, uintptr_t ra) { CPUState *cs =3D env_cpu(env); =20 @@ -81,7 +80,7 @@ void raise_exception_ra(CPUARMState *env, uint32_t excp, = uint64_t syndrome, * the caller passed us, and cannot use cpu_loop_exit_restore(). */ cpu_restore_state(cs, ra); - raise_exception(env, excp, syndrome, target_el); + arm_raise_exception(env, excp, syndrome, target_el); } =20 uint64_t HELPER(neon_tbl)(CPUARMState *env, uint32_t desc, @@ -399,9 +398,8 @@ void HELPER(wfi)(CPUARMState *env, uint32_t insn_len) } =20 env->halt_reason =3D HALT_WFI; - cs->exception_index =3D EXCP_HLT; cs->halted =3D 1; - cpu_loop_exit(cs); + cpu_loop_exit_excp(cs, EXCP_HLT, 0); #endif } =20 @@ -461,9 +459,8 @@ void HELPER(wfit)(CPUARMState *env, uint32_t rd) timer_mod(cpu->wfxt_timer, nexttick); } env->halt_reason =3D HALT_WFI; - cs->exception_index =3D EXCP_HLT; cs->halted =3D 1; - cpu_loop_exit(cs); + cpu_loop_exit_excp(cs, EXCP_HLT, 0); #endif } =20 @@ -630,9 +627,8 @@ void HELPER(wfe)(CPUARMState *env, uint32_t insn_len) } =20 env->halt_reason =3D HALT_WFE; - cs->exception_index =3D EXCP_HLT; cs->halted =3D 1; - cpu_loop_exit(cs); + cpu_loop_exit_excp(cs, EXCP_HLT, 0); #endif } =20 @@ -724,9 +720,8 @@ void HELPER(wfet)(CPUARMState *env, uint32_t rd) } =20 env->halt_reason =3D HALT_WFE; - cs->exception_index =3D EXCP_HLT; cs->halted =3D 1; - cpu_loop_exit(cs); + cpu_loop_exit_excp(cs, EXCP_HLT, 0); #endif } =20 @@ -738,23 +733,7 @@ void HELPER(yield)(CPUARMState *env) * that the guest is currently busy-looping. Yield control back to the * top level loop so that a more deserving VCPU has a chance to run. */ - cs->exception_index =3D EXCP_YIELD; - cpu_loop_exit(cs); -} - -/* Raise an internal-to-QEMU exception. This is limited to only - * those EXCP values which are special cases for QEMU to interrupt - * execution and not to be used for exceptions which are passed to - * the guest (those must all have syndrome information and thus should - * use exception_with_syndrome*). - */ -void HELPER(exception_internal)(CPUARMState *env, uint32_t excp) -{ - CPUState *cs =3D env_cpu(env); - - assert(excp_is_internal(excp)); - cs->exception_index =3D excp; - cpu_loop_exit(cs); + cpu_loop_exit_excp(cs, EXCP_YIELD, 0); } =20 /* Raise an exception with the specified syndrome register value */ diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c index 8c56348a665..bc1dc101ff3 100644 --- a/target/arm/tcg/translate.c +++ b/target/arm/tcg/translate.c @@ -379,7 +379,7 @@ static void gen_rebuild_hflags(DisasContext *s, bool ne= w_el) void gen_exception_internal(int excp) { assert(excp_is_internal(excp)); - gen_helper_exception_internal(tcg_env, tcg_constant_i32(excp)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(excp), tcg_constant_i3= 2(0)); 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Thu, 17 Sep 2026 17:45:14 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 18/21] target/riscv: convert raise_exception to riscv_raise_exception Date: Fri, 18 Sep 2026 08:42:20 +0800 Message-ID: <20260918004225.827-19-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:39::f; envelope-from=luoyonggang@gmail.com; helo=mail-pj2-x0f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692397054158500 Content-Type: text/plain; charset="utf-8" Prefix leftover TCG raise_exception to riscv_raise_exception so translate still decrements instret then exits with restore 0. Keep C riscv_raise_exception via cpu_loop_exit_excp. Signed-off-by: Yonggang Luo --- target/riscv/helper.h | 2 +- target/riscv/tcg/insn_trans/trans_rvi.c.inc | 6 ++---- target/riscv/tcg/insn_trans/trans_rvzicfiss.c.inc | 3 +-- target/riscv/tcg/op_helper.c | 5 ++--- target/riscv/tcg/translate.c | 10 +++++++--- 5 files changed, 13 insertions(+), 13 deletions(-) diff --git a/target/riscv/helper.h b/target/riscv/helper.h index 4fc2d3a1559..3fdd41aef3c 100644 --- a/target/riscv/helper.h +++ b/target/riscv/helper.h @@ -1,5 +1,5 @@ /* Exceptions */ -DEF_HELPER_2(raise_exception, noreturn, env, i32) +DEF_HELPER_2(riscv_raise_exception, noreturn, env, i32) =20 /* Floating Point - rounding mode */ DEF_HELPER_FLAGS_2(set_rounding_mode, TCG_CALL_NO_WG, void, env, i32) diff --git a/target/riscv/tcg/insn_trans/trans_rvi.c.inc b/target/riscv/tcg= /insn_trans/trans_rvi.c.inc index cc1b5dbbadc..d8e49a75633 100644 --- a/target/riscv/tcg/insn_trans/trans_rvi.c.inc +++ b/target/riscv/tcg/insn_trans/trans_rvi.c.inc @@ -55,8 +55,7 @@ static bool trans_lpad(DisasContext *ctx, arg_lpad *a) */ tcg_gen_st8_i32(tcg_constant_i32(RISCV_EXCP_SW_CHECK_FCFI_TVAL), tcg_env, offsetof(CPURISCVState, sw_check_code)); - gen_helper_raise_exception(tcg_env, - tcg_constant_i32(RISCV_EXCP_SW_CHECK)); + gen_raise_exception(RISCV_EXCP_SW_CHECK); return true; } =20 @@ -68,8 +67,7 @@ static bool trans_lpad(DisasContext *ctx, arg_lpad *a) tcg_gen_brcondi_tl(TCG_COND_EQ, tmp, a->label, skip); tcg_gen_st8_i32(tcg_constant_i32(RISCV_EXCP_SW_CHECK_FCFI_TVAL), tcg_env, offsetof(CPURISCVState, sw_check_code)); - gen_helper_raise_exception(tcg_env, - tcg_constant_i32(RISCV_EXCP_SW_CHECK)); + gen_raise_exception(RISCV_EXCP_SW_CHECK); gen_set_label(skip); } =20 diff --git a/target/riscv/tcg/insn_trans/trans_rvzicfiss.c.inc b/target/ris= cv/tcg/insn_trans/trans_rvzicfiss.c.inc index d47a9f9c7d2..087328a12ef 100644 --- a/target/riscv/tcg/insn_trans/trans_rvzicfiss.c.inc +++ b/target/riscv/tcg/insn_trans/trans_rvzicfiss.c.inc @@ -43,8 +43,7 @@ static bool trans_sspopchk(DisasContext *ctx, arg_sspopch= k *a) tcg_gen_brcond_tl(TCG_COND_EQ, data, rs1, skip); tcg_gen_st8_i32(tcg_constant_i32(RISCV_EXCP_SW_CHECK_BCFI_TVAL), tcg_env, offsetof(CPURISCVState, sw_check_code)); - gen_helper_raise_exception(tcg_env, - tcg_constant_i32(RISCV_EXCP_SW_CHECK)); + gen_raise_exception(RISCV_EXCP_SW_CHECK); gen_set_label(skip); tcg_gen_addi_tl(addr, addr, tmp); tcg_gen_ext_tl_i64(wide_addr, addr); diff --git a/target/riscv/tcg/op_helper.c b/target/riscv/tcg/op_helper.c index 3e94005d2bd..2b1521658dd 100644 --- a/target/riscv/tcg/op_helper.c +++ b/target/riscv/tcg/op_helper.c @@ -44,11 +44,10 @@ G_NORETURN void riscv_raise_exception(CPURISCVState *en= v, riscv_cpu_get_trap_name(exception, false), env->pc); =20 - cs->exception_index =3D exception; - cpu_loop_exit_restore(cs, pc); + cpu_loop_exit_excp(cs, exception, pc); } =20 -void helper_raise_exception(CPURISCVState *env, uint32_t exception) +void HELPER(riscv_raise_exception)(CPURISCVState *env, uint32_t exception) { #ifndef CONFIG_USER_ONLY riscv_pmu_decr_instret(env); diff --git a/target/riscv/tcg/translate.c b/target/riscv/tcg/translate.c index 9684dbe7528..da0bcc7bb66 100644 --- a/target/riscv/tcg/translate.c +++ b/target/riscv/tcg/translate.c @@ -254,10 +254,15 @@ static void gen_update_pc(DisasContext *ctx, target_l= ong diff) ctx->pc_save =3D ctx->base.pc_next + diff; } =20 +static void gen_raise_exception(uint32_t excp) +{ + gen_helper_riscv_raise_exception(tcg_env, tcg_constant_i32(excp)); +} + static void generate_exception(DisasContext *ctx, RISCVException excp) { gen_update_pc(ctx, 0); - gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp)); + gen_raise_exception(excp); ctx->base.is_jmp =3D DISAS_NORETURN; } =20 @@ -1394,8 +1399,7 @@ static void riscv_tr_translate_insn(DisasContextBase = *dcbase, CPUState *cpu) tcg_ctx->emit_before_op =3D QTAILQ_NEXT(ctx->base.insn_start, link= ); tcg_gen_st8_i32(tcg_constant_i32(RISCV_EXCP_SW_CHECK_FCFI_TVAL), tcg_env, offsetof(CPURISCVState, sw_check_code)); - gen_helper_raise_exception(tcg_env, - tcg_constant_i32(RISCV_EXCP_SW_CHECK)); + gen_raise_exception(RISCV_EXCP_SW_CHECK); tcg_ctx->emit_before_op =3D NULL; ctx->base.is_jmp =3D DISAS_NORETURN; } --=20 2.52.0.windows.1 From nobody Sat Sep 26 20:52:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 17 Sep 2026 17:45:23 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 19/21] target/mips: convert raise_exception to raise_excp Date: Fri, 18 Sep 2026 08:42:21 +0800 Message-ID: <20260918004225.827-20-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:3b::e; envelope-from=luoyonggang@gmail.com; helo=mail-pz2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692397014158500 Content-Type: text/plain; charset="utf-8" Store error_code then call raise_excp, with restore 0 for _err and 1 for the 2-arg path. Drop TCG raise_exception, raise_exception_err, and unused debug DEF. Prefix leftover TCG wait to mips_wait. Keep C do_raise_exception_err via cpu_loop_exit_excp. Signed-off-by: Yonggang Luo --- target/mips/helper.h | 6 +----- target/mips/tcg/exception.c | 22 ++-------------------- target/mips/tcg/fpu_helper.c | 6 +++--- target/mips/tcg/translate.c | 13 +++++++++---- 4 files changed, 15 insertions(+), 32 deletions(-) diff --git a/target/mips/helper.h b/target/mips/helper.h index 779b87101db..eed9dee96e5 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -1,7 +1,3 @@ -DEF_HELPER_3(raise_exception_err, noreturn, env, i32, int) -DEF_HELPER_2(raise_exception, noreturn, env, i32) -DEF_HELPER_1(raise_exception_debug, noreturn, env) - #ifdef TARGET_MIPS64 DEF_HELPER_4(sdl, void, env, tl, tl, int) DEF_HELPER_4(sdr, void, env, tl, tl, int) @@ -250,7 +246,7 @@ DEF_HELPER_1(rdhwr_xnp, tl, env) DEF_HELPER_1(rdhwr_chord, tl, env) DEF_HELPER_1(rdhwr_cvmcount, tl, env) DEF_HELPER_2(pmon, void, env, int) -DEF_HELPER_1(wait, void, env) +DEF_HELPER_1(mips_wait, void, env) =20 #ifdef TARGET_MIPS64 DEF_HELPER_FLAGS_2(lcsr_cpucfg, TCG_CALL_NO_RWG_SE, tl, env, tl) diff --git a/target/mips/tcg/exception.c b/target/mips/tcg/exception.c index 630b8b809fa..788d60a51aa 100644 --- a/target/mips/tcg/exception.c +++ b/target/mips/tcg/exception.c @@ -44,28 +44,12 @@ target_ulong exception_resume_pc(CPUMIPSState *env) return bad_pc; } =20 -void helper_raise_exception_err(CPUMIPSState *env, uint32_t exception, - int error_code) -{ - do_raise_exception_err(env, exception, error_code, 0); -} - -void helper_raise_exception(CPUMIPSState *env, uint32_t exception) -{ - do_raise_exception(env, exception, GETPC()); -} - -void helper_raise_exception_debug(CPUMIPSState *env) -{ - do_raise_exception(env, EXCP_DEBUG, 0); -} - static void raise_exception(CPUMIPSState *env, uint32_t exception) { do_raise_exception(env, exception, 0); } =20 -void helper_wait(CPUMIPSState *env) +void helper_mips_wait(CPUMIPSState *env) { CPUState *cs =3D env_cpu(env); =20 @@ -145,8 +129,6 @@ void do_raise_exception_err(CPUMIPSState *env, uint32_t= exception, qemu_log_mask(CPU_LOG_INT, "%s: %d (%s) %d\n", __func__, exception, mips_exception_name(exception), error_code); - cs->exception_index =3D exception; env->error_code =3D error_code; - - cpu_loop_exit_restore(cs, pc); + cpu_loop_exit_excp(cs, exception, pc); } diff --git a/target/mips/tcg/fpu_helper.c b/target/mips/tcg/fpu_helper.c index 36af9808025..ce68cda1e43 100644 --- a/target/mips/tcg/fpu_helper.c +++ b/target/mips/tcg/fpu_helper.c @@ -61,7 +61,7 @@ target_ulong helper_cfc1(CPUMIPSState *env, uint32_t reg) if (env->CP0_Config5 & (1 << CP0C5_UFE)) { arg1 =3D (env->CP0_Config5 >> CP0C5_FRE) & 1; } else { - helper_raise_exception(env, EXCP_RI); + do_raise_exception(env, EXCP_RI, GETPC()); } } break; @@ -120,7 +120,7 @@ void helper_ctc1(CPUMIPSState *env, target_ulong arg1, = uint32_t fs, uint32_t rt) env->CP0_Config5 &=3D ~(1 << CP0C5_FRE); compute_hflags(env); } else { - helper_raise_exception(env, EXCP_RI); + do_raise_exception(env, EXCP_RI, GETPC()); } break; case 6: @@ -132,7 +132,7 @@ void helper_ctc1(CPUMIPSState *env, target_ulong arg1, = uint32_t fs, uint32_t rt) env->CP0_Config5 |=3D (1 << CP0C5_FRE); compute_hflags(env); } else { - helper_raise_exception(env, EXCP_RI); + do_raise_exception(env, EXCP_RI, GETPC()); } break; case 25: diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index e3467d15251..99e56bb1422 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -1316,14 +1316,19 @@ static inline void restore_cpu_state(CPUMIPSState *= env, DisasContext *ctx) void generate_exception_err(DisasContext *ctx, int excp, int err) { save_cpu_state(ctx, 1); - gen_helper_raise_exception_err(tcg_env, tcg_constant_i32(excp), - tcg_constant_i32(err)); + tcg_gen_st_i32(tcg_constant_i32(err), tcg_env, + offsetof(CPUMIPSState, error_code)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(excp), + tcg_constant_i32(0)); ctx->base.is_jmp =3D DISAS_NORETURN; } =20 void generate_exception(DisasContext *ctx, int excp) { - gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp)); + tcg_gen_st_i32(tcg_constant_i32(0), tcg_env, + offsetof(CPUMIPSState, error_code)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(excp), + tcg_constant_i32(1)); } =20 void generate_exception_end(DisasContext *ctx, int excp) @@ -8683,7 +8688,7 @@ static void gen_cp0(CPUMIPSState *env, DisasContext *= ctx, uint32_t opc, ctx->base.pc_next +=3D 4; save_cpu_state(ctx, 1); ctx->base.pc_next -=3D 4; - gen_helper_wait(tcg_env); + gen_helper_mips_wait(tcg_env); ctx->base.is_jmp =3D DISAS_NORETURN; break; default: --=20 2.52.0.windows.1 From nobody Sat Sep 26 20:52:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 17 Sep 2026 17:45:31 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 20/21] target/ppc: convert raise_exception to raise_excp Date: Fri, 18 Sep 2026 08:42:22 +0800 Message-ID: <20260918004225.827-21-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=luoyonggang@gmail.com; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692393152158500 Content-Type: text/plain; charset="utf-8" Store error_code then call raise_excp with restore 0. Drop TCG raise_exception and raise_exception_err. Move C raise_exception_err_ra to static inline in internal.h, and remove the cpu.h prototype. Callers include internal.h. Signed-off-by: Yonggang Luo --- target/ppc/cpu.h | 3 --- target/ppc/helper.h | 2 -- target/ppc/internal.h | 9 +++++++++ target/ppc/misc_helper.c | 1 + target/ppc/tcg-excp_helper.c | 21 --------------------- target/ppc/timebase_helper.c | 1 + target/ppc/translate.c | 23 ++++++++++------------- 7 files changed, 21 insertions(+), 39 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 3fb51bbeb82..217b4f334e5 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -2819,9 +2819,6 @@ void cpu_write_xer(CPUPPCState *env, target_ulong xer= ); */ #define is_book3s_arch2x(ctx) (!!((ctx)->insns_flags & PPC_SEGMENT_64B)) =20 -G_NORETURN void raise_exception_err_ra(CPUPPCState *env, uint32_t exceptio= n, - uint32_t error_code, uintptr_t radd= r); - /* PERFM EBB helper*/ #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY) void raise_ebb_perfm_exception(CPUPPCState *env); diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 80d6616bab4..8a804d326ac 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -1,5 +1,3 @@ -DEF_HELPER_FLAGS_3(raise_exception_err, TCG_CALL_NO_WG, noreturn, env, i32= , i32) -DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32) DEF_HELPER_FLAGS_4(TW, TCG_CALL_NO_WG, void, env, tl, tl, i32) #if defined(TARGET_PPC64) DEF_HELPER_FLAGS_4(TD, TCG_CALL_NO_WG, void, env, tl, tl, i32) diff --git a/target/ppc/internal.h b/target/ppc/internal.h index a20a0f9f7e0..14c08c23ffc 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -320,8 +320,17 @@ static inline int ger_pack_masks(int pmsk, int ymsk, i= nt xmsk) =20 #ifdef CONFIG_TCG #include "accel/tcg/tb-cpu-state.h" +#include "accel/tcg/cpu-loop.h" =20 TCGTBCPUState ppc_get_tb_cpu_state(CPUState *cs); + +static inline G_NORETURN +void raise_exception_err_ra(CPUPPCState *env, uint32_t excp, + uint32_t err, uintptr_t ra) +{ + env->error_code =3D err; + cpu_loop_exit_excp(env_cpu(env), excp, ra); +} #endif =20 #endif /* PPC_INTERNAL_H */ diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c index 0e625cbb704..527af513f92 100644 --- a/target/ppc/misc_helper.c +++ b/target/ppc/misc_helper.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "cpu.h" +#include "internal.h" #include "exec/cputlb.h" #include "exec/helper-proto.h" #include "qemu/error-report.h" diff --git a/target/ppc/tcg-excp_helper.c b/target/ppc/tcg-excp_helper.c index 93aedb0c8e2..6289ca7dfd5 100644 --- a/target/ppc/tcg-excp_helper.c +++ b/target/ppc/tcg-excp_helper.c @@ -34,27 +34,6 @@ /*************************************************************************= ****/ /* Exceptions processing helpers */ =20 -void raise_exception_err_ra(CPUPPCState *env, uint32_t exception, - uint32_t error_code, uintptr_t raddr) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D exception; - env->error_code =3D error_code; - cpu_loop_exit_restore(cs, raddr); -} - -void helper_raise_exception_err(CPUPPCState *env, uint32_t exception, - uint32_t error_code) -{ - raise_exception_err_ra(env, exception, error_code, 0); -} - -void helper_raise_exception(CPUPPCState *env, uint32_t exception) -{ - raise_exception_err_ra(env, exception, 0, 0); -} - #ifndef CONFIG_USER_ONLY =20 static G_NORETURN void raise_exception_err(CPUPPCState *env, uint32_t exce= ption, diff --git a/target/ppc/timebase_helper.c b/target/ppc/timebase_helper.c index 7209b418fb6..d0986ff261a 100644 --- a/target/ppc/timebase_helper.c +++ b/target/ppc/timebase_helper.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" #include "cpu.h" +#include "internal.h" #include "hw/ppc/ppc.h" #include "exec/helper-proto.h" #include "qemu/log.h" diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 467b8f3d4ec..e4695c18728 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -308,12 +308,11 @@ static inline void gen_update_nip(DisasContext *ctx, = target_ulong nip) static void gen_exception_err_nip(DisasContext *ctx, uint32_t excp, uint32_t error, target_ulong nip) { - TCGv_i32 t0, t1; - gen_update_nip(ctx, nip); - t0 =3D tcg_constant_i32(excp); - t1 =3D tcg_constant_i32(error); - gen_helper_raise_exception_err(tcg_env, t0, t1); + tcg_gen_st_i32(tcg_constant_i32(error), tcg_env, + offsetof(CPUPPCState, error_code)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(excp), + tcg_constant_i32(0)); ctx->base.is_jmp =3D DISAS_NORETURN; } =20 @@ -330,12 +329,7 @@ static inline void gen_exception_err(DisasContext *ctx= , uint32_t excp, static void gen_exception_nip(DisasContext *ctx, uint32_t excp, target_ulong nip) { - TCGv_i32 t0; - - gen_update_nip(ctx, nip); - t0 =3D tcg_constant_i32(excp); - gen_helper_raise_exception(tcg_env, t0); - ctx->base.is_jmp =3D DISAS_NORETURN; + gen_exception_err_nip(ctx, excp, 0, nip); } =20 static inline void gen_exception(DisasContext *ctx, uint32_t excp) @@ -377,8 +371,11 @@ static void gen_debug_exception(DisasContext *ctx, boo= l rfi_type) gen_load_spr(t0, SPR_BOOKE_DBSR); tcg_gen_ori_tl(t0, t0, dbsr); gen_store_spr(SPR_BOOKE_DBSR, t0); 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Thu, 17 Sep 2026 17:45:40 -0700 (PDT) From: Yonggang Luo To: qemu-devel@nongnu.org Cc: Xianglai Li , qemu-s390x@nongnu.org, David Hildenbrand , Richard Henderson , qemu-ppc@nongnu.org, Laurent Vivier , Yoshinori Sato , Nicholas Piggin , Jiaxun Yang , Stafford Horne , Weiwei Li , Cornelia Huck , Daniel Henrique Barboza , Alistair Francis , Chinmay Rath , Harsh Prateek Bora , "Edgar E. Iglesias" , Liu Zhiwei , Aleksandar Rikalo , Brian Cain , Artyom Tarasenko , Max Filippov , Eric Farman , Pierrick Bouvier , Michael Rolnik , Aurelien Jarno , qemu-arm@nongnu.org, Bibo Mao , Chao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ilya Leoshkevich , Helge Deller , Glenn Miles , Zhao Liu , Philippe Mathieu-Daude , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , Palmer Dabbelt , qemu-riscv@nongnu.org, Song Gao <17746591750@163.com>, Matthew Rosato Subject: [PATCH 21/21] target/i386: convert raise_exception to i386_raise_exception Date: Fri, 18 Sep 2026 08:42:23 +0800 Message-ID: <20260918004225.827-22-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260918004225.827-1-luoyonggang@gmail.com> References: <20260918004225.827-1-luoyonggang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:3b::e; envelope-from=luoyonggang@gmail.com; helo=mail-pz2-x0e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1789692457505158500 Content-Type: text/plain; charset="utf-8" Prefix leftover TCG raise_exception to i386_raise_exception. Rename C raise_exception family globals to i386_raise_exception*, and keep the short names as static inline wrappers in helper-tcg.h. Wrappers still call raise_interrupt2. Signed-off-by: Yonggang Luo --- target/i386/helper.h | 2 +- target/i386/tcg/excp_helper.c | 18 +++++++-------- target/i386/tcg/helper-tcg.h | 42 +++++++++++++++++++++++++++++------ target/i386/tcg/translate.c | 2 +- 4 files changed, 46 insertions(+), 18 deletions(-) diff --git a/target/i386/helper.h b/target/i386/helper.h index 3f67098f11f..cf643e820a6 100644 --- a/target/i386/helper.h +++ b/target/i386/helper.h @@ -56,7 +56,7 @@ DEF_HELPER_2(syscall, void, env, int) DEF_HELPER_2(sysret, void, env, int) DEF_HELPER_FLAGS_1(pause, TCG_CALL_NO_WG, noreturn, env) DEF_HELPER_FLAGS_3(raise_interrupt, TCG_CALL_NO_WG, noreturn, env, int, in= t) -DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, int) +DEF_HELPER_FLAGS_2(i386_raise_exception, TCG_CALL_NO_WG, noreturn, env, in= t) DEF_HELPER_FLAGS_1(icebp, TCG_CALL_NO_WG, noreturn, env) DEF_HELPER_3(boundw, void, env, tl, int) DEF_HELPER_3(boundl, void, env, tl, int) diff --git a/target/i386/tcg/excp_helper.c b/target/i386/tcg/excp_helper.c index 1eaa602c91d..ab3aa17a870 100644 --- a/target/i386/tcg/excp_helper.c +++ b/target/i386/tcg/excp_helper.c @@ -32,9 +32,9 @@ G_NORETURN void helper_raise_interrupt(CPUX86State *env, = int intno, raise_interrupt(env, intno, next_eip_addend); } =20 -G_NORETURN void helper_raise_exception(CPUX86State *env, int exception_ind= ex) +G_NORETURN void helper_i386_raise_exception(CPUX86State *env, int exceptio= n_index) { - raise_exception(env, exception_index); + i386_raise_exception(env, exception_index); } =20 /* @@ -120,25 +120,25 @@ G_NORETURN void raise_interrupt(CPUX86State *env, int= intno, int next_eip_addend raise_interrupt2(env, intno, 1, 0, next_eip_addend, 0); } =20 -G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index, - int error_code) +G_NORETURN void i386_raise_exception_err(CPUX86State *env, int exception_i= ndex, + int error_code) { raise_interrupt2(env, exception_index, 0, error_code, 0, 0); } =20 -G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_ind= ex, - int error_code, uintptr_t retaddr) +G_NORETURN void i386_raise_exception_err_ra(CPUX86State *env, int exceptio= n_index, + int error_code, uintptr_t reta= ddr) { raise_interrupt2(env, exception_index, 0, error_code, 0, retaddr); } =20 -G_NORETURN void raise_exception(CPUX86State *env, int exception_index) +G_NORETURN void i386_raise_exception(CPUX86State *env, int exception_index) { raise_interrupt2(env, exception_index, 0, 0, 0, 0); } =20 -G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index, - uintptr_t retaddr) +G_NORETURN void i386_raise_exception_ra(CPUX86State *env, int exception_in= dex, + uintptr_t retaddr) { raise_interrupt2(env, exception_index, 0, 0, 0, retaddr); } diff --git a/target/i386/tcg/helper-tcg.h b/target/i386/tcg/helper-tcg.h index f4b2ff740d5..430e49efe0e 100644 --- a/target/i386/tcg/helper-tcg.h +++ b/target/i386/tcg/helper-tcg.h @@ -60,13 +60,41 @@ void x86_translate_code(CPUState *cs, TranslationBlock = *tb, int *max_insns, vaddr pc, void *host_pc); =20 /* excp_helper.c */ -G_NORETURN void raise_exception(CPUX86State *env, int exception_index); -G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index, - uintptr_t retaddr); -G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index, - int error_code); -G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_ind= ex, - int error_code, uintptr_t retaddr); +G_NORETURN void i386_raise_exception(CPUX86State *env, int exception_index= ); +G_NORETURN void i386_raise_exception_ra(CPUX86State *env, int exception_in= dex, + uintptr_t retaddr); +G_NORETURN void i386_raise_exception_err(CPUX86State *env, int exception_i= ndex, + int error_code); +G_NORETURN void i386_raise_exception_err_ra(CPUX86State *env, + int exception_index, + int error_code, uintptr_t reta= ddr); + +static inline G_NORETURN +void raise_exception(CPUX86State *env, int exception_index) +{ + i386_raise_exception(env, exception_index); +} + +static inline G_NORETURN +void raise_exception_ra(CPUX86State *env, int exception_index, + uintptr_t retaddr) +{ + i386_raise_exception_ra(env, exception_index, retaddr); +} + +static inline G_NORETURN +void raise_exception_err(CPUX86State *env, int exception_index, + int error_code) +{ + i386_raise_exception_err(env, exception_index, error_code); +} + +static inline G_NORETURN +void raise_exception_err_ra(CPUX86State *env, int exception_index, + int error_code, uintptr_t retaddr) +{ + i386_raise_exception_err_ra(env, exception_index, error_code, retaddr); +} G_NORETURN void raise_interrupt(CPUX86State *nenv, int intno, int next_eip= _addend); G_NORETURN void handle_unaligned_access(CPUX86State *env, vaddr vaddr, MMUAccessType access_type, diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index d8de290acb6..379af59ea71 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -1506,7 +1506,7 @@ static void gen_exception(DisasContext *s, int trapno) { gen_update_cc_op(s); gen_update_eip_cur(s); - gen_helper_raise_exception(tcg_env, tcg_constant_i32(trapno)); + gen_helper_i386_raise_exception(tcg_env, tcg_constant_i32(trapno)); s->base.is_jmp =3D DISAS_NORETURN; } =20 --=20 2.52.0.windows.1