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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: permerror client-ip=2a01:111:f403:c005::5; envelope-from=tdave@nvidia.com; helo=CO1PR03CU002.outbound.protection.outlook.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FORGED_SPF_HELO=1, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @Nvidia.com) X-ZM-MESSAGEID: 1789586719769158500 Content-Type: text/plain; charset="utf-8" EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL returns ACPI address descriptors describing PCI resource requirements. When both _MIF (BIT2) and _MAF (BIT3) are set in the descriptor's GenFlag, the descriptor represents a fixed address range. Extend PCI_BAR with FixedBaseAddress and update the PCI bus driver to preserve and use this information: * UpdatePciInfo() detects _MIF|_MAF, records AddrRangeMin as FixedBaseAddress, and marks the BAR as fixed. * ProgramBar() programs FixedBaseAddress into the BAR register instead of the resource allocator selected address for fixed BARs. No functional change occurs unless a platform driver supplies fixed BAR descriptors through EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL. Signed-off-by: Tushar Dave --- MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 2 ++ .../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 12 ++++++++++++ MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c | 11 +++++++++++ 3 files changed, 25 insertions(+) diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h b/MdeModulePkg/Bus/Pci= /PciBusDxe/PciBus.h index 01bce28b1b..dbec57bd54 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h @@ -96,6 +96,8 @@ struct _PCI_BAR { UINT64 Alignment; PCI_BAR_TYPE BarType; BOOLEAN BarTypeFixed; + UINT64 FixedBaseAddress; + BOOLEAN HasFixedBaseAddress; UINT16 Offset; }; =20 diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c b/MdeMod= ulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c index ae94462f60..b7c132cc10 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c @@ -1638,6 +1638,18 @@ UpdatePciInfo ( if (Ptr->AddrLen !=3D 0) { PciIoDevice->PciBar[BarIndex].Length =3D Ptr->AddrLen; } + + // + // When both _MIF (BIT2) and _MAF (BIT3) are set in GenFlag the + // descriptor carries a fixed base address in AddrRangeMin. + // + if ((Ptr->GenFlag & (BIT2 | BIT3)) =3D=3D (BIT2 | BIT3)) { + PciIoDevice->PciBar[BarIndex].HasFixedBaseAddress =3D TRUE; + PciIoDevice->PciBar[BarIndex].FixedBaseAddress =3D Ptr->AddrR= angeMin; + DEBUG ((DEBUG_INFO, + "PciBus: UpdatePciInfo BAR[%u] fixed address=3D0x%016Lx\= n", + (UINT32)BarIndex, Ptr->AddrRangeMin)); + } } } =20 diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c b/MdeModul= ePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c index 8f3cff3eaa..169011e647 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c @@ -1276,6 +1276,17 @@ ProgramBar ( =20 Address =3D Base + Node->Offset; =20 + // + // If EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL supplied a fixed + // base address (_MIF|_MAF in the ACPI descriptor), use it directly. + // + if (Node->PciDev->PciBar[Node->Bar].HasFixedBaseAddress) { + Address =3D Node->PciDev->PciBar[Node->Bar].FixedBaseAddress; + DEBUG ((DEBUG_INFO, + "PciBus: BAR[%d] fixed address 0x%016Lx (GCD 0x%016Lx)\n", + Node->Bar, Address, Base + Node->Offset)); + } + // // Indicate pci bus driver has allocated // resource for this device --=20 2.34.1 From nobody Sat Sep 26 22:14:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=fail (Bad Signature); dmarc=pass(p=none dis=none) header.from=nongnu.org Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1789586726197468.4433144877015; Wed, 16 Sep 2026 12:25:26 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1x6vFM-0004c3-83; Wed, 16 Sep 2026 15:24:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x6vFB-0004ab-SS for qemu-devel@nongnu.org; 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charset="utf-8" Extend the existing IncompatiblePciDeviceSupportDxe driver to support explicit PCI BAR placement. CheckDevice() checks for a fixed-bars entry first, then falls back to the existing 64-bit-MMIO-preference descriptor. Add FixedBars.c/.h to encapsulate fixed-BAR handling. Parse QEMU's etc/fixed-bars fw_cfg blob, reserve the specified PCI BAR address ranges in the GCD memory space map before PCI enumeration, provide fixed BAR descriptors to PciBusDxe during device discovery. Also, IncompatiblePciDeviceSupportDxe's CcProbe() call has no CcProbeLib resolution on ArmVirtQemu, which causes the build to fail. This patch adds a CcProbeLib resolution for ArmVirtQemu. Signed-off-by: Tushar Dave --- ArmVirtPkg/ArmVirtQemu.dsc | 2 + ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc | 1 + .../FixedBars.c | 413 ++++++++++++++++++ .../FixedBars.h | 63 +++ .../IncompatiblePciDeviceSupport.c | 114 +++-- .../IncompatiblePciDeviceSupport.inf | 8 +- 6 files changed, 570 insertions(+), 31 deletions(-) create mode 100644 OvmfPkg/IncompatiblePciDeviceSupportDxe/FixedBars.c create mode 100644 OvmfPkg/IncompatiblePciDeviceSupportDxe/FixedBars.h diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc index a3f8a2d0ac..d331a3a9bd 100644 --- a/ArmVirtPkg/ArmVirtQemu.dsc +++ b/ArmVirtPkg/ArmVirtQemu.dsc @@ -67,6 +67,7 @@ !include ArmVirtPkg/ArmVirt.dsc.inc =20 [LibraryClasses.common] + CcProbeLib|MdePkg/Library/CcProbeLibNull/CcProbeLibNull.inf ArmTransferListLib|ArmPkg/Library/ArmTransferListLib/ArmTransferListLib.= inf =20 QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf @@ -392,6 +393,7 @@ # # PCI support # + OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf =20 # diff --git a/ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc b/ArmVirtPkg/ArmVirtQemuF= vMain.fdf.inc index 3fb6a1da9d..3f0b00b2e7 100644 --- a/ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc +++ b/ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc @@ -159,6 +159,7 @@ READ_LOCK_STATUS =3D TRUE # PCI support # INF UefiCpuPkg/CpuMmio2Dxe/CpuMmio2Dxe.inf + INF OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport= .inf INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf diff --git a/OvmfPkg/IncompatiblePciDeviceSupportDxe/FixedBars.c b/OvmfPkg/= IncompatiblePciDeviceSupportDxe/FixedBars.c new file mode 100644 index 0000000000..f307fb285c --- /dev/null +++ b/OvmfPkg/IncompatiblePciDeviceSupportDxe/FixedBars.c @@ -0,0 +1,413 @@ +/** @file + Fixed PCI BAR placement using metadata provided by QEMU through the + "etc/fixed-bars" fw_cfg blob. + + Copyright (c) 2026, NVIDIA CORPORATION & AFFILIATES. All rights reserved= .
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "FixedBars.h" + +/* byte-for-byte identical to QEMU's structs in hw/pci/pci-fixed-bar.h */ +#pragma pack (1) + +typedef struct { + UINT32 Version; + UINT32 NumDevices; +} QEMU_FIXED_BARS_HDR; /* 8 bytes */ + +typedef struct { + UINT16 VendorId; + UINT16 DeviceId; + UINT8 DevFlags; + UINT8 RpBus; + UINT8 NumBars; + UINT8 Reserved; + CHAR8 FwPath[128]; /* qdev_get_fw_dev_path(), un= used here */ +} QEMU_FIXED_BARS_DEVICE; /* 136 bytes */ + +typedef struct { + UINT8 Bar; + UINT8 Reserved[3]; + UINT32 Flags; + UINT64 Address; + UINT64 Size; +} QEMU_FIXED_BARS_BAR; /* 24 bytes */ + +#pragma pack () + +#define QEMU_FIXED_BARS_VERSION 1 +#define QEMU_FIXED_BAR_F_MEM64 BIT0 +#define QEMU_FIXED_BAR_F_PREF BIT1 +#define QEMU_FIXED_BARS_DEV_F_FIXED BIT0 + +/* + * ACPI general-flag bits (ACPI 6.x 6.4.3.5.1): + * BIT2 =3D _MIF (minimum address fixed) + * BIT3 =3D _MAF (maximum address fixed) + * Both set means AddrRangeMin carries the exact required base address. + */ +#define ACPI_ADDR_FLAG_FIXED (BIT2 | BIT3) + +/* Raw blob kept in memory; device entries point into it. */ +STATIC UINT8 *mBlobData; +STATIC QEMU_FIXED_BARS_HDR mHdr; + +/* Pre-parsed per-device index built from the blob at startup. */ +typedef struct { + UINT16 VendorId; + UINT16 DeviceId; + UINT8 DevFlags; + UINT8 RpBus; /* primary bus of the root port */ + UINT8 NumBars; + QEMU_FIXED_BARS_BAR *Bars; /* pointer into mBlobData */ +} QFBD_DEVICE; + +/* + * Per-(VendorId, DeviceId) class. FixedBarsCheckDevice() is called once p= er + * PCI function and once per scan pass. Different VID:DID classes must + * advance their counters independently so that one class cannot disturb + * the position of another across scan passes. + * + * Assumptions: + * - QEMU emits blob entries in the same order PciBusDxe discovers devic= es. + * - For identical VID:DID devices, discovery order is stable across pas= ses. + * - The counter is maintained per VID:DID class, not globally. + */ +typedef struct { + UINT16 VendorId; + UINT16 DeviceId; + UINTN Count; /* number of devices with this VID:DID in the blo= b */ + UINTN CurrentIdx; /* next entry to serve; wraps at Count */ +} QFBD_DEVICE_CLASS; + +STATIC QFBD_DEVICE *mDevices; +STATIC UINTN mNumDevices; +STATIC QFBD_DEVICE_CLASS *mClasses; /* heap-allocated; mNumDevices entr= ies max */ +STATIC UINTN mNumClasses; + +STATIC VOID +ReserveFixedBarRanges ( + VOID + ) +{ + UINTN DevIdx; + UINTN BarIdx; + UINT64 Min64; + UINT64 Max64; + UINT64 Min32; + UINT64 Max32; + UINT64 Gran; + UINT64 Base; + UINT64 Size; + EFI_STATUS Status; + + Min64 =3D MAX_UINT64; + Max64 =3D 0; + Min32 =3D MAX_UINT64; + Max32 =3D 0; + Gran =3D SIZE_1MB; + + for (DevIdx =3D 0; DevIdx < mNumDevices; DevIdx++) { + QFBD_DEVICE *Dev =3D &mDevices[DevIdx]; + + if (!(Dev->DevFlags & QEMU_FIXED_BARS_DEV_F_FIXED)) { + continue; + } + for (BarIdx =3D 0; BarIdx < Dev->NumBars; BarIdx++) { + QEMU_FIXED_BARS_BAR *Bar =3D &Dev->Bars[BarIdx]; + + if (Bar->Flags & QEMU_FIXED_BAR_F_MEM64) { + if (Bar->Address < Min64) { + Min64 =3D Bar->Address; + } + if (Bar->Address + Bar->Size > Max64) { + Max64 =3D Bar->Address + Bar->Size; + } + } else { + if (Bar->Address < Min32) { + Min32 =3D Bar->Address; + } + if (Bar->Address + Bar->Size > Max32) { + Max32 =3D Bar->Address + Bar->Size; + } + } + } + } + + if (Min64 < Max64) { + Base =3D Min64 & ~(Gran - 1); + Size =3D ALIGN_VALUE (Max64 - Base, Gran); + Status =3D gDS->AllocateMemorySpace ( + EfiGcdAllocateAddress, + EfiGcdMemoryTypeMemoryMappedIo, + 0, Size, &Base, gImageHandle, NULL + ); + DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_INFO, + "QFBD: reserve 64-bit 0x%016Lx+0x%016Lx: %r\n", + Base, Size, Status)); + } + + if (Min32 < Max32) { + Base =3D Min32 & ~(Gran - 1); + Size =3D ALIGN_VALUE (Max32 - Base, Gran); + Status =3D gDS->AllocateMemorySpace ( + EfiGcdAllocateAddress, + EfiGcdMemoryTypeMemoryMappedIo, + 0, Size, &Base, gImageHandle, NULL + ); + DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_INFO, + "QFBD: reserve 32-bit 0x%016Lx+0x%016Lx: %r\n", + Base, Size, Status)); + } +} + +/* Walk the blob once, build the mDevices[] index and the mClasses[] table= . */ +STATIC VOID +InitDevices ( + IN UINTN BlobSize + ) +{ + UINT8 *Ptr =3D mBlobData + sizeof (QEMU_FIXED_BARS_HDR); + UINT8 *End =3D mBlobData + BlobSize; + UINTN DevIdx, ClassIdx; + + for (DevIdx =3D 0; DevIdx < mHdr.NumDevices; DevIdx++) { + QEMU_FIXED_BARS_DEVICE *Dev; + UINT8 *Next; + + if (Ptr + sizeof (QEMU_FIXED_BARS_DEVICE) > End) { + DEBUG ((DEBUG_ERROR, "QFBD: blob truncated at device %u\n", (UINT32)= DevIdx)); + break; + } + + Dev =3D (QEMU_FIXED_BARS_DEVICE *)Ptr; + Next =3D Ptr + + sizeof (QEMU_FIXED_BARS_DEVICE) + + Dev->NumBars * sizeof (QEMU_FIXED_BARS_BAR); + + if (Next > End) { + DEBUG ((DEBUG_ERROR, "QFBD: blob truncated at device %u\n", (UINT32)= DevIdx)); + break; + } + + mDevices[mNumDevices].VendorId =3D Dev->VendorId; + mDevices[mNumDevices].DeviceId =3D Dev->DeviceId; + mDevices[mNumDevices].DevFlags =3D Dev->DevFlags; + mDevices[mNumDevices].RpBus =3D Dev->RpBus; + mDevices[mNumDevices].NumBars =3D Dev->NumBars; + mDevices[mNumDevices].Bars =3D (QEMU_FIXED_BARS_BAR *)( + Ptr + sizeof (QEMU_FIXED_BARS_DEVICE) + ); + mNumDevices++; + + /* Find or create the class entry for this VID:DID. */ + for (ClassIdx =3D 0; ClassIdx < mNumClasses; ClassIdx++) { + if (mClasses[ClassIdx].VendorId =3D=3D Dev->VendorId && + mClasses[ClassIdx].DeviceId =3D=3D Dev->DeviceId) + { + mClasses[ClassIdx].Count++; + break; + } + } + if (ClassIdx =3D=3D mNumClasses) { + mClasses[mNumClasses].VendorId =3D Dev->VendorId; + mClasses[mNumClasses].DeviceId =3D Dev->DeviceId; + mClasses[mNumClasses].Count =3D 1; + mClasses[mNumClasses].CurrentIdx =3D 0; + mNumClasses++; + } + + DEBUG ((DEBUG_INFO, + "QFBD: device %04x:%04x num_bars=3D%u\n", + Dev->VendorId, Dev->DeviceId, Dev->NumBars)); + + Ptr =3D Next; + } + + for (ClassIdx =3D 0; ClassIdx < mNumClasses; ClassIdx++) { + DEBUG ((DEBUG_INFO, + "QFBD: class %04x:%04x count=3D%u\n", + mClasses[ClassIdx].VendorId, mClasses[ClassIdx].DeviceId, + (UINT32)mClasses[ClassIdx].Count)); + } +} + +EFI_STATUS +FixedBarsCheckDevice ( + IN UINTN VendorId, + IN UINTN DeviceId, + OUT VOID **Descriptors, + OUT UINTN *DescriptorsSize + ) +{ + QFBD_DEVICE_CLASS *Class; + QFBD_DEVICE *Dev; + UINTN BarIdx, DevIdx, MatchCount, ClassIdx; + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc; + + *Descriptors =3D NULL; + *DescriptorsSize =3D 0; + + if (mNumClasses =3D=3D 0) { + return EFI_SUCCESS; + } + + /* Look up the per-VID:DID class. */ + Class =3D NULL; + for (ClassIdx =3D 0; ClassIdx < mNumClasses; ClassIdx++) { + if (mClasses[ClassIdx].VendorId =3D=3D (UINT16)VendorId && + mClasses[ClassIdx].DeviceId =3D=3D (UINT16)DeviceId) + { + Class =3D &mClasses[ClassIdx]; + break; + } + } + if (Class =3D=3D NULL) { + return EFI_SUCCESS; /* not a fixed-bar device */ + } + + /* Find the CurrentIdx-th device in mDevices[] matching this VID:DID. */ + Dev =3D NULL; + MatchCount =3D 0; + for (DevIdx =3D 0; DevIdx < mNumDevices; DevIdx++) { + if (mDevices[DevIdx].VendorId =3D=3D (UINT16)VendorId && + mDevices[DevIdx].DeviceId =3D=3D (UINT16)DeviceId) + { + if (MatchCount =3D=3D Class->CurrentIdx) { + Dev =3D &mDevices[DevIdx]; + break; + } + MatchCount++; + } + } + if (Dev =3D=3D NULL) { + return EFI_SUCCESS; + } + + /* Always advance the counter so ordering stays in sync with the blob. */ + Class->CurrentIdx++; + if (Class->CurrentIdx >=3D Class->Count) { + Class->CurrentIdx =3D 0; + } + + if (!(Dev->DevFlags & QEMU_FIXED_BARS_DEV_F_FIXED)) { + return EFI_SUCCESS; + } + + Desc =3D AllocateZeroPool (Dev->NumBars * sizeof (*Desc)); + if (Desc =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + + *Descriptors =3D Desc; + *DescriptorsSize =3D Dev->NumBars * sizeof (*Desc); + + for (BarIdx =3D 0; BarIdx < Dev->NumBars; BarIdx++) { + QEMU_FIXED_BARS_BAR *Bar =3D &Dev->Bars[BarIdx]; + + Desc->Desc =3D ACPI_ADDRESS_SPACE_DESCRIPTOR; + Desc->Len =3D (UINT16)(sizeof (*Desc) - 3); + Desc->ResType =3D ACPI_ADDRESS_SPACE_TYPE_MEM; + Desc->GenFlag =3D ACPI_ADDR_FLAG_FIXED; + Desc->SpecificFlag =3D 0; + Desc->AddrSpaceGranularity =3D (Bar->Flags & QEMU_FIXED_BAR_F_MEM64)= ? 64 : 32; + Desc->AddrRangeMin =3D Bar->Address; + Desc->AddrRangeMax =3D Bar->Size - 1; + Desc->AddrTranslationOffset =3D BarIdx; + Desc->AddrLen =3D Bar->Size; + + DEBUG ((DEBUG_INFO, + "QFBD: %04x:%04x BAR%u -> 0x%016Lx size 0x%016Lx\n", + Dev->VendorId, Dev->DeviceId, + (UINT32)Bar->Bar, Bar->Address, Bar->Size)); + + Desc++; + } + + return EFI_SUCCESS; +} + +EFI_STATUS +FixedBarsInit ( + OUT BOOLEAN *HasFixedBarsDevices + ) +{ + FIRMWARE_CONFIG_ITEM FwCfgItem; + UINTN FwCfgSize; + EFI_STATUS Status; + + *HasFixedBarsDevices =3D FALSE; + + Status =3D QemuFwCfgFindFile ("etc/fixed-bars", &FwCfgItem, &FwCfgSize); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_INFO, "QFBD: etc/fixed-bars absent, nothing to do\n")); + return EFI_SUCCESS; + } + + if (FwCfgSize < sizeof (mHdr)) { + DEBUG ((DEBUG_ERROR, "QFBD: blob too small (%Lu bytes)\n", + (UINT64)FwCfgSize)); + return EFI_UNSUPPORTED; + } + + QemuFwCfgSelectItem (FwCfgItem); + QemuFwCfgReadBytes (sizeof (mHdr), &mHdr); + + if (mHdr.Version !=3D QEMU_FIXED_BARS_VERSION) { + DEBUG ((DEBUG_ERROR, + "QFBD: unsupported blob version %u (expected %u)\n", + mHdr.Version, QEMU_FIXED_BARS_VERSION)); + return EFI_UNSUPPORTED; + } + + if (mHdr.NumDevices =3D=3D 0) { + DEBUG ((DEBUG_INFO, "QFBD: zero devices, nothing to do\n")); + return EFI_SUCCESS; + } + + /* Read the full blob into a persistent buffer; device entries point int= o it. */ + mBlobData =3D AllocatePool (FwCfgSize); + if (mBlobData =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + + QemuFwCfgSelectItem (FwCfgItem); + QemuFwCfgReadBytes (FwCfgSize, mBlobData); + CopyMem (&mHdr, mBlobData, sizeof (mHdr)); + + mDevices =3D AllocateZeroPool (mHdr.NumDevices * sizeof (QFBD_DEVICE)); + if (mDevices =3D=3D NULL) { + FreePool (mBlobData); + return EFI_OUT_OF_RESOURCES; + } + + /* Worst case: every device has a unique VID:DID =E2=80=94 allocate mNum= Devices slots. */ + mClasses =3D AllocateZeroPool (mHdr.NumDevices * sizeof (QFBD_DEVICE_CLA= SS)); + if (mClasses =3D=3D NULL) { + FreePool (mDevices); + FreePool (mBlobData); + return EFI_OUT_OF_RESOURCES; + } + + DEBUG ((DEBUG_INFO, "QFBD: %u device(s)\n", mHdr.NumDevices)); + + mNumDevices =3D 0; + mNumClasses =3D 0; + InitDevices (FwCfgSize); + ReserveFixedBarRanges (); + + *HasFixedBarsDevices =3D TRUE; + + return EFI_SUCCESS; +} diff --git a/OvmfPkg/IncompatiblePciDeviceSupportDxe/FixedBars.h b/OvmfPkg/= IncompatiblePciDeviceSupportDxe/FixedBars.h new file mode 100644 index 0000000000..837399986e --- /dev/null +++ b/OvmfPkg/IncompatiblePciDeviceSupportDxe/FixedBars.h @@ -0,0 +1,63 @@ +/** @file + Public interface for FixedBars.c -- fixed PCI BAR placement using + metadata provided by QEMU through the "etc/fixed-bars" fw_cfg blob. + + Copyright (c) 2026, NVIDIA CORPORATION & AFFILIATES. All rights reserved= .
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef FIXED_BARS_H_ +#define FIXED_BARS_H_ + +#include + +/** + Read and parse the "etc/fixed-bars" fw_cfg blob (if present), and reserve + the fixed BAR address ranges it describes in the GCD memory space map. + + Must be called once, from the owning driver's entry point, before that + driver installs EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL. + + @param[out] HasFixedBarsDevices TRUE if the blob was present and + described at least one fixed-BAR devic= e; + FALSE otherwise (nothing else in this + file has any effect in that case). + + @retval EFI_SUCCESS Blob absent, empty, or successfully parsed. + @retval EFI_UNSUPPORTED Blob present but malformed/wrong version. + @retval EFI_OUT_OF_RESOURCES Memory allocation failure. +**/ +EFI_STATUS +FixedBarsInit ( + OUT BOOLEAN *HasFixedBarsDevices + ); + +/** + Return the fixed-BAR ACPI address-space descriptors for one PCI function, + if it has a matching entry in the "etc/fixed-bars" blob. Returns + *Descriptors =3D=3D NULL, with *DescriptorsSize =3D=3D 0, when the devic= e is not + a fixed-BAR device. + + @param[in] VendorId Device's PCI Vendor ID. + @param[in] DeviceId Device's PCI Device ID. + @param[out] Descriptors Heap-allocated array of + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR, one per + fixed BAR; caller takes ownership. NULL if no + match. + @param[out] DescriptorsSize Size in bytes of *Descriptors. + + @retval EFI_SUCCESS Always, on non-allocation-failure paths + (matches EFI_INCOMPATIBLE_PCI_DEVICE_SUPPO= RT_ + PROTOCOL.CheckDevice()'s own contract). + @retval EFI_OUT_OF_RESOURCES Memory allocation failure. +**/ +EFI_STATUS +FixedBarsCheckDevice ( + IN UINTN VendorId, + IN UINTN DeviceId, + OUT VOID **Descriptors, + OUT UINTN *DescriptorsSize + ); + +#endif diff --git a/OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceS= upport.c b/OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSup= port.c index ebf73d97db..5e40936f81 100644 --- a/OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.c +++ b/OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.c @@ -22,6 +22,8 @@ =20 #include =20 +#include "FixedBars.h" + // // The protocol interface this driver produces. // @@ -165,6 +167,57 @@ STATIC CONST EFI_ACPI_END_TAG_DESCRIPTOR mEndDesc =3D= { =20 @retval EFI_SUCCESS The function always returns EFI_SUCCESS. **/ +/** + This function copies Buffer into Configuration, then appends the + confidential-VM option ROM descriptor if applicable, and finally + appends the terminating End Tag. + + @param[in] Buffer Descriptor bytes. + @param[in] BufferSize Size in bytes of Buffer. + @param[out] Configuration As in CheckDevice(). + + @retval EFI_SUCCESS Configuration built and returned. + @retval EFI_OUT_OF_RESOURCES Memory allocation failure. +**/ +STATIC +EFI_STATUS +BuildConfiguration ( + IN CONST VOID *Buffer, + IN UINTN BufferSize, + OUT VOID **Configuration + ) +{ + UINTN Length; + UINT8 *Ptr; + + Length =3D BufferSize + sizeof mEndDesc; + + // + // In Td guest OptionRom is not allowed. + // + if (CcProbe ()) { + Length +=3D sizeof mOptionRomConfiguration; + } + + *Configuration =3D AllocateZeroPool (Length); + if (*Configuration =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + + Ptr =3D (UINT8 *)(UINTN)*Configuration; + CopyMem (Ptr, Buffer, BufferSize); + Length =3D BufferSize; + + if (CcProbe ()) { + CopyMem (Ptr + Length, &mOptionRomConfiguration, sizeof mOptionRomConf= iguration); + Length +=3D sizeof mOptionRomConfiguration; + } + + CopyMem (Ptr + Length, &mEndDesc, sizeof mEndDesc); + + return EFI_SUCCESS; +} + STATIC EFI_STATUS EFIAPI @@ -178,8 +231,25 @@ CheckDevice ( OUT VOID **Configuration ) { - UINTN Length; - UINT8 *Ptr; + EFI_STATUS Status; + VOID *FixedBarsDescs; + UINTN FixedBarsDescsSize; + + // + // Dispatch hook: if this device has an entry in the "etc/fixed-bars" + // fw_cfg blob, use that instead of the hardcoded 64-bit-MMIO-preference + // descriptor below. + // + Status =3D FixedBarsCheckDevice (VendorId, DeviceId, &FixedBarsDescs, &F= ixedBarsDescsSize); + if (EFI_ERROR (Status)) { + return Status; + } + + if (FixedBarsDescs !=3D NULL) { + Status =3D BuildConfiguration (FixedBarsDescs, FixedBarsDescsSize, Con= figuration); + FreePool (FixedBarsDescs); + return Status; + } =20 // // Unlike the general description of this protocol member suggests, ther= e is @@ -200,18 +270,8 @@ CheckDevice ( // the edk2 PCI Bus UEFI_DRIVER actually handles error codes; see the // UpdatePciInfo() function. // - Length =3D sizeof mMmio64Configuration + sizeof mEndDesc; - - // - // In Td guest OptionRom is not allowed. - // - if (CcProbe ()) { - Length +=3D sizeof mOptionRomConfiguration; - } - - *Configuration =3D AllocateZeroPool (Length); - - if (*Configuration =3D=3D NULL) { + Status =3D BuildConfiguration (&mMmio64Configuration, sizeof mMmio64Conf= iguration, Configuration); + if (EFI_ERROR (Status)) { DEBUG (( DEBUG_WARN, "%a: 64-bit MMIO BARs may be degraded for PCI 0x%04x:0x%04x (rev %d)= \n", @@ -220,21 +280,9 @@ CheckDevice ( (UINT32)DeviceId, (UINT8)RevisionId )); - return EFI_OUT_OF_RESOURCES; } =20 - Ptr =3D (UINT8 *)(UINTN)*Configuration; - CopyMem (Ptr, &mMmio64Configuration, sizeof mMmio64Configuration); - Length =3D sizeof mMmio64Configuration; - - if (CcProbe ()) { - CopyMem (Ptr + Length, &mOptionRomConfiguration, sizeof mOptionRomConf= iguration); - Length +=3D sizeof mOptionRomConfiguration; - } - - CopyMem (Ptr + Length, &mEndDesc, sizeof mEndDesc); - - return EFI_SUCCESS; + return Status; } =20 /** @@ -257,12 +305,18 @@ DriverInitialize ( ) { EFI_STATUS Status; + BOOLEAN HasFixedBarsDevices; + + Status =3D FixedBarsInit (&HasFixedBarsDevices); + if (EFI_ERROR (Status)) { + return Status; + } =20 // - // If there is no 64-bit PCI MMIO aperture, then 64-bit MMIO BARs have t= o be - // allocated under 4 GB unconditionally. + // If there is no 64-bit PCI MMIO aperture and no fixed-bars devices to + // place, do not install the protocol. // - if (PcdGet64 (PcdPciMmio64Size) =3D=3D 0) { + if ((PcdGet64 (PcdPciMmio64Size) =3D=3D 0) && !HasFixedBarsDevices) { return EFI_UNSUPPORTED; } =20 diff --git a/OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceS= upport.inf b/OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceS= upport.inf index b92662d0bb..b51f51c25e 100644 --- a/OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.= inf +++ b/OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.= inf @@ -18,21 +18,27 @@ =20 [Sources] IncompatiblePciDeviceSupport.c + FixedBars.c + FixedBars.h =20 [Packages] MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec OvmfPkg/OvmfPkg.dec =20 [LibraryClasses] + BaseMemoryLib CcProbeLib DebugLib + DxeServicesTableLib MemoryAllocationLib PcdLib + QemuFwCfgLib UefiBootServicesTableLib UefiDriverEntryPoint =20 [Protocols] - gEfiIncompatiblePciDeviceSupportProtocolGuid ## SOMETIMES_PRODUCES + gEfiIncompatiblePciDeviceSupportProtocolGuid ## SOMETIMES_PRODUCES =20 [Pcd] gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size ## CONSUMES --=20 2.34.1 From nobody Sat Sep 26 22:14:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: permerror client-ip=2a01:111:f403:c005::5; envelope-from=tdave@nvidia.com; helo=CO1PR03CU002.outbound.protection.outlook.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FORGED_SPF_HELO=1, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @Nvidia.com) X-ZM-MESSAGEID: 1789586713866158500 Content-Type: text/plain; charset="utf-8" CalculateResourceAperture() sizes a PCI bridge's resource window from its children's Length and Alignment, without accounting for a fixed base address assigned to a child BAR by EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL. As a result, the bridge window does not cover the fixed BAR, and ProgramPpbApperture() programs the resource allocator's base instead of the fixed base. Track Fixed and FixedBase in PCI_RESOURCE_NODE and add ResourceNodeIsFixed() to identify fixed BARs and bridge windows inherited from fixed children. When a bridge has fixed children, CalculateResourceAperture() now sizes and places the bridge window to cover the union of their fixed address ranges. Bridges without fixed children retain the existing behavior. ProgramPpbApperture() also honors FixedBase when programming the bridge window, consistent with ProgramBar() for fixed BARs. Signed-off-by: Tushar Dave --- .../Bus/Pci/PciBusDxe/PciResourceSupport.c | 110 ++++++++++++++++++ .../Bus/Pci/PciBusDxe/PciResourceSupport.h | 7 ++ 2 files changed, 117 insertions(+) diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c b/MdeModul= ePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c index 169011e647..0aa3465636 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c @@ -324,6 +324,35 @@ CalculateApertureIo16 ( Bridge->Length =3D MAX (Bridge->Length, PaddingAperture); } =20 +/** + Return TRUE, with the fixed base address, if Node must be placed at a + specific address instead of anywhere satisfying Length/Alignment. Node is + either a BAR marked fixed by IncompatiblePciDeviceSupport, or a + child bridge whose own window was already determined to be fixed. + + @param Node Resource node to check. + @param FixedBase Fixed base address of Node. + + @retval TRUE Node requires a fixed base address. + @retval FALSE Node has no fixed base address requirement. + +**/ +STATIC +BOOLEAN +ResourceNodeIsFixed ( + IN PCI_RESOURCE_NODE *Node, + OUT UINT64 *FixedBase + ) +{ + if (IS_PCI_BRIDGE (&Node->PciDev->Pci)) { + *FixedBase =3D Node->FixedBase; + return Node->Fixed; + } + + *FixedBase =3D Node->PciDev->PciBar[Node->Bar].FixedBaseAddress; + return Node->PciDev->PciBar[Node->Bar].HasFixedBaseAddress; +} + /** This function is used to calculate the resource aperture for a given bridge device. @@ -339,6 +368,10 @@ CalculateResourceAperture ( UINT64 Aperture[2]; LIST_ENTRY *CurrentLink; PCI_RESOURCE_NODE *Node; + UINT64 ChildFixedBase; + UINT64 FixedMin; + UINT64 FixedMax; + UINT64 NextFreeAddr; =20 if (Bridge =3D=3D NULL) { return; @@ -349,6 +382,71 @@ CalculateResourceAperture ( return; } =20 + // + // If at least one child requires a fixed base address, size and place + // this bridge's window as the exact union of those addresses instead of + // packing children by size and alignment alone. + // + FixedMin =3D MAX_UINT64; + FixedMax =3D 0; + for ( CurrentLink =3D GetFirstNode (&Bridge->ChildList) + ; !IsNull (&Bridge->ChildList, CurrentLink) + ; CurrentLink =3D GetNextNode (&Bridge->ChildList, CurrentLink) + ) + { + Node =3D RESOURCE_NODE_FROM_LINK (CurrentLink); + + if (ResourceNodeIsFixed (Node, &ChildFixedBase)) { + FixedMin =3D MIN (FixedMin, ChildFixedBase); + FixedMax =3D MAX (FixedMax, ChildFixedBase + Node->Length); + } + } + + if (FixedMin < FixedMax) { + Bridge->Fixed =3D TRUE; + Bridge->FixedBase =3D FixedMin & ~Bridge->Alignment; + NextFreeAddr =3D FixedMax; + + for ( CurrentLink =3D GetFirstNode (&Bridge->ChildList) + ; !IsNull (&Bridge->ChildList, CurrentLink) + ; CurrentLink =3D GetNextNode (&Bridge->ChildList, CurrentLink) + ) + { + Node =3D RESOURCE_NODE_FROM_LINK (CurrentLink); + + if (ResourceNodeIsFixed (Node, &ChildFixedBase)) { + Node->Offset =3D ChildFixedBase - Bridge->FixedBase; + FixedMax =3D MAX (FixedMax, Node->Offset + Node->Length + Brid= ge->FixedBase); + + DEBUG ((DEBUG_INFO, + "PciBus: bridge %02x:%02x.%x child %02x:%02x.%x BAR[%d] fi= xed at 0x%016Lx, length 0x%Lx\n", + Bridge->PciDev->BusNumber, Bridge->PciDev->DeviceNumber, B= ridge->PciDev->FunctionNumber, + Node->PciDev->BusNumber, Node->PciDev->DeviceNumber, Node-= >PciDev->FunctionNumber, + Node->Bar, ChildFixedBase, Node->Length)); + } else { + Node->Offset =3D ALIGN_VALUE (NextFreeAddr - Bridge->FixedBase, N= ode->Alignment + 1); + NextFreeAddr =3D Bridge->FixedBase + Node->Offset + Node->Length; + } + } + + Bridge->Length =3D ALIGN_VALUE (MAX (FixedMax, NextFreeAddr) - Bridge-= >FixedBase, Bridge->Alignment + 1); + + DEBUG ((DEBUG_INFO, + "PciBus: bridge %02x:%02x.%x fixed window [0x%016Lx, 0x%016Lx]= \n", + Bridge->PciDev->BusNumber, Bridge->PciDev->DeviceNumber, Bridg= e->PciDev->FunctionNumber, + Bridge->FixedBase, Bridge->FixedBase + Bridge->Length - 1)); + + CurrentLink =3D Bridge->ChildList.ForwardLink; + if (CurrentLink !=3D &Bridge->ChildList) { + Node =3D RESOURCE_NODE_FROM_LINK (CurrentLink); + if (Node->Alignment > Bridge->Alignment) { + Bridge->Alignment =3D Node->Alignment; + } + } + + return; + } + Aperture[PciResUsageTypical] =3D 0; Aperture[PciResUsagePadding] =3D 0; // @@ -1468,6 +1566,18 @@ ProgramPpbApperture ( PciIo =3D &(Node->PciDev->PciIo); Address =3D Base + Node->Offset; =20 + // + // If CalculateResourceAperture() determined this window must cover a + // fixed BAR, use its base directly. + // + if (Node->Fixed) { + Address =3D Node->FixedBase; + DEBUG ((DEBUG_INFO, + "PciBus: bridge %02x:%02x.%x fixed window base 0x%016Lx (GCD 0= x%016Lx)\n", + Node->PciDev->BusNumber, Node->PciDev->DeviceNumber, Node->Pci= Dev->FunctionNumber, + Address, Base + Node->Offset)); + } + // // Indicate the PPB resource has been allocated // diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h b/MdeModul= ePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h index 148d9503c8..0682237d74 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h @@ -28,6 +28,13 @@ typedef struct { BOOLEAN Reserved; PCI_RESOURCE_USAGE ResourceUsage; BOOLEAN Virtual; + + // + // TRUE if this bridge's aggregate window must be placed at + // FixedBase, because it has at least one fixed descendant. + // + BOOLEAN Fixed; + UINT64 FixedBase; } PCI_RESOURCE_NODE; =20 #define RESOURCE_NODE_FROM_LINK(a) \ --=20 2.34.1