From nobody Sat Sep 26 20:50:56 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1788185496; cv=none; d=zohomail.com; s=zohoarc; b=Dh5Ni+G6RYtK5ruyK1VjE+1NudUYIInnTkHdGjgQoSVRVWcpHR2rVKjtkiFpKNobD2ThWjNXS0Pnf1LOVZaX84R/wca/p5j7yddOIguk/JhEGxuSK10jd7I6ePDLNWKkqM1wujkQAo6PYujisCSHM3mGOPnB2/MctuBFoVOJ06g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1788185496; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=KRbWU9q52d0/x4ooipoZEsStKY3UhJIoyWXZCa1Lr1w=; b=FnCw5OLshQOxS7MNr/6S/IBS2nHQbpzwei0Lz4JmU5J3PvzAC3mQydcHkn+49od46VKQIo+iEW4p51Fsh8vlSxRW6CIBkEa6P/pqpkzkB8UgKk0yl9o2L5sCwhk/8F9R/fP0RipnHooDCEjdfMTHpvT/pT9XVm2qcTRi461h1JY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1788185496495723.7460469196872; Mon, 31 Aug 2026 07:11:36 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1x12iR-0003MI-Ec; Mon, 31 Aug 2026 10:10:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x12iQ-0003HW-Eh for qemu-devel@nongnu.org; Mon, 31 Aug 2026 10:10:26 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x12iN-0006cw-LH for qemu-devel@nongnu.org; Mon, 31 Aug 2026 10:10:26 -0400 Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67VB9wZi3447038 for ; Mon, 31 Aug 2026 14:10:17 GMT Received: from mail-oa1-f70.google.com (mail-oa1-f70.google.com [209.85.160.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gd6rb967q-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 31 Aug 2026 14:10:16 +0000 (GMT) Received: by mail-oa1-f70.google.com with SMTP id 586e51a60fabf-46509ab0149so4135642fac.2 for ; Mon, 31 Aug 2026 07:10:16 -0700 (PDT) Received: from QCOM-UWl2o8bcGT.qualcomm.com ([152.250.131.13]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-468a3535e25sm9886129fac.5.2026.08.31.07.10.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2026 07:10:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=KRbWU9q52d0 /x4ooipoZEsStKY3UhJIoyWXZCa1Lr1w=; b=mG7lnXjanBaytrMX0NFyiUvb0ij YgNI3fE432vlNuVFGhl/EhoDaOZpVGhlfMO9wC4Sx6ZXydJbiwmEeCEDrl3+r7si LHz1XJqpwRDLg51hfHsz3oTSU+9LkULU0PhcofwqPluTy4dEEwEc7eMTtZ6vw44L yeQrQd0GuZZz3kRqN68fEAEi/TVsuJ7Hx9O6s3/jsrmPCNJ1GYjqr3M2fse5tDl0 VXHScYHCQipVPotSHhzsD7UnT/edvGVb2wjYrX78e8l5kDnav2JOCq9h+70qiX4e wzX0vh6EV9Uu9JTGmSY0BkpTRjofVjGbdphZB3EIrx7SB+SXWZ+U2vjab3w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1788185416; x=1788790216; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=KRbWU9q52d0/x4ooipoZEsStKY3UhJIoyWXZCa1Lr1w=; b=KCq54O8EXtQcV9hb9fbipiOT317uIhQSn+4M89YgcTgYInwiDF9jUMaDU1PAcGwK7K 39Fd7w0moUE8v0ANno1f5I2XbBBdjoPuDuGbHxIfPOmukMWyBX03FmrTGdK3g3e+iZQm +V5Eyh1Ha7LPHSedlAniuQdDaRGYw+ZYzpljSn9C+Th2oghavukJM4CjG7ORjKkubNSu pKHKWB7VrwBU2pw1Ehor6Gn+KHuhMZ0pIkpJL/NAaBq0NsSx9fUDkRHFk4KZT8OxIcO/ /DZL4hSifbNcBhv6iXZYDUU8IzI1RvdamPThRfh3PFDcnWtzkompiyBr68kFJapAkHH2 7qSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1788185416; x=1788790216; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=KRbWU9q52d0/x4ooipoZEsStKY3UhJIoyWXZCa1Lr1w=; b=Vhy81PvIUDPA9daY7m5cpQm7sSwr+NAi+19KQsYLJtCqcSC9NnJzWKgVTr8lxw1DTO XVS3jKOHdvjxg3vYsH4h1B9z64NflsG14OsRKdsjGbgxA9xvGwKcd8CFoUplz3rCwI11 vnKTM2/gTvukYnq7q4GNs1KfpN+wywwvZQeLIEJ4N8D8SZ3F8qTTU/VMxN8NzrM8o8GM KdHvpYLMPFw2zAraj2GwYbmP3VyhCJJuzKL0aQEhobkLEjqX5DLTOMFilma53UFFnfgE wNCHofvjp5o29jKYh5sB0WcyYiHkYuJjLXV5tUJITRxfziNsiHSNt/Oong+ViCY0P4vp fJrg== X-Gm-Message-State: AFuF++m7zfClbhjGsaGMuXl8uCokMp7ALs20QoNhBgJMbAFToQzaOA+w 5FG9+EFNT+dsH7H3HMZJMz0IHxfeC9AoIoaeAlWpADRdk+BOC0OR8Dviy9vnQbqSnae7Xy7fMd5 RbTAn0P7uBQBTXGRsmrB89VzgqZzMOvkSZqPI4bM+wJXvZpEOY7PMqqVgLW6zky8cSA== X-Gm-Gg: AR+sD11ANUlGOkI7NTE11xL2FpfPkcepsEfzszroC/S024MXHny89ih7He2qbO3ZI62 V2cyqMCahb5gj6ovF2pXDuwmVdZkSPxV+fx5cO1t6tj27VhJ8YwuEmY/m37oATFXOZz23iiwm4F vkemy/eqy8J6Mh2kNI5rG/MhX6kXXh3XEiwbz92v7LtB3Z0M3Dnhvj3UGV9eemE15ogR/nTB0j2 UI0YNcL2Mi9xNllBJUq8SCSn9V1O75gwvgCuLQfnD/iqtwHvqnpcjT6eZHvJK1wwN62+5JwxcMV Tv2bMcnV18yrMVdCkcgVJX6ka5V/PguO53a87QvZqE+8hj/uoOYdjzWqBTy133V9zHIHKPqwdQQ mKIu6TSePhioJv5drRO0IITmTV7tt0+qnhb/mrA== X-Received: by 2002:a05:6871:cc15:10b0:468:41ce:1675 with SMTP id 586e51a60fabf-46841cf2b5dmr17989223fac.0.1788185416029; Mon, 31 Aug 2026 07:10:16 -0700 (PDT) X-Received: by 2002:a05:6871:cc15:10b0:468:41ce:1675 with SMTP id 586e51a60fabf-46841cf2b5dmr17989173fac.0.1788185415414; Mon, 31 Aug 2026 07:10:15 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, chao.liu@processmission.com, Chao Liu , Daniel Henrique Barboza , Tao Tang , Palmer Dabbelt Subject: [PATCH v7 1/7] target/riscv: add sdext debug CSRs state Date: Mon, 31 Aug 2026 11:10:00 -0300 Message-ID: <20260831141007.353854-2-daniel.barboza@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831141007.353854-1-daniel.barboza@oss.qualcomm.com> References: <20260831141007.353854-1-daniel.barboza@oss.qualcomm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: hGF6WefEdeDQGmPtDMuZ9kFncEvNFCP_ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDEyMiBTYWx0ZWRfXzknWzUgtzl8K 8V7obR6qJLnpk73UTkTGlP7HIT7AjP2FJr4l9bbPgGlybyvsXEpEJzOrAYaENRVxGyib0B2VBVO eOhw3AV2DT7mpFnTYvvQ64QbFXfoejO72AqZHMXGiMHpZtJQWd8NBqY6Fxn0ZFPsPzMtOUGnLDP C0S1Ss7TjPpmuYLwCIYwM+cbfO8Lzp3nKs1UAXjMZQGAYHO0gUiZnfX44de491XKEp+oLwni13G v9+CbsurA9oQILcsRY9fT2ml2mE6Xcu0J2AR9SsLL8NoSpMfSRZgdIlXeAXe6GoswhOP9KYiDld A0Fwv2FeIDitRypd4xYq8GomypDqCEskL5m1zeECnRMU6vRfsuihdi3rDBYsdt9uZHKlF0RbAE0 4ozxz1f6h2OhEMtfGnDiiJSHWb+8mKCBV8V04tVQkpY+2GF0UqiSFDSk+uFnkVS5oKXGSAjN4uH 8zGlB8MavdxdYfEZHzg== X-Proofpoint-GUID: hGF6WefEdeDQGmPtDMuZ9kFncEvNFCP_ X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDEyMiBTYWx0ZWRfXxmJB+vn9nalq KewY5/5dnUjBpqI8UHstQ0Yb66KNcNA2oT9EVz9Shg/g5Pm9xWMhAkHJ5jwghGEkTorxrG1sa4X EfKj85m9awdERuIgjvRx1BAWP7UG72c= X-Authority-Analysis: v=2.4 cv=d/fFDxjE c=1 sm=1 tr=0 ts=6a958b49 cx=c_pps a=nSjmGuzVYOmhOUYzIAhsAg==:117 a=CXdxNCAnTuDr1kYd6DjE4g==:17 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=xvfqbYfxAAAA:20 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=fgrLqfBXAAAA:8 a=8aUGYKOvqt1NoZA4oJ4A:9 a=1zu1i0D7hVQfj8NKfPKu:22 a=_Ge82aPy-h_wFa7gWU4u:22 a=bA3UWDv6hWIuX7UZL3qL:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_04,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 suspectscore=0 impostorscore=0 spamscore=0 phishscore=0 priorityscore=1501 clxscore=1015 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310122 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=daniel.barboza@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1788185498300154100 Content-Type: text/plain; charset="utf-8" From: Chao Liu RISC-V Debug Specification: https://github.com/riscv/riscv-debug-spec/releases/tag/1.0 Add architectural state for Sdext Debug Mode: debug_mode, dcsr, dpc and dscratch0/1. Wire up CSR access for dcsr/dpc/dscratch and gate them to Debug Mode (or host debugger access). The Sdext is not fully implemented, so it is disabled by default. Signed-off-by: Chao Liu Reviewed-by: Daniel Henrique Barboza Tested-by: Tao Tang --- target/riscv/cpu.c | 7 ++ target/riscv/cpu.h | 4 + target/riscv/cpu_bits.h | 33 ++++++++ target/riscv/cpu_cfg_fields.h.inc | 1 + target/riscv/machine.c | 20 +++++ target/riscv/tcg/csr.c | 126 ++++++++++++++++++++++++++++++ 6 files changed, 191 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 61109672d6..c2078473aa 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -248,6 +248,7 @@ const RISCVIsaExtData isa_edata_arr[] =3D { ISA_EXT_DATA_ENTRY(zvkt, PRIV_VERSION_1_12_0, ext_zvkt), ISA_EXT_DATA_ENTRY(zhinx, PRIV_VERSION_1_12_0, ext_zhinx), ISA_EXT_DATA_ENTRY(zhinxmin, PRIV_VERSION_1_12_0, ext_zhinxmin), + ISA_EXT_DATA_ENTRY(sdext, PRIV_VERSION_1_12_0, ext_sdext), ISA_EXT_DATA_ENTRY(sdtrig, PRIV_VERSION_1_12_0, ext_sdtrig), ISA_INTERNAL_EXT_DATA_ENTRY(shcounterenw, PRIV_VERSION_1_12_0, has_priv_1_12), @@ -1091,6 +1092,12 @@ static void riscv_cpu_reset_hold(Object *obj, ResetT= ype type) =20 #ifndef CONFIG_USER_ONLY #ifdef CONFIG_TCG + env->debug_mode =3D false; + env->dcsr =3D DCSR_DEBUGVER(4); + env->dpc =3D 0; + env->dscratch[0] =3D 0; + env->dscratch[1] =3D 0; + if (cpu->cfg.debug || cpu->cfg.ext_sdtrig) { riscv_trigger_reset_hold(env); } diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 718b66487a..74bddc8415 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -507,6 +507,10 @@ struct CPUArchState { =20 /* True if in debugger mode. */ bool debugger; + bool debug_mode; + target_ulong dcsr; + target_ulong dpc; + target_ulong dscratch[2]; =20 uint64_t mstateen[SMSTATEEN_MAX_COUNT]; uint64_t hstateen[SMSTATEEN_MAX_COUNT]; diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h index c01050ce2b..769c945517 100644 --- a/target/riscv/cpu_bits.h +++ b/target/riscv/cpu_bits.h @@ -467,6 +467,39 @@ #define CSR_DCSR 0x7b0 #define CSR_DPC 0x7b1 #define CSR_DSCRATCH 0x7b2 +#define CSR_DSCRATCH1 0x7b3 + +/* DCSR fields */ +#define DCSR_XDEBUGVER_SHIFT 28 +#define DCSR_XDEBUGVER_MASK (0xfu << DCSR_XDEBUGVER_SHIFT) +#define DCSR_DEBUGVER(val) ((target_ulong)(val) << DCSR_XDEBUGVER_SHI= FT) +#define DCSR_EXTCAUSE_SHIFT 24 +#define DCSR_EXTCAUSE_MASK (0x7u << DCSR_EXTCAUSE_SHIFT) +#define DCSR_CETRIG BIT(19) +#define DCSR_PELP BIT(18) +#define DCSR_EBREAKVS BIT(17) +#define DCSR_EBREAKVU BIT(16) +#define DCSR_EBREAKM BIT(15) +#define DCSR_EBREAKS BIT(13) +#define DCSR_EBREAKU BIT(12) +#define DCSR_STEPIE BIT(11) +#define DCSR_STOPCOUNT BIT(10) +#define DCSR_STOPTIME BIT(9) +#define DCSR_CAUSE_SHIFT 6 +#define DCSR_CAUSE_MASK (0x7u << DCSR_CAUSE_SHIFT) +#define DCSR_V BIT(5) +#define DCSR_MPRVEN BIT(4) +#define DCSR_NMIP BIT(3) +#define DCSR_STEP BIT(2) +#define DCSR_PRV_MASK 0x3u + +#define DCSR_CAUSE_EBREAK 1 +#define DCSR_CAUSE_TRIGGER 2 +#define DCSR_CAUSE_HALTREQ 3 +#define DCSR_CAUSE_STEP 4 +#define DCSR_CAUSE_RESET 5 +#define DCSR_CAUSE_GROUP 6 +#define DCSR_CAUSE_OTHER 7 =20 /* Performance Counters */ #define CSR_MHPMCOUNTER3 0xb03 diff --git a/target/riscv/cpu_cfg_fields.h.inc b/target/riscv/cpu_cfg_field= s.h.inc index f91c780299..24f3606f94 100644 --- a/target/riscv/cpu_cfg_fields.h.inc +++ b/target/riscv/cpu_cfg_fields.h.inc @@ -105,6 +105,7 @@ BOOL_FIELD(ext_zvfbfmin) BOOL_FIELD(ext_zvfbfwma) BOOL_FIELD(ext_zvfh) BOOL_FIELD(ext_zvfhmin) +BOOL_FIELD(ext_sdext) BOOL_FIELD(ext_sdtrig) BOOL_FIELD(ext_smaia) BOOL_FIELD(ext_ssaia) diff --git a/target/riscv/machine.c b/target/riscv/machine.c index 74edb8c2b5..aba162d0f1 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -302,6 +302,25 @@ static const VMStateDescription vmstate_debug =3D { VMSTATE_VARRAY_UINT32(env.tdata3, RISCVCPU, env.num_triggers, 0, vmstate_info_uint64, uint64_t), + VMSTATE_BOOL_V(env.debug_mode, RISCVCPU, 3), + VMSTATE_UINTTL_V(env.dcsr, RISCVCPU, 3), + VMSTATE_UINTTL_V(env.dpc, RISCVCPU, 3), + VMSTATE_UINTTL_ARRAY_V(env.dscratch, RISCVCPU, 2, 3), + VMSTATE_END_OF_LIST() + } +}; + +static const VMStateDescription vmstate_sdext =3D { + .name =3D "cpu/sdext", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D debug_needed, + .post_load =3D debug_post_load, + .fields =3D (const VMStateField[]) { + VMSTATE_BOOL_V(env.debug_mode, RISCVCPU, 3), + VMSTATE_UINTTL_V(env.dcsr, RISCVCPU, 3), + VMSTATE_UINTTL_V(env.dpc, RISCVCPU, 3), + VMSTATE_UINTTL_ARRAY_V(env.dscratch, RISCVCPU, 2, 3), VMSTATE_END_OF_LIST() } }; @@ -577,6 +596,7 @@ const VMStateDescription vmstate_riscv_cpu =3D { &vmstate_ctr, &vmstate_sstc, &vmstate_mseccfg, + &vmstate_sdext, NULL } }; diff --git a/target/riscv/tcg/csr.c b/target/riscv/tcg/csr.c index bd4b6dc114..988261cccf 100644 --- a/target/riscv/tcg/csr.c +++ b/target/riscv/tcg/csr.c @@ -3207,6 +3207,126 @@ static RISCVException write_mtval(CPURISCVState *en= v, int csrno, return RISCV_EXCP_NONE; } =20 +#if !defined(CONFIG_USER_ONLY) +static RISCVException sdext(CPURISCVState *env, int csrno) +{ + if (!riscv_cpu_cfg(env)->ext_sdext) { + return RISCV_EXCP_ILLEGAL_INST; + } + + if (!env->debug_mode && !env->debugger) { + return RISCV_EXCP_ILLEGAL_INST; + } + + return RISCV_EXCP_NONE; +} + +static target_ulong dcsr_visible_mask(CPURISCVState *env) +{ + target_ulong mask =3D (target_ulong)-1; + RISCVCPU *cpu =3D env_archcpu(env); + + if (!riscv_has_ext(env, RVH)) { + mask &=3D ~(DCSR_EBREAKVS | DCSR_EBREAKVU | DCSR_V); + } + if (!riscv_has_ext(env, RVS)) { + mask &=3D ~DCSR_EBREAKS; + } + if (!riscv_has_ext(env, RVU)) { + mask &=3D ~DCSR_EBREAKU; + } + if (!cpu->cfg.ext_zicfilp) { + mask &=3D ~DCSR_PELP; + } + if (!cpu->cfg.ext_smdbltrp) { + mask &=3D ~DCSR_CETRIG; + } + + return mask; +} + +static RISCVException read_dcsr(CPURISCVState *env, int csrno, + target_ulong *val) +{ + *val =3D env->dcsr & dcsr_visible_mask(env); + return RISCV_EXCP_NONE; +} + +static target_ulong dcsr_writable_mask(CPURISCVState *env) +{ + target_ulong mask =3D DCSR_EBREAKM | DCSR_EBREAKS | DCSR_EBREAKU | + DCSR_STEPIE | DCSR_STOPCOUNT | DCSR_STOPTIME | + DCSR_STEP | DCSR_PRV_MASK; + RISCVCPU *cpu =3D env_archcpu(env); + + mask |=3D DCSR_MPRVEN; + + if (riscv_has_ext(env, RVH)) { + mask |=3D DCSR_EBREAKVS | DCSR_EBREAKVU | DCSR_V; + } + if (riscv_has_ext(env, RVS)) { + mask |=3D DCSR_EBREAKS; + } + if (riscv_has_ext(env, RVU)) { + mask |=3D DCSR_EBREAKU; + } + if (cpu->cfg.ext_zicfilp) { + mask |=3D DCSR_PELP; + } + if (cpu->cfg.ext_smdbltrp) { + mask |=3D DCSR_CETRIG; + } + + return mask; +} + +static RISCVException write_dcsr(CPURISCVState *env, int csrno, + target_ulong val, uintptr_t ra) +{ + target_ulong mask =3D dcsr_writable_mask(env); + target_ulong new_val =3D env->dcsr; + + new_val &=3D ~mask; + new_val |=3D val & mask; + new_val &=3D ~DCSR_XDEBUGVER_MASK; + new_val |=3D DCSR_DEBUGVER(4); + env->dcsr =3D new_val; + return RISCV_EXCP_NONE; +} + +static RISCVException read_dpc(CPURISCVState *env, int csrno, + target_ulong *val) +{ + *val =3D env->dpc & get_xepc_mask(env); + return RISCV_EXCP_NONE; +} + +static RISCVException write_dpc(CPURISCVState *env, int csrno, + target_ulong val, uintptr_t ra) +{ + env->dpc =3D val & get_xepc_mask(env); + return RISCV_EXCP_NONE; +} + +static RISCVException read_dscratch(CPURISCVState *env, int csrno, + target_ulong *val) +{ + int index =3D (csrno =3D=3D CSR_DSCRATCH1) ? 1 : 0; + + *val =3D env->dscratch[index]; + return RISCV_EXCP_NONE; +} + +static RISCVException write_dscratch(CPURISCVState *env, int csrno, + target_ulong val, uintptr_t ra) +{ + int index =3D (csrno =3D=3D CSR_DSCRATCH1) ? 1 : 0; + + env->dscratch[index] =3D val; + return RISCV_EXCP_NONE; +} +#endif /* !CONFIG_USER_ONLY */ + /* Execution environment configuration setup */ static RISCVException read_menvcfg(CPURISCVState *env, int csrno, target_ulong *val) @@ -6435,6 +6555,12 @@ riscv_csr_operations csr_ops[CSR_TABLE_SIZE] =3D { [CSR_TDATA3] =3D { "tdata3", debug, read_tdata, write_tdata = }, [CSR_TINFO] =3D { "tinfo", debug, read_tinfo, write_ignore = }, [CSR_MCONTEXT] =3D { "mcontext", debug, read_mcontext, write_mcontex= t }, +#if !defined(CONFIG_USER_ONLY) + [CSR_DCSR] =3D { "dcsr", sdext, read_dcsr, write_dcsr }, + [CSR_DPC] =3D { "dpc", sdext, read_dpc, write_dpc }, + [CSR_DSCRATCH] =3D { "dscratch0", sdext, read_dscratch, write_dscrat= ch }, + [CSR_DSCRATCH1] =3D { "dscratch1", sdext, read_dscratch, write_dscrat= ch }, +#endif =20 [CSR_MCTRCTL] =3D { "mctrctl", ctr_mmode, NULL, NULL, rmw_xctrc= tl }, [CSR_SCTRCTL] =3D { "sctrctl", ctr_smode, NULL, NULL, rmw_xctrc= tl }, --=20 2.43.0 From nobody Sat Sep 26 20:50:56 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1788185435; cv=none; d=zohomail.com; s=zohoarc; b=g+YBtQ+/tXjrSoMXPNqT33eU7hJ6yuVPjLuJ0EjGmV2RA/g+wy83Dx9Avp8tCWWbEL5UleFyccomxNJoYOUjivD05QsasbPiL2GU8VLSJt42P0Q693OEQdkNQ4QdIzF3hAvfyis+XAyh/FuANa+3fwMZqUIsyVEFLwQT/qmvzmA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1788185435; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=yfXdQqf3P3pqApv+GltJ5vh6DxK8OZMRliAbZOpBLhY=; b=bayc4z4I7tk53n1MTIcruE2viKQBUfjWnerQKh/PiTUmaxoJLi7SowqKiXr6BDfwjUkP0fiha6lF7zbPldBOWEEmKfXMwkktTqbhb/C16hWk+qNF6GfJ88TZ9qJY7g4V7LJH/NQJpks048zuSwUVagLTmmMomM8KK+ZAZ1Dlnxo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1788185435905372.91194286329426; Mon, 31 Aug 2026 07:10:35 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1x12iU-0003Yz-2v; Mon, 31 Aug 2026 10:10:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x12iS-0003P4-AA for qemu-devel@nongnu.org; Mon, 31 Aug 2026 10:10:28 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x12iN-0006dQ-UO for qemu-devel@nongnu.org; Mon, 31 Aug 2026 10:10:28 -0400 Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67VBAG6F3358118 for ; Mon, 31 Aug 2026 14:10:20 GMT Received: from mail-oa1-f72.google.com (mail-oa1-f72.google.com [209.85.160.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gcv7wb473-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 31 Aug 2026 14:10:19 +0000 (GMT) Received: by mail-oa1-f72.google.com with SMTP id 586e51a60fabf-45952ce9ee0so4998851fac.1 for ; Mon, 31 Aug 2026 07:10:19 -0700 (PDT) Received: from QCOM-UWl2o8bcGT.qualcomm.com ([152.250.131.13]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-468a3535e25sm9886129fac.5.2026.08.31.07.10.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2026 07:10:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=yfXdQqf3P3p qApv+GltJ5vh6DxK8OZMRliAbZOpBLhY=; b=fKGG7XmaVlzoGHB5KWpaIaeBKuh kq2JdqkkFrsvElFj9z1FSutWhb78uib3Vg3WkbwpZwMdxu0DUevp1GnHwpETyM3/ SMuq6JHoTKgVXUo2xrpKeU9TWo77XdrmG4V0XGDafAIxXveCYW1gDZdB/pv7xkja 3Us32f/2tHThjlYdxWysWvkdmyemM3VgOCMqp9EkzBHQHXmqzqisSQfxVVVWNAYu F4eDbpl+KXva1dVLgPhTrOQfnpT4cz8uk6rsnhkCSah1oZmNmajfNrKFgOylDn+4 NCbnryjyQn4UFlSA1Jrqg+RlZsFs6fb6RlxqNr/31m2fHjfHAT3t+62TiLA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1788185419; x=1788790219; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=yfXdQqf3P3pqApv+GltJ5vh6DxK8OZMRliAbZOpBLhY=; b=Eh+kSK7WNPM+E/7bDvSfqhorvY6sSUDn65VTSWFB0g/XgqPWebAHEI4g3KUhEbd9wO 7x86eiH5ifaXFFud67byCX0aw9toHD/Xw7KKQ/glB+clG2aniFL9kE+D2L+lB8yT6sQG GnZYGoUkQIH7W2iwkO9zdw7QvrCqH5BVWwYvvgw0gq2BttDhcP7lYe1jK+/j8XGMO4wt Hs5aYoSYkeAYWqKyiA+Peb2rF6eyX+/BpT+syVURJOD94Cc4VaTLEZFaK6Wwkhi89dk3 RRlnZUh9Z9+rco9NgV6gg7hkTgm/erqs5UhFxuPDdpbEn45aGsZUDrBCWlhnwonX4rYi Z3vw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1788185419; x=1788790219; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=yfXdQqf3P3pqApv+GltJ5vh6DxK8OZMRliAbZOpBLhY=; b=f25v0TBfMef0Ex+NeoDneNIrAiSlZ/xTRgybZ8LAHqn+Tp0KLGtJbCxVgdFvA23T6s 1dXoNPVYC2jjhwhUGPQjMe824LK4XtgKP4KIg3kXh6+Qdt5qpJ1h0vL2WBR4fQ2LjDAZ dFN5qBEDixwO2cUy8JmETlayOg35y5MmureCsvMjNymeNIlWC7osV4NVSy74iD4v2Qni XpmcT5r6bDUfWaZnxn48hyX1Zw2ikaCTU/Ne34B1TlertvSgKHNCJy0pn6U4vNVAyvGk YuvsYCVhLmO86VZ1/4CThJC6zTVM8AI1a3dSGzzkZr4niYxBuykd3Rt6vPjhiwp+L49O H4cw== X-Gm-Message-State: AFuF++lBMDeArsL1TTqaYW/O+mJQCCHrw6R8oTxIn6ZMel1SML3A3rCN zViZIhCQ+CGKRpYvnm5jgevqbI/2Y690QagYb3o88mQqH14TWxApr2GyJI/RvGjO0z3li8uHLBQ ZfisllGad7RNsk8bXsg0vVM/WpE0tmcIjCcM1lCwZNIw5fTD6hLetDhI6jQSj3Kc7eA== X-Gm-Gg: AYBFou3ES01PHHco9uUBDXGM1lDtrvdqCnkorgUyQfBRiRDnm2ZQ3je7B9bBL+QVinv 6nt8NXAHtr4QQM0IJyV0h2t5zldbzeL5FAQ4MLf/dwXVpeaw6CNE3GJLF0IhCFnvyC/1xWtAHGm AaTFoyWDmVuIGW+dCZvBNjfHXPA2jBwXg3KqMe2lx4oiPCosycRr+aziueqXy5me3KFPqej8SfE fzBlDfqYTFiTVCv9uNX9uirM7n7xWz6AviC6lPBmPqpRiOPCLT/We9mRPeUhkXpuX3OyhbHZaOe 8x0ULoblnSb+j0KdPUz3oyZLzGGQBAEL91QoUKz/oKypNSeUv1edgoUdc66mVyONY2ktCHXYGNm 5kjUR6mFnLzE968kmVBJAvd5WsbL0kfYrjn2kbg== X-Received: by 2002:a05:6870:788a:b0:45e:e061:162b with SMTP id 586e51a60fabf-4683802fef4mr28399411fac.18.1788185418933; Mon, 31 Aug 2026 07:10:18 -0700 (PDT) X-Received: by 2002:a05:6870:788a:b0:45e:e061:162b with SMTP id 586e51a60fabf-4683802fef4mr28399324fac.18.1788185418405; Mon, 31 Aug 2026 07:10:18 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, chao.liu@processmission.com, Chao Liu , Daniel Henrique Barboza , Tao Tang , Palmer Dabbelt Subject: [PATCH v7 2/7] target/riscv: add sdext Debug Mode helpers Date: Mon, 31 Aug 2026 11:10:01 -0300 Message-ID: <20260831141007.353854-3-daniel.barboza@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831141007.353854-1-daniel.barboza@oss.qualcomm.com> References: <20260831141007.353854-1-daniel.barboza@oss.qualcomm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=E9f9Y6dl c=1 sm=1 tr=0 ts=6a958b4b cx=c_pps a=Z3eh007fzM5o9awBa1HkYQ==:117 a=CXdxNCAnTuDr1kYd6DjE4g==:17 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=xvfqbYfxAAAA:20 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=fgrLqfBXAAAA:8 a=Mp8isO8jnsZoTyD_AnUA:9 a=eBU8X_Hb5SQ8N-bgNfv4:22 a=_Ge82aPy-h_wFa7gWU4u:22 a=bA3UWDv6hWIuX7UZL3qL:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDEyMiBTYWx0ZWRfXz2uR81HLpLB0 r/rNAWLbyEDggnabW7Q9LalJfT8z8wHZPLjlKxl7QsgTgnsJJarwNHEl4DnKYnXceRhefbIMpGn ttR86cq8fs7fFErGPP1Gm3AiHbWgJfI= X-Proofpoint-ORIG-GUID: u_qIxkdX2SpwdITJeyn_vGedvrU4-bOa X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDEyMiBTYWx0ZWRfX0W7czf5mkTl5 r1Xeiidhhcl2iS9gXA1NGqDbsl5YOe5o7/Ydm4Xr0jTtK78elOq0OHp5H57v5svKzZ3P5oqJI1B Ue9vbK14UmbBwR6vfKJgPjWLkvdWsvl4q2pzb1lFYErwbUdKKzHEVaEz7CemvEw/kwfDDF+JFAM FDg9Rx4PHgjD1Q6i8/FJjTSqp0o0LTDSFypJolF/VOaVZ+UKVDY46QTYxMfbnvAJU4sbNiATIxM hMmut9BfOWDLQp4qh+HWbmI2qF9bLoKSH7LqVoQ3xLYauGdo/SFbbfd8SsmZGHjNowFKPrSo4TC T+Iau2NdoN3kHlfEhiwV48pQffodkdn8q7rB1u+f/zOt25eyy8SWi3yY9Q6NUgdZ8mCWyHa4dUH jghlfOQY/UsAZo2kx9J75zFtymBMkMBs/nBydRn0HPG4THw4Q2QNmCdqYvWL8LFAA+dfAe97gsD XiCKsiRm5ps4EnxsSaA== X-Proofpoint-GUID: u_qIxkdX2SpwdITJeyn_vGedvrU4-bOa X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_04,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 bulkscore=0 spamscore=0 phishscore=0 lowpriorityscore=0 adultscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310122 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=daniel.barboza@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1788185439826154100 Content-Type: text/plain; charset="utf-8" From: Chao Liu RISC-V Debug Specification: https://github.com/riscv/riscv-debug-spec/releases/tag/1.0 Add helpers to enter/leave Debug Mode and to update dpc/dcsr. Model resume without a Debug Module by leaving Debug Mode at cpu_exec_enter and continuing from dpc. Signed-off-by: Chao Liu Reviewed-by: Daniel Henrique Barboza Tested-by: Tao Tang --- target/riscv/cpu.h | 3 ++ target/riscv/tcg/cpu_helper.c | 85 +++++++++++++++++++++++++++++++++++ target/riscv/tcg/debug.c | 5 +++ target/riscv/tcg/tcg-cpu.c | 14 ++++++ 4 files changed, 107 insertions(+) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 74bddc8415..167e913a48 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -669,6 +669,9 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, in= t size, char *riscv_isa_string(RISCVCPU *cpu); int riscv_cpu_max_xlen(RISCVCPUClass *mcc); bool riscv_cpu_option_set(RISCVCPU *cpu, const char *optname); +void riscv_cpu_enter_debug_mode(CPURISCVState *env, target_ulong pc, + uint32_t cause); +void riscv_cpu_leave_debug_mode(CPURISCVState *env); =20 #ifndef CONFIG_USER_ONLY void riscv_cpu_do_interrupt(CPUState *cpu); diff --git a/target/riscv/tcg/cpu_helper.c b/target/riscv/tcg/cpu_helper.c index 07d9222652..e6d948991c 100644 --- a/target/riscv/tcg/cpu_helper.c +++ b/target/riscv/tcg/cpu_helper.c @@ -132,6 +132,91 @@ bool riscv_env_smode_dbltrp_enabled(CPURISCVState *env= , bool virt) #endif } =20 +#ifndef CONFIG_USER_ONLY +static bool riscv_sdext_enabled(CPURISCVState *env) +{ + return riscv_cpu_cfg(env)->ext_sdext; +} +#endif + +void riscv_cpu_enter_debug_mode(CPURISCVState *env, target_ulong pc, + uint32_t cause) +{ +#ifndef CONFIG_USER_ONLY + if (!riscv_sdext_enabled(env)) { + return; + } + + env->debug_mode =3D true; + env->dpc =3D pc & get_xepc_mask(env); + env->dcsr &=3D ~(DCSR_CAUSE_MASK | DCSR_PRV_MASK | DCSR_V); + env->dcsr |=3D ((target_ulong)(cause & 0x7)) << DCSR_CAUSE_SHIFT; + env->dcsr |=3D env->priv & DCSR_PRV_MASK; + if (env->virt_enabled && riscv_has_ext(env, RVH)) { + env->dcsr |=3D DCSR_V; + } + + if (env_archcpu(env)->cfg.ext_zicfilp) { + if (env->elp) { + env->dcsr |=3D DCSR_PELP; + } else { + env->dcsr &=3D ~DCSR_PELP; + } + env->elp =3D false; + } +#endif +} + +void riscv_cpu_leave_debug_mode(CPURISCVState *env) +{ +#ifndef CONFIG_USER_ONLY + if (!riscv_sdext_enabled(env)) { + return; + } + + target_ulong new_priv =3D env->dcsr & DCSR_PRV_MASK; + bool new_virt =3D riscv_has_ext(env, RVH) && (env->dcsr & DCSR_V); + + if (new_priv > PRV_M) { + new_priv =3D PRV_M; + } + if (new_priv =3D=3D PRV_M) { + new_virt =3D false; + } + + if (new_priv =3D=3D PRV_S && !riscv_has_ext(env, RVS)) { + new_priv =3D PRV_M; + new_virt =3D false; + } else if (new_priv =3D=3D PRV_U && !riscv_has_ext(env, RVU)) { + new_priv =3D riscv_has_ext(env, RVS) ? PRV_S : PRV_M; + new_virt =3D false; + } + + env->debug_mode =3D false; + riscv_cpu_set_mode(env, new_priv, new_virt); + + if (env_archcpu(env)->cfg.ext_zicfilp) { + env->elp =3D cpu_get_fcfien(env) && (env->dcsr & DCSR_PELP); + env->dcsr &=3D ~DCSR_PELP; + } + + if (new_priv !=3D PRV_M) { + env->mstatus =3D set_field(env->mstatus, MSTATUS_MPRV, 0); + } + + if (env_archcpu(env)->cfg.ext_smdbltrp && new_priv !=3D PRV_M) { + env->mstatus =3D set_field(env->mstatus, MSTATUS_MDT, 0); + } + if (env_archcpu(env)->cfg.ext_ssdbltrp && (new_priv =3D=3D PRV_U || ne= w_virt)) { + env->mstatus =3D set_field(env->mstatus, MSTATUS_SDT, 0); + if (new_virt && new_priv =3D=3D PRV_U) { + env->vsstatus =3D set_field(env->vsstatus, MSTATUS_SDT, 0); + } + } +#endif +} + + /* * Returns the effective PMM field. * diff --git a/target/riscv/tcg/debug.c b/target/riscv/tcg/debug.c index 148201f3cb..5ab69bdc8e 100644 --- a/target/riscv/tcg/debug.c +++ b/target/riscv/tcg/debug.c @@ -972,6 +972,11 @@ void riscv_cpu_debug_excp_handler(CPUState *cs) RISCVCPU *cpu =3D RISCV_CPU(cs); CPURISCVState *env =3D &cpu->env; =20 + /* Triggers must not match or fire while in Debug Mode. */ + if (env->debug_mode) { + return; + } + if (cs->watchpoint_hit) { if (cs->watchpoint_hit->flags & BP_CPU) { do_trigger_action(env, DBG_ACTION_BP); diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 54f1b66216..79afda28b8 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -271,6 +271,19 @@ static vaddr riscv_pointer_wrap(CPUState *cs, int mmu_= idx, } return extract64(result, 0, 64 - pm_len); } + +static void riscv_cpu_exec_enter(CPUState *cs) +{ + RISCVCPU *cpu =3D RISCV_CPU(cs); + CPURISCVState *env =3D &cpu->env; + + if (!cpu->cfg.ext_sdext || !env->debug_mode) { + return; + } + target_ulong pc =3D env->dpc; + riscv_cpu_leave_debug_mode(env); + env->pc =3D pc; +} #endif =20 const TCGCPUOps riscv_tcg_ops =3D { @@ -287,6 +300,7 @@ const TCGCPUOps riscv_tcg_ops =3D { #ifndef CONFIG_USER_ONLY .tlb_fill =3D riscv_cpu_tlb_fill, .pointer_wrap =3D riscv_pointer_wrap, + .cpu_exec_enter =3D riscv_cpu_exec_enter, .cpu_exec_interrupt =3D riscv_cpu_exec_interrupt, .cpu_exec_halt =3D riscv_cpu_has_work, .cpu_exec_reset =3D cpu_reset, --=20 2.43.0 From nobody Sat Sep 26 20:50:56 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1788185500; cv=none; d=zohomail.com; s=zohoarc; b=GgzDbKPwXG2LA6FeiL7Rbjr/jU1eQYCaaIn6KfMxiTLG53tQcszDvpW/lzFX7VpcNo55VCL6XkgzVs/rbPqBQ13ZFv0rsbZPOXJAA1E4iGW92tSX2cjPgQPrD/hCjvLpN9RBxNSB4saSzVBv4TzMhe88HhM8Db8n7DoUvZOCBX4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1788185500; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=PGIWkUNQGNbE3Jrb3b9emrRpCm7vdZXSJ3jZQJLP29Q=; b=dIKOkpugPpWfLnn9RHikYd89wPucoCnww7zrm+waCU86DkfcwYd/dD0zilYWMM3ohRYN/18G+W1IhDis01DZJ0+eEODvuEgiMCRQEpm0kxezCboTjrmX5N2x3VoKFWIM31WeIv6f0Hdm6TTwJqovI3uUfz7PFVGLyv2PYE+oy+E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1788185500599414.3673960122777; Mon, 31 Aug 2026 07:11:40 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1x12iV-0003dE-Id; Mon, 31 Aug 2026 10:10:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x12iT-0003V6-Br for qemu-devel@nongnu.org; Mon, 31 Aug 2026 10:10:29 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x12iO-0006dm-AI for qemu-devel@nongnu.org; Mon, 31 Aug 2026 10:10:29 -0400 Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67VBALih3862492 for ; Mon, 31 Aug 2026 14:10:23 GMT Received: from mail-oa1-f70.google.com (mail-oa1-f70.google.com [209.85.160.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gd4pm9uc2-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 31 Aug 2026 14:10:22 +0000 (GMT) Received: by mail-oa1-f70.google.com with SMTP id 586e51a60fabf-4574f1cac98so6709168fac.3 for ; Mon, 31 Aug 2026 07:10:22 -0700 (PDT) Received: from QCOM-UWl2o8bcGT.qualcomm.com ([152.250.131.13]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-468a3535e25sm9886129fac.5.2026.08.31.07.10.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2026 07:10:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=PGIWkUNQGNb E3Jrb3b9emrRpCm7vdZXSJ3jZQJLP29Q=; b=mXI8G+uHhr7U9tije/dtEXuHI6C OZn3OD2wkhPrFJFHH1YDHrvPNmlUlBV1+TV84PJfVWNtYwc0KP5/+N8OwE2UiNna gcCD5d1xOJ9C7BUSXnjXXCU8hzJG60CafhVZyS4fRxcO5NOGvxmTkOHU23FgyxVN bS2Oluv2e1KVAXBu8tc1tSZFoNIy6dEZUtT4/OjIVe96OUrhAsrf+f2+ObOM98dR 8HJ6MHJLvx8cKS03muARk+elsDPs2HhTzaIWN1oAXNFBTzVhpO4PYBSqaKlpg2gC e+wKhYfEE+k/9romsdNKha+LtgbfhDyRMz8pUGtPX/vJcK6GG7d0AakMHSw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1788185422; x=1788790222; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=PGIWkUNQGNbE3Jrb3b9emrRpCm7vdZXSJ3jZQJLP29Q=; b=Wcm1x/HxDMsGENmNTVqG8kASufotCKR/J1SjYlpFditenAefwpRuk6/DQCTbx0MeRC dtQz2VtANyAsPCk2aHZbfTJM2nKrfJIyvoOLlMRFuJpi6QapArS6XsS8wImdDlBRSYDp PuaQ57nHBC0B1e+qSXsqHpcQmpXSrqk/s8SguHNigTdw/NMZNiHV7C1xK9wvgG1qZBiD ewg2IEN8iWV1pE5fp44KTtGKEc9HKDvlOIf2ALy6cRkBO94Fb7c8Og6CXX+wCQLesFCS FlceW18SUHFGs/KWVqdYHpaeKhXjd+M6UISW4Z1pGrYnmPjw27Kd6UnxCPYCVU42uwuZ WtPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1788185422; x=1788790222; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=PGIWkUNQGNbE3Jrb3b9emrRpCm7vdZXSJ3jZQJLP29Q=; b=aSw+m9loXrL5RI2lJXHjPXCwmjN3sg/FrSnJHFymkygdWuklJwZFozdnZa5S1p4xyF vNdfJ8ibYIp2Uf3ePZcKYgksYnBua7pOKIXJx6aumG7rmnWVzaDDX5yr2W6ZlMG8vm+Z D5jU/0g2GHUZyqgo08R2HvipKH984wjkQRLGhqTODmANrvIYvSqkZKIHqJGDShtiQzFd PhNgf7uVMNT4fOZhHRgo16wMk6g7cx1gDsmle3wr9jIPDHksFS1+Mo4ofYlFSAYEE4LV y9SOolUL4M5JauWWKBRV3sXOb0yWd+hSMdCyjwvwldTwztNYHZKSixxNBG9Hw8HHV9ki YslQ== X-Gm-Message-State: AFuF++l01svEZgDubbzmOD0munogz3I0LwWRkaFr/mw1uBD3sMGjYkFt hBBsSKtX2Tj5U5kx2rwjHy2Ues6u4SAqhJiTNES6uwgTjTy73Y0xcCJdF1AqfH43g9z7i2xCcV5 0xCZsqWnFwezhEF7yBEMtGMLIhCsAUsrDBWLuguj2JoqwSEh2Io9qSAPVhetGzg0W4Q== X-Gm-Gg: AYBFou1a0119hXNvEq/u9SPietwXyNJrHgaDvKE5vJfBmGVxs6NglxTPlzx1ogFRUAb IqbF5MXfzRBgSO43/L65UYGhUjv8s0ZKjzS98PMr6JRX4b2CmB0SzSjZrIxZNpFs39+tw2fMUY+ 2LRQVhIeApY2Amo5yCfPVjZeoV4WhkxZ1QND+zA0+rrMkqwDEKK/ok6KbL7B+wOzgP24Bu9NdJe /voc80SP6kzddcdvjckTg/wEbvkmrMn5+27f0dQA7mRdHL9VXqZPuiB2q4xm77jqGIiE39X6iyN eWQ2In2jzdVhy4InE1xkUMXhvvWccXvmL28gb1ZKXxthqGy+pmyNuBUtYn+HAOksyRVU8aB0alL z8hHJj3YHlbMWJre2eBaij6Lub6cIRnTMbS7TNA== X-Received: by 2002:a05:6870:a40b:b0:46a:ad97:9ba with SMTP id 586e51a60fabf-46aada707aemr11051104fac.8.1788185421946; Mon, 31 Aug 2026 07:10:21 -0700 (PDT) X-Received: by 2002:a05:6870:a40b:b0:46a:ad97:9ba with SMTP id 586e51a60fabf-46aada707aemr11050975fac.8.1788185421294; Mon, 31 Aug 2026 07:10:21 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, chao.liu@processmission.com, Chao Liu , Daniel Henrique Barboza , Tao Tang , Palmer Dabbelt Subject: [PATCH v7 3/7] target/riscv: add dret instruction Date: Mon, 31 Aug 2026 11:10:02 -0300 Message-ID: <20260831141007.353854-4-daniel.barboza@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831141007.353854-1-daniel.barboza@oss.qualcomm.com> References: <20260831141007.353854-1-daniel.barboza@oss.qualcomm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: zDoDL6TINhf3AJXb2sdZRwFx4QUDUlBm X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDEyMiBTYWx0ZWRfX0gEc/9HVQTen UX/8aVCEe79oIJQNip+wEU3xxcu2zwpC2WT7ieFYlBJzhrrcWjmwHvIxsjzCYI2PgzvIpe47j/4 wDjPdQczXcHFTg8urnhUJzWvRczdXpkN3ZoplLKeNu7wuGi9zLV7U+NsnLgh5tUhW/AIcJLraMZ d4OoPn7Gc9nhgJAo23QseSVLLtLtXZkaxeEJMsoT/4gmVm6FJIyQeJvoOmPlvKy5N0TefKMD/7z XcVjUBY3aTWnUKf4aMkPxlcSOfHdlE1UuTEKrE3lC7/LRz+m9dpIP33D/0vXlbE932iJvKANfWY V9Pq2+5DamggnO4/6yS9BfZlE8uAqrVnPXf+YzN5D4kJ53iLgKIBkdyQzWSfSe4uQ34GtvbTRAz hqKk2GojALtxO36XBDtJA7gzXgB9onFEI0is0e10Zlk2cLFifElzQKfTUvo5Ix5BjExK3dmPBuz Xk+I6urgtyuJU/q1SvA== X-Proofpoint-GUID: zDoDL6TINhf3AJXb2sdZRwFx4QUDUlBm X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDEyMiBTYWx0ZWRfX0ymfmPKcgrBN neH6WwSuyYiHjVxb0jHEZm+T3r7lwRYhBp0dAOjGBHvaeXFABxTulig9gnzDJIWzF9RovEaRlHz sbHtkf/Rc4P5Bn67RUCXTF/kxuW3aGg= X-Authority-Analysis: v=2.4 cv=GbQnWwXL c=1 sm=1 tr=0 ts=6a958b4e cx=c_pps a=nSjmGuzVYOmhOUYzIAhsAg==:117 a=CXdxNCAnTuDr1kYd6DjE4g==:17 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=xvfqbYfxAAAA:20 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=fgrLqfBXAAAA:8 a=2wZ2TuoAFSEcmpuqsd8A:9 a=1zu1i0D7hVQfj8NKfPKu:22 a=_Ge82aPy-h_wFa7gWU4u:22 a=bA3UWDv6hWIuX7UZL3qL:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_04,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 priorityscore=1501 adultscore=0 malwarescore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310122 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=daniel.barboza@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1788185501758158500 Content-Type: text/plain; charset="utf-8" From: Chao Liu RISC-V Debug Specification: https://github.com/riscv/riscv-debug-spec/releases/tag/1.0 Add DRET decode/translate and a helper to leave Debug Mode and return to dpc. Executing DRET outside Debug Mode raises illegal instruction. Signed-off-by: Chao Liu Reviewed-by: Daniel Henrique Barboza Tested-by: Tao Tang --- target/riscv/helper.h | 1 + target/riscv/insn32.decode | 1 + .../tcg/insn_trans/trans_privileged.c.inc | 18 ++++++++++++++++++ target/riscv/tcg/op_helper.c | 16 ++++++++++++++++ 4 files changed, 36 insertions(+) diff --git a/target/riscv/helper.h b/target/riscv/helper.h index 4fc2d3a155..b4c47d0738 100644 --- a/target/riscv/helper.h +++ b/target/riscv/helper.h @@ -132,6 +132,7 @@ DEF_HELPER_6(csrrw_i128, tl, env, int, tl, tl, tl, tl) #ifndef CONFIG_USER_ONLY DEF_HELPER_1(sret, tl, env) DEF_HELPER_1(mret, tl, env) +DEF_HELPER_1(dret, tl, env) DEF_HELPER_1(mnret, tl, env) DEF_HELPER_1(ctr_clear, void, env) DEF_HELPER_1(wfi, void, env) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index aa02dae3c9..46b00411ff 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -118,6 +118,7 @@ sctrclr 000100000100 00000 000 00000 1110011 uret 0000000 00010 00000 000 00000 1110011 sret 0001000 00010 00000 000 00000 1110011 mret 0011000 00010 00000 000 00000 1110011 +dret 0111101 10010 00000 000 00000 1110011 wfi 0001000 00101 00000 000 00000 1110011 sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma =20 diff --git a/target/riscv/tcg/insn_trans/trans_privileged.c.inc b/target/ri= scv/tcg/insn_trans/trans_privileged.c.inc index a8eaccef67..4e57901880 100644 --- a/target/riscv/tcg/insn_trans/trans_privileged.c.inc +++ b/target/riscv/tcg/insn_trans/trans_privileged.c.inc @@ -125,6 +125,24 @@ static bool trans_mret(DisasContext *ctx, arg_mret *a) #endif } =20 +static bool trans_dret(DisasContext *ctx, arg_dret *a) +{ +#ifndef CONFIG_USER_ONLY + if (!ctx->cfg_ptr->ext_sdext) { + return false; + } + decode_save_opc(ctx, 0); + translator_io_start(&ctx->base); + gen_update_pc(ctx, 0); + gen_helper_dret(cpu_pc, tcg_env); + exit_tb(ctx); /* no chaining */ + ctx->base.is_jmp =3D DISAS_NORETURN; + return true; +#else + return false; +#endif +} + static bool trans_mnret(DisasContext *ctx, arg_mnret *a) { #ifndef CONFIG_USER_ONLY diff --git a/target/riscv/tcg/op_helper.c b/target/riscv/tcg/op_helper.c index 3e94005d2b..54269efee1 100644 --- a/target/riscv/tcg/op_helper.c +++ b/target/riscv/tcg/op_helper.c @@ -473,6 +473,22 @@ target_ulong helper_mret(CPURISCVState *env) return retpc; } =20 +target_ulong helper_dret(CPURISCVState *env) +{ + uintptr_t ra =3D GETPC(); +#ifdef CONFIG_USER_ONLY + riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, ra); + return 0; +#else + if (!riscv_cpu_cfg(env)->ext_sdext || !env->debug_mode) { + riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, ra); + } + target_ulong retpc =3D env->dpc & get_xepc_mask(env); + riscv_cpu_leave_debug_mode(env); + return retpc; +#endif +} + target_ulong helper_mnret(CPURISCVState *env) { target_ulong retpc =3D env->mnepc; --=20 2.43.0 From nobody Sat Sep 26 20:50:56 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1788185507; cv=none; d=zohomail.com; s=zohoarc; b=PI4gp9i1XNzG+RNxwQ83d/SgLfYmmG+L14Jh2oEgXKphPb6zd4mSvqUCAMZbAWTtP+eTnIy3w/eSpi4llLy+8UXIw+bGO1iabolxR1MhVR7lNJr5jwEy5CI9GaAAyVF3AtfFeuarCFayxKIoSWqlZ1Huiwq+Wbk98imhR9jg2QI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1788185507; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=SSO/yeK3USA9FkI9TiWXCH2ECWBVT6V9x+RQhqdHd8M=; b=P8G6rXxi3zotfJDT9bNSyvJw3XlGsnynrmMTh2+dxTzowOPj2ybDBsxMETzC8pG9CdFs9MFMx4mr3YFqeG+QdgXdjFh4K4Cy59O0iiAGmeF7Sgzq3RUKz/IaUw3IFWl8N5qMeqdBengYSfMoIFLDc2aBkSbiWyYS9sNxweJiiMc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1788185507211191.8877992259287; Mon, 31 Aug 2026 07:11:47 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1x12iW-0003kU-Ky; Mon, 31 Aug 2026 10:10:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x12iU-0003aa-Oc for qemu-devel@nongnu.org; Mon, 31 Aug 2026 10:10:30 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x12iR-0006ee-Ak for qemu-devel@nongnu.org; Mon, 31 Aug 2026 10:10:30 -0400 Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67VBALWx2271657 for ; Mon, 31 Aug 2026 14:10:26 GMT Received: from mail-ot1-f72.google.com (mail-ot1-f72.google.com [209.85.210.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gd6vah5kj-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 31 Aug 2026 14:10:25 +0000 (GMT) Received: by mail-ot1-f72.google.com with SMTP id 46e09a7af769-7eb650e79adso4099626a34.3 for ; Mon, 31 Aug 2026 07:10:25 -0700 (PDT) Received: from QCOM-UWl2o8bcGT.qualcomm.com ([152.250.131.13]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-468a3535e25sm9886129fac.5.2026.08.31.07.10.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2026 07:10:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=SSO/yeK3USA 9FkI9TiWXCH2ECWBVT6V9x+RQhqdHd8M=; b=FBIsgo0YEjQ2LQLKEvhiT+J5MUp vmOunmSJxY4FVfThWf6iJNZKLsVfu/I2d0Bba250WBBTl4nWChR2OaWzosq+0CWH 194Y6Wx3AYnf0rKdPaOXgv6eKbYZKACb/RrrGSh4O2wz25rNEgWRF+uv8vHfE9pp UoqRD2y87uElz7j1RVw0tIoEGJ102/1Gs/nQHXdzXMGW0mEo+sdZoy9F0LMD9qbT 1RVYUm8wpD9LJPm5UlkSKUrXCv4/2jJHGe/Sa9wnCwgWqEeZ6WX4UkCl/w83gD0Z eUrLMXgOfUFpFV/W0l7J2NiyWxZ+4QhqUJr4Amq1srVf145du5xg2ghlA1g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1788185425; x=1788790225; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=SSO/yeK3USA9FkI9TiWXCH2ECWBVT6V9x+RQhqdHd8M=; b=D1Em6yfiT291TiOrxUrgFiuXq007QGopqHl6vFLBYBXX8Y5FrntdxgCF35tnu7OrI1 QrDi7aEV9obxZ75unyTYGnG+8tLBGLBQxRLZrMdEr5BBriJgssECgecN8wTzn/LYkO5N 0kL0qgdJ7f5NHom3a2PmebfaZqX8lrHIeMo0LoPyJFxWvOYd0SvXdWJUgx/l1ahI1Tn0 bsfOH/BqfIiP3TH1ogQvH5LCnOGRnZApCLVJZLe0M+JabcUVysLOTT4WwUpZmOTUUN++ t9g2Bei2qto3536ulvlypBRE0ktj/Ak2xxQlhw/JoCsKa6KVba5/+9oxX7S8REyTAW1q ew1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1788185425; x=1788790225; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=SSO/yeK3USA9FkI9TiWXCH2ECWBVT6V9x+RQhqdHd8M=; b=jL3X4RxK7LAPE8oxJVw5F4a4J0Q0M/HqfrSjVjEIU4tZruloCPkBUNb/5yJkBeSVKE +KX7Nx0kH+08oTDfnbWknqqN5k30sa19lpU5M9F5TMcGL3zkSmGWSreldXQw4jJMc9uG UoMimBqVQ6zDIqG2RSDPT9IL1JEbqF/kXBPaCim4hww5PrreK8d9Zid4A61eWXRXT0TD VZ6/YA73hxRDbwjiIoX0DdBlbXipeuXhuR26M5DkJO4KfUEAqIDM+TWkUYtyiXxlpM0B 4gR8EI2L8JwurA9b+8L97spiZbc0IHqvspUy+LrAruULrIYs9d1Zf3Y9jxjMET2bkB15 a02w== X-Gm-Message-State: AFuF++nqCOK5Xzfk+yo9lV9Kxdfa7OxBA5jpyFtOa4KCOyXkCtOLN9Xd EtkYLeTLeYaaDx5B6mk0ZlfheJgOL1VjwJiB4OYHUDvVUd7LpeXdmSnhWH7rck8fLXb9AA21LTh hodVZeb+nY84/bgYHQL9yiQ0FniAq7yNs1iFLUKInvM8apTpUh0R3ZOsTuOVB8lzQIQ== X-Gm-Gg: AR+sD13/BXE8J8bDPMdTNoSLU/h8nniHnK+oaOPA3Y9jBnqkn2vrmCPOUKx+tL1U2VP 8sTOHSal7YXqYg57ZCFNMksQexhvF+rGa9pZZgVQM5aiTpFUqyRJEWW8r8FPLM3vfDk8Q54/BVq PG3EV+FJ1DrgRzSQabDDpHwcr5P9DXGCMYNgmAgkF4xqqzk9gEaNjWVGUm7lLhLbPC35JqGi+Dm 3eU5epPnelxWXLc7Rao1W7dDxZSkaVNQkyz8jABngu6Cq95vbYNCBbTopMx/BO3Z4zzGRdWNTzZ eiqAvdhS9zCm5cGoqqbkrhjXMCRtIlAKbU08mo4LVn0V0R7CacVb69sA63X9PzsosLSeeWX5/au YOqagMM2S3DodG38sPJIaAzPBpAHXQlPQwx6LJA== X-Received: by 2002:a05:6820:1c8c:b0:6b3:5475:5a47 with SMTP id 006d021491bc7-6b35475f876mr8205784eaf.32.1788185424999; Mon, 31 Aug 2026 07:10:24 -0700 (PDT) X-Received: by 2002:a05:6820:1c8c:b0:6b3:5475:5a47 with SMTP id 006d021491bc7-6b35475f876mr8205710eaf.32.1788185424261; Mon, 31 Aug 2026 07:10:24 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, chao.liu@processmission.com, Chao Liu , Daniel Henrique Barboza , Tao Tang , Palmer Dabbelt Subject: [PATCH v7 4/7] target/riscv: add sdext enter Debug Mode on ebreak Date: Mon, 31 Aug 2026 11:10:03 -0300 Message-ID: <20260831141007.353854-5-daniel.barboza@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831141007.353854-1-daniel.barboza@oss.qualcomm.com> References: <20260831141007.353854-1-daniel.barboza@oss.qualcomm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDEyMiBTYWx0ZWRfX14VYUsxOzmOY jl0I0CMpIYqD9G+mQvP/kgbd8BmRbRiLObZScURJ1V+ccuHeoMUXqC1F8GPC+3AJYQXTwb9VxpP FwZ6tgEEED+2VSJvo3tLkGSE2Ongj3AGpi5sDs/Gbec3MjNcgzpwIz4bhAgShrZ3JlUq/lsAte8 iJAQwAzokghFzSoIyqanMR7ZWsVrPKuiXN69Mxyr9DuIlPEuozGysO50yiuly41gSyWKU1C2i3B mXTwVOw6Tddl8AMw5+yheUBW5Xew0NnQiidStAqm1JvpAL2HO6Pq13BNkXxTim1mvbdPh0yMxXN RuBjCsANDOTgChY7xgUgPa4IPpIf7ewhp98VO1U3DEV7QXN5IW14R8T54l60Q6jch451pdkHYfi VDMIif4joptCU2On0DZgXhJ0nVUD0lunwsUriXlM5DBmo4JnniG1Op7JkGIc3fmBXCffq+Sblh+ Clzo33oK0oOn2dGnbOA== X-Authority-Analysis: v=2.4 cv=YYmNIQRf c=1 sm=1 tr=0 ts=6a958b51 cx=c_pps a=+3WqYijBVYhDct2f5Fivkw==:117 a=CXdxNCAnTuDr1kYd6DjE4g==:17 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=xvfqbYfxAAAA:20 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=fgrLqfBXAAAA:8 a=ITXOtABjXhpKHoTPUzwA:9 a=eYe2g0i6gJ5uXG_o6N4q:22 a=_Ge82aPy-h_wFa7gWU4u:22 a=bA3UWDv6hWIuX7UZL3qL:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDEyMiBTYWx0ZWRfX+N16oRP1hwns glTZXF5V1uuu96vO3JQWNEp3Atm9lbTa6ex4h9512jvb0Lv22pg+7z8l6vi0hu/ymWxDCkjRjHG RZRoUumpTtDFT+mLJ2eTFNSIoJM6P0k= X-Proofpoint-GUID: tYgsInInCwjzsVPgAM9aLThNRvIryaMh X-Proofpoint-ORIG-GUID: tYgsInInCwjzsVPgAM9aLThNRvIryaMh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_04,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 spamscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 impostorscore=0 malwarescore=0 clxscore=1015 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310122 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=daniel.barboza@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1788185509415158500 Content-Type: text/plain; charset="utf-8" From: Chao Liu RISC-V Debug Specification: https://github.com/riscv/riscv-debug-spec/releases/tag/1.0 Route EBREAK via helper_sdext_ebreak. If Sdext is enabled and the matching dcsr.ebreak* bit is set, enter Debug Mode with cause=3Debreak and stop with EXCP_DEBUG. Otherwise keep the normal breakpoint trap. Signed-off-by: Chao Liu Reviewed-by: Daniel Henrique Barboza Tested-by: Tao Tang --- target/riscv/helper.h | 1 + .../tcg/insn_trans/trans_privileged.c.inc | 6 ++++ target/riscv/tcg/op_helper.c | 34 +++++++++++++++++++ 3 files changed, 41 insertions(+) diff --git a/target/riscv/helper.h b/target/riscv/helper.h index b4c47d0738..0d9ae15e3e 100644 --- a/target/riscv/helper.h +++ b/target/riscv/helper.h @@ -142,6 +142,7 @@ DEF_HELPER_1(tlb_flush_all, void, env) DEF_HELPER_4(ctr_add_entry, void, env, tl, tl, tl) /* Native Debug */ DEF_HELPER_1(itrigger_match, void, env) +DEF_HELPER_2(sdext_ebreak, void, env, tl) #endif =20 /* Hypervisor functions */ diff --git a/target/riscv/tcg/insn_trans/trans_privileged.c.inc b/target/ri= scv/tcg/insn_trans/trans_privileged.c.inc index 4e57901880..42bf2ffb53 100644 --- a/target/riscv/tcg/insn_trans/trans_privileged.c.inc +++ b/target/riscv/tcg/insn_trans/trans_privileged.c.inc @@ -68,9 +68,15 @@ static bool trans_ebreak(DisasContext *ctx, arg_ebreak *= a) if (pre =3D=3D 0x01f01013 && ebreak =3D=3D 0x00100073 && post =3D=3D 0= x40705013) { generate_exception(ctx, RISCV_EXCP_SEMIHOST); } else { +#ifndef CONFIG_USER_ONLY + gen_update_pc(ctx, 0); + gen_helper_sdext_ebreak(tcg_env, tcg_constant_tl(ebreak_addr)); + ctx->base.is_jmp =3D DISAS_NORETURN; +#else tcg_gen_st_i64(tcg_constant_i64(ebreak_addr), tcg_env, offsetof(CPURISCVState, badaddr)); generate_exception(ctx, RISCV_EXCP_BREAKPOINT); +#endif } return true; } diff --git a/target/riscv/tcg/op_helper.c b/target/riscv/tcg/op_helper.c index 54269efee1..5db4f6aacd 100644 --- a/target/riscv/tcg/op_helper.c +++ b/target/riscv/tcg/op_helper.c @@ -489,6 +489,40 @@ target_ulong helper_dret(CPURISCVState *env) #endif } =20 +void helper_sdext_ebreak(CPURISCVState *env, target_ulong pc) +{ + CPUState *cs =3D env_cpu(env); + bool enter_debug =3D false; + + if (riscv_cpu_cfg(env)->ext_sdext && !env->debug_mode) { + if (env->virt_enabled) { + if (env->priv =3D=3D PRV_S) { + enter_debug =3D env->dcsr & DCSR_EBREAKVS; + } else if (env->priv =3D=3D PRV_U) { + enter_debug =3D env->dcsr & DCSR_EBREAKVU; + } + } else { + if (env->priv =3D=3D PRV_M) { + enter_debug =3D env->dcsr & DCSR_EBREAKM; + } else if (env->priv =3D=3D PRV_S) { + enter_debug =3D env->dcsr & DCSR_EBREAKS; + } else if (env->priv =3D=3D PRV_U) { + enter_debug =3D env->dcsr & DCSR_EBREAKU; + } + } + } + + env->badaddr =3D pc; + + if (enter_debug) { + riscv_cpu_enter_debug_mode(env, pc, DCSR_CAUSE_EBREAK); + cs->exception_index =3D EXCP_DEBUG; + cpu_loop_exit_restore(cs, GETPC()); + } + + riscv_raise_exception(env, RISCV_EXCP_BREAKPOINT, GETPC()); +} + target_ulong helper_mnret(CPURISCVState *env) { target_ulong retpc =3D env->mnepc; --=20 2.43.0 From nobody Sat Sep 26 20:50:56 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1788185481; cv=none; d=zohomail.com; s=zohoarc; b=CwlfHMpuN7vp44TNLE5su9yDxWwq1sMpNlIIFg+AQQ2yoqFK42mjXD5htWW3WNNcOmmVP2L98swYWT6fYzldYSOEj3tcZ4YRITbVbjVRgH4WOnt17P+2yp44pUXbX1Vr2VmLyFJi5c5BnRkESan1rZ1knLLIWYKSbUTmrTuSgXA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1788185481; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=p8sB450gfwSTJk/dow8aMrrz18L+OqJy71sxYp/eiTQ=; b=P8XZvzFX5CkGz82nXEDMWPc1cOu3aufX5BDKlHnMTmidkrnOLyOkEfTwSE3IQehdLHnNV/3B4KFZuM3ISmixU07fmKKLu7r3n2rNv+RUlBZfqe5GGqfl3Pc2dBy4Dp2tn6avJCPzEl8VA+yww6u18ud2P7UAAXb6ar4m9P1c9h8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1788185481335951.540716346651; Mon, 31 Aug 2026 07:11:21 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1x12iX-0003mg-IJ; Mon, 31 Aug 2026 10:10:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x12iV-0003gg-TL for qemu-devel@nongnu.org; Mon, 31 Aug 2026 10:10:31 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x12iT-0006fX-PD for qemu-devel@nongnu.org; Mon, 31 Aug 2026 10:10:31 -0400 Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67VBABTf2848922 for ; Mon, 31 Aug 2026 14:10:28 GMT Received: from mail-ot1-f69.google.com (mail-ot1-f69.google.com [209.85.210.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gd6ayhb11-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 31 Aug 2026 14:10:28 +0000 (GMT) Received: by mail-ot1-f69.google.com with SMTP id 46e09a7af769-7f36427abfdso4523950a34.3 for ; Mon, 31 Aug 2026 07:10:28 -0700 (PDT) Received: from QCOM-UWl2o8bcGT.qualcomm.com ([152.250.131.13]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-468a3535e25sm9886129fac.5.2026.08.31.07.10.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2026 07:10:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=p8sB450gfwS TJk/dow8aMrrz18L+OqJy71sxYp/eiTQ=; b=pCIgA6qzM5w+XDLaTMdDS04GiA4 UBX96QiZli3zuABEcQOnLB6WYypSTDjngUrVz4AKk2fNBWC/SG5PwLQnhAZvQwtr /vQv0CDPJCVdd5MHzGLXo1AGYrjXGf7KLBlkIJKosa5PKLMARGrssx4FPyWPxVMv rWWKQ4cDLBYIHKa4NRTtY/s1uKWpFeocIgvX4GynMlFVa7VEeR3db1AsAvSUfjk4 JfDq9JgVo0kOTZ78wstlRpMJC+KwoZr0HYl743nbARa9y3TpbYaX8PxMqh6TXELG h1zTqMWCJ4eCZiNA4XkEpav/hpQpiCl74lMPb0us1Y5E84q1+UE1Sqr2MGA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1788185428; x=1788790228; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=p8sB450gfwSTJk/dow8aMrrz18L+OqJy71sxYp/eiTQ=; b=T4yYGTNmGqm4aIISzvcYxZEES7tYJsswBKoJERzNMzQvHq4qD+Ldt1detopRjqjDK9 Gni7HFB/YEHyOAUANNts/ajwBTHvEHVkkIQ0/tgBQBP5imy19wPl7KsY7oblsTAnk/j/ Mm+GndqX5IJLSpMnBLlgfQT4i87LZt6wlzf98vylKGiNHpUCzqD1oiIEgCqbZH085yuK c6ozHcDc7SzKAVacc6KOB8vIRkIjn28TVUGi7JkNDLJ+Mec5ZMp7OhI7H2RjcDba3llI gjqmWfTc2QbYDeP+Dc4U50V1/xygEvHcEARosm1034pG+WkOjC5ABS62oYMoDIMajyqW ksVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1788185428; x=1788790228; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=p8sB450gfwSTJk/dow8aMrrz18L+OqJy71sxYp/eiTQ=; b=jL4pjq87DkRnaGnleTixPzm5TJrcpbwr85XAT3fRmYgP/zjIG4keBrwppYoj7cBo7t ryBjKEcP4VT2rCNRwTfJFiCgnun6eaLW+jm9DPRJJUj7cdPbj3LEe0YNvLR2WsyzZP8e gPcUAtJi5DLRLv5HLhj2p1/mZKumXMXw3PxRl/XYDWxrDcEa7DPGzaN/Cjsa2tRNerR9 kGew2jh587jYay8b9nxUd39JedFm9uKxfW5RhNaYw/lWzCUjOdSBMc70ITc8QXiHpchS ynT6fUZ4jwwatCVVpf/RYaYByaYt9uFJDCmlD4q7mcWJx5jS6j5h82/vliBrAtDuDIkl Zk9Q== X-Gm-Message-State: AFuF++keexMfPzea03vEge3kKu08TU+ryIG0EMDYZZvRwXlZ+k4xiXrb dLZKPjUxHyVDQKWLFHyaRVPu3C2YnPLq7qVdvGp9HMlxgQkS8RUqutCXAb4BtviZ+EFCqsYtQHO 6nUFN04r2ePUaW4BdG9cTizQz5goc4BQ9emr06/+vRbbsjcZjyglVz2pMP9s/FlWQEA== X-Gm-Gg: AR+sD10FDyuD8J9LvJdyi6PSa72oGa0oqTaYaSu9j+Lkb4nUCBTVCnGMM+rlVz2sUL/ h64OZnrAZWK9odj73E8RsKHC9ztNNnBFINUEgAPCCrleMhCQTfZtaaeCMpKCEonOmUQ4fJKIn6j i0a9yoRPsyOQ7TlWAz2xujfpXXn+wMQs+VfoGO4C2OMXirfqpCqMxBPz1isucw/M2laoyX454w1 FJvNqhdVQeVff+69zbNN+WZG4OkeDUQubqnWxTTCFUfB9ANMOYaMiOR6YHZcG6dd71wdLvgyAt9 JPFva3Qk+ma8eJcV0ZEFwQMP8BVei6sv893RH5O9h3z7kdCkbXuuGLMTznYopxggF3hyefDE6GP YAFe9drGd3e3F6gTZWyejVu35bkLXQwtf4BKcSA== X-Received: by 2002:a05:6820:1625:b0:6b3:5475:4861 with SMTP id 006d021491bc7-6b35475fb32mr8475504eaf.18.1788185427903; Mon, 31 Aug 2026 07:10:27 -0700 (PDT) X-Received: by 2002:a05:6820:1625:b0:6b3:5475:4861 with SMTP id 006d021491bc7-6b35475fb32mr8475447eaf.18.1788185427257; Mon, 31 Aug 2026 07:10:27 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, chao.liu@processmission.com, Chao Liu , Daniel Henrique Barboza , Tao Tang , Palmer Dabbelt Subject: [PATCH v7 5/7] target/riscv: add sdext single-step support Date: Mon, 31 Aug 2026 11:10:04 -0300 Message-ID: <20260831141007.353854-6-daniel.barboza@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831141007.353854-1-daniel.barboza@oss.qualcomm.com> References: <20260831141007.353854-1-daniel.barboza@oss.qualcomm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDEyMiBTYWx0ZWRfX/Dw9IAZ0fV1p mKbEjInGPJymlNspQlZ2Ec7bcYzWX7fGUUbnhwwVO2RkDAt8WhapXAnxEpaUE9Uqvm6BaCZdbcR hPZsIz8O+DGNsf+7dxq4qiV27rD9g7E= X-Proofpoint-GUID: sA_OgFoDE3XO0YPvcOCbOy68YKTZPHSF X-Authority-Analysis: v=2.4 cv=CYE4Irrl c=1 sm=1 tr=0 ts=6a958b54 cx=c_pps a=z9lCQkyTxNhZyzAvolXo/A==:117 a=CXdxNCAnTuDr1kYd6DjE4g==:17 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=xvfqbYfxAAAA:20 a=VwQbUJbxAAAA:8 a=pFyQfRViAAAA:8 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=fgrLqfBXAAAA:8 a=tgk7fgI0p9FEwYF5lhYA:9 a=EyFUmsFV_t8cxB2kMr4A:22 a=oJz5jJLG1JtSoe7EL652:22 a=_Ge82aPy-h_wFa7gWU4u:22 a=bA3UWDv6hWIuX7UZL3qL:22 X-Proofpoint-ORIG-GUID: sA_OgFoDE3XO0YPvcOCbOy68YKTZPHSF X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDEyMiBTYWx0ZWRfX8muNPHQJnYEp UU0fLSThIPRE9yGRk0PcYOB/C/pZl39siGsGrU0bbkirqP0IJ7dFx8LQwYA3lvpYYXcqMYQYmN2 d4px6Tr2L1SXKFtxfy99pQ7EW/pzUZNrQvKP1rwqeaT38lqZ+SHUnbMluammANyFWCW8i4dYrDd wDh2c+bknGTXeR/6pYsT6qsLdvjH9F7IOZ2CBBQh/MCzSF/FwkicEQCrnjvSYvzYxLu463S8mEc RzovWkj/8LlcjvVozXwylFPqdvlf70weBOJ/AcU2O+fHLxLUDh3aWygTUcAc6Z2CBadzHhrDVKB zwKuFoTadVSv8ThGPM9NipsiHn2Ygrf485b26AeKcBVZCOWBs3NEWjf8krZYjN3KveJR5oM3C/p bIW/G1i0kg1akZ7YrWP338Cuy489Km18Orwna6kINuWen189/GrHVgwDv/dNaSS2vQwAwFR3X+0 jwv6q2edBzDNyccODiQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_04,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 adultscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 spamscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310122 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=daniel.barboza@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1788185484357158500 Content-Type: text/plain; charset="utf-8" From: Chao Liu RISC-V Debug Specification: https://github.com/riscv/riscv-debug-spec/releases/tag/1.0 Use a TB flag when dcsr.step is set (and we are not in Debug Mode). When the flag is on, build 1-insn TBs and do not chain to the next TB. Add a TB-exit helper that enters Debug Mode with cause=3Dstep and sets dpc to the next pc, then stops with EXCP_DEBUG. If dcsr.stepie is 0, do not take interrupts while stepping. Treat WFI as a nop so the hart does not sleep during a step. PS: This patch references Max Chou's handling of ext_tb_flags. https://lore.kernel.org/qemu-devel/20260108132631.9429-6-max.chou@sifive.co= m/ Signed-off-by: Chao Liu Reviewed-by: Daniel Henrique Barboza Tested-by: Tao Tang --- include/exec/translation-block.h | 4 ++-- target/riscv/cpu.h | 2 ++ target/riscv/helper.h | 1 + target/riscv/tcg/cpu_helper.c | 6 ++++++ target/riscv/tcg/op_helper.c | 20 ++++++++++++++++++++ target/riscv/tcg/tcg-cpu.c | 5 +++++ target/riscv/tcg/translate.c | 15 +++++++++++++-- 7 files changed, 49 insertions(+), 4 deletions(-) diff --git a/include/exec/translation-block.h b/include/exec/translation-bl= ock.h index 40cc699031..ee15608c89 100644 --- a/include/exec/translation-block.h +++ b/include/exec/translation-block.h @@ -64,8 +64,8 @@ struct TranslationBlock { * x86: the original user, the Code Segment virtual base, * arm: an extension of tb->flags, * s390x: instruction data for EXECUTE, - * sparc: the next pc of the instruction queue (for delay slots). - * riscv: an extension of tb->flags, + * sparc: the next pc of the instruction queue (for delay slots), + * riscv: an extension of tb->flags. */ uint64_t cs_base; =20 diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 167e913a48..37ba5be872 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -753,6 +753,8 @@ FIELD(TB_FLAGS, PM_SIGNEXTEND, 31, 1) FIELD(EXT_TB_FLAGS, MISA_EXT, 0, 32) FIELD(EXT_TB_FLAGS, ALTFMT, 32, 1) FIELD(EXT_TB_FLAGS, BIG_ENDIAN, 33, 1) +/* sdext single-step needs a TB flag to build 1-insn TBs */ +FIELD(EXT_TB_FLAGS, SDEXT_STEP, 34, 1) =20 #ifdef TARGET_RISCV32 #define riscv_cpu_mxl(env) ((void)(env), MXL_RV32) diff --git a/target/riscv/helper.h b/target/riscv/helper.h index 0d9ae15e3e..5193440e1c 100644 --- a/target/riscv/helper.h +++ b/target/riscv/helper.h @@ -142,6 +142,7 @@ DEF_HELPER_1(tlb_flush_all, void, env) DEF_HELPER_4(ctr_add_entry, void, env, tl, tl, tl) /* Native Debug */ DEF_HELPER_1(itrigger_match, void, env) +DEF_HELPER_1(sdext_step, void, env) DEF_HELPER_2(sdext_ebreak, void, env, tl) #endif =20 diff --git a/target/riscv/tcg/cpu_helper.c b/target/riscv/tcg/cpu_helper.c index e6d948991c..a7344b1be2 100644 --- a/target/riscv/tcg/cpu_helper.c +++ b/target/riscv/tcg/cpu_helper.c @@ -500,6 +500,12 @@ bool riscv_cpu_exec_interrupt(CPUState *cs, int interr= upt_request) if (interrupt_request & mask) { RISCVCPU *cpu =3D RISCV_CPU(cs); CPURISCVState *env =3D &cpu->env; + + if (cpu->cfg.ext_sdext && !env->debug_mode && + (env->dcsr & DCSR_STEP) && !(env->dcsr & DCSR_STEPIE)) { + return false; + } + int interruptno =3D riscv_cpu_local_irq_pending(env); if (interruptno >=3D 0) { cs->exception_index =3D RISCV_EXCP_INT_FLAG | interruptno; diff --git a/target/riscv/tcg/op_helper.c b/target/riscv/tcg/op_helper.c index 5db4f6aacd..489aac28e7 100644 --- a/target/riscv/tcg/op_helper.c +++ b/target/riscv/tcg/op_helper.c @@ -489,6 +489,22 @@ target_ulong helper_dret(CPURISCVState *env) #endif } =20 +void helper_sdext_step(CPURISCVState *env) +{ +#ifndef CONFIG_USER_ONLY + CPUState *cs =3D env_cpu(env); + + if (!riscv_cpu_cfg(env)->ext_sdext || env->debug_mode || + !(env->dcsr & DCSR_STEP)) { + return; + } + + riscv_cpu_enter_debug_mode(env, env->pc, DCSR_CAUSE_STEP); + cs->exception_index =3D EXCP_DEBUG; + cpu_loop_exit_restore(cs, GETPC()); +#endif +} + void helper_sdext_ebreak(CPURISCVState *env, target_ulong pc) { CPUState *cs =3D env_cpu(env); @@ -621,6 +637,10 @@ void helper_wfi(CPURISCVState *env) (prv_u || (prv_s && get_field(env->hstatus, HSTATUS_VTW))))= { riscv_raise_exception(env, RISCV_EXCP_VIRT_INSTRUCTION_FAULT, GETP= C()); } else { + if (riscv_cpu_cfg(env)->ext_sdext && !env->debug_mode && + (env->dcsr & DCSR_STEP)) { + return; + } cs->halted =3D 1; cs->exception_index =3D EXCP_HLT; cpu_loop_exit(cs); diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 79afda28b8..d90861d93f 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -198,6 +198,11 @@ static TCGTBCPUState riscv_get_tb_cpu_state(CPUState *= cs) ext_flags =3D FIELD_DP64(ext_flags, EXT_TB_FLAGS, MISA_EXT, env->misa_= ext); ext_flags =3D FIELD_DP64(ext_flags, EXT_TB_FLAGS, BIG_ENDIAN, mo_endian_env(env) =3D=3D MO_BE); +#ifndef CONFIG_USER_ONLY + if (cpu->cfg.ext_sdext && !env->debug_mode && (env->dcsr & DCSR_STEP))= { + ext_flags =3D FIELD_DP64(ext_flags, EXT_TB_FLAGS, SDEXT_STEP, 1); + } +#endif =20 return (TCGTBCPUState){ .pc =3D env->xl =3D=3D MXL_RV32 ? env->pc & UINT32_MAX : env->pc, diff --git a/target/riscv/tcg/translate.c b/target/riscv/tcg/translate.c index 9684dbe752..1a38d6aeb5 100644 --- a/target/riscv/tcg/translate.c +++ b/target/riscv/tcg/translate.c @@ -112,6 +112,8 @@ typedef struct DisasContext { bool ztso; /* Use icount trigger for native debug */ bool itrigger; + /* Enter Debug Mode after next instruction (sdext single-step). */ + bool sdext_step; /* FRM is known to contain a valid value. */ bool frm_valid; bool insn_start_updated; @@ -286,6 +288,9 @@ static void lookup_and_goto_ptr(DisasContext *ctx) if (ctx->itrigger) { gen_helper_itrigger_match(tcg_env); } + if (ctx->sdext_step) { + gen_helper_sdext_step(tcg_env); + } #endif tcg_gen_lookup_and_goto_ptr(); } @@ -296,6 +301,9 @@ static void exit_tb(DisasContext *ctx) if (ctx->itrigger) { gen_helper_itrigger_match(tcg_env); } + if (ctx->sdext_step) { + gen_helper_sdext_step(tcg_env); + } #endif tcg_gen_exit_tb(NULL, 0); } @@ -309,7 +317,8 @@ static void gen_goto_tb(DisasContext *ctx, unsigned tb_= slot_idx, * Under itrigger, instruction executes one by one like singlestep, * direct block chain benefits will be small. */ - if (translator_use_goto_tb(&ctx->base, dest) && !ctx->itrigger) { + if (translator_use_goto_tb(&ctx->base, dest) && + !ctx->itrigger && !ctx->sdext_step) { /* * For pcrel, the pc must always be up-to-date on entry to * the linked TB, so that it can use simple additions for all @@ -1350,6 +1359,7 @@ static void riscv_tr_init_disas_context(DisasContextB= ase *dcbase, CPUState *cs) ctx->bcfi_enabled =3D FIELD_EX32(tb_flags, TB_FLAGS, BCFI_ENABLED); ctx->fcfi_lp_expected =3D FIELD_EX32(tb_flags, TB_FLAGS, FCFI_LP_EXPEC= TED); ctx->fcfi_enabled =3D FIELD_EX32(tb_flags, TB_FLAGS, FCFI_ENABLED); + ctx->sdext_step =3D FIELD_EX64(ext_tb_flags, EXT_TB_FLAGS, SDEXT_STEP); ctx->zero =3D tcg_constant_tl(0); ctx->virt_inst_excp =3D false; ctx->decoders =3D cpu->decoders; @@ -1402,7 +1412,8 @@ static void riscv_tr_translate_insn(DisasContextBase = *dcbase, CPUState *cpu) =20 /* Only the first insn within a TB is allowed to cross a page boundary= . */ if (ctx->base.is_jmp =3D=3D DISAS_NEXT) { - if (ctx->itrigger || !translator_is_same_page(&ctx->base, ctx->bas= e.pc_next)) { + if (ctx->itrigger || ctx->sdext_step || + !translator_is_same_page(&ctx->base, ctx->base.pc_next)) { ctx->base.is_jmp =3D DISAS_TOO_MANY; } else { unsigned page_ofs =3D ctx->base.pc_next & ~TARGET_PAGE_MASK; --=20 2.43.0 From nobody Sat Sep 26 20:50:56 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1788185465; cv=none; d=zohomail.com; s=zohoarc; b=dydKbH6/5mVxDZqnmDALsUQBkRDmZWENHfueWeTc2hVRhJ3tQ+JECgGzoQq6eDN4Rorch1tw6p+VGXiSHtEsQBvXsA5TXYnMznv7kFXqkNsGFlDGNjjQ4kEro03riIDKn2AIW6YBMLqa54+bFGKaC4hhIrkXuIQ1pQe/6NV46bs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1788185465; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=uyIMjdORxSCdzJiND3iob1aQ/UfnM73aHaUyj+BBUnk=; b=gPm6MjFaYSH2bcJ+N9HHSTPapHJkjZ+WAYDjnDBIYzJQVcTFrhkycIixAMB8pL9TE55paB14740nvwAxXC2FWmIZ5GIPfSDGJFuvgvZ3LYQHU66HTrYIcL9mwN5T2s1Am8tmP/HStyU3F0+fDNgpqEUUWwRaxx/V3eIAI1evW+A= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178818546560223.960404200386733; Mon, 31 Aug 2026 07:11:05 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1x12ia-0003yK-MD; Mon, 31 Aug 2026 10:10:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x12iY-0003s4-UW for qemu-devel@nongnu.org; Mon, 31 Aug 2026 10:10:34 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x12iW-0006gT-Pw for qemu-devel@nongnu.org; Mon, 31 Aug 2026 10:10:34 -0400 Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67VBALx13862477 for ; Mon, 31 Aug 2026 14:10:32 GMT Received: from mail-oo1-f70.google.com (mail-oo1-f70.google.com [209.85.161.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gd4pm9ucq-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 31 Aug 2026 14:10:31 +0000 (GMT) Received: by mail-oo1-f70.google.com with SMTP id 006d021491bc7-6b34d7f21d0so1270025eaf.3 for ; Mon, 31 Aug 2026 07:10:31 -0700 (PDT) Received: from QCOM-UWl2o8bcGT.qualcomm.com ([152.250.131.13]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-468a3535e25sm9886129fac.5.2026.08.31.07.10.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2026 07:10:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=uyIMjdORxSC dzJiND3iob1aQ/UfnM73aHaUyj+BBUnk=; b=TMScCV3hHF+lKJgAh3xrjolOf7e OqItHtmeCjIOj8Hi1AsfP4qTXuZjrT+655xkjbG2Pa9MZc9Vq2b54GjIAdg1JpuS rIfabZtYxlrCmf3QqNdyhr3OTC7GPM4IjZAmpKCrhgrMYovqaC9kKW6zhJAPMGnI I8TylF0+A5/q1za5/MkWKQ0yILNBxdsthwPO2B/jk3Sb05Bo9O6AE48lbE3PqKID y6FA4J8SjD2tXc3caGug+Fm3MSgGlUcb7oWOe/D2RpK2p/lxX+SWEQo6YOKTcbWE ww3EtNbs77NwOem9NbipMimTdCcMQPNfUGfxhDyqmaAFbBmNBPkm/EMDDJA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1788185431; x=1788790231; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=uyIMjdORxSCdzJiND3iob1aQ/UfnM73aHaUyj+BBUnk=; b=GDaU/YaqlAVRoy+mcd14f2MQ9iyb9P0vc9lWm+hJZAWyXJ/BG++Lhwmam/ieFwvrvY ArKAcWSH81RyY+iJgadhftlR4AB8xrVop7KU8ob7Kz/HJMkuW8GMqcVM/pmLHbvw4HgG 3jPnhF4CGy9JZteSmy61gFquPGGb9mVdiORyeJ6rl9ZoVEKlG/Qw0X0uUSeLjZszj7Ut cU7Wkcsls5i/4R4F1Kj8GQJ3HbFYC7jlcl3pJYGh3cNqcYvrmT/0Ew45tqL0ui8hW0Wp NQxui5kmtdtH28Sz6CepfXH5Dv7E7mzQ1pHp1EXPF3moY0a2ZYYVzIY9M4Gt7cJFF/n9 4jcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1788185431; x=1788790231; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=uyIMjdORxSCdzJiND3iob1aQ/UfnM73aHaUyj+BBUnk=; b=cawTbHaz4339H5rys+8/CrDnBOqqfjezFMeMBso6OBG75+C1bWHhV+I7UHG5bSXZzI ywg5JHjxv232jPlIt5+IcHca6o4e8YxOe/eVDNiw00aWJ/jdHIA5erWcgtB0d+fD8UNh jNrwVvCuUFXI4V9vkn/4NE9zaWBMZEicqp14tpRinuHxLKUdn8PN4mBy19zL5/n3fZ/D hDS7W0KINrIWclTyZ5l5KWtuNtsiSKDXm76Q72h+vxjDAikXD0PJMI3wN7EgoZ5dLdfi FaMwkKd7aS9XJ4scrOe46rpFbGt7IALdG1PVZJ7rC4/XoPF80V/9ko3QYtQRhLoiOiSB /C3w== X-Gm-Message-State: AFuF++m9HrIXL399HG2nxlaDOFfBA5ftNH4C1ratIUTNTSm366J6ha1v 0LvijCktYPmKXBrmcebTOOdlTO8qq9FVKW6315qeRasKljMl7dNXPKQir1WWXiTCsA4rIlE8Sic 1ooVzlTrmdscVZLyOJ5AmKylNe9wqbMGg9gD92awRcpjaXS4uqnTjsxCpJN4XV7faCQ== X-Gm-Gg: AR+sD11z/rPp3f1U8mFCbximpByYQR//9+dZEtHU9l6xTsH4GuyFqS00nBLQgdxhawi 20eisyuGj/AXWKpvqUyH0/KuQQVASMPL/rUhceSAzPs9El7C1Qs3eUGQ+XF9+g1QmaSDTztNcIu A1L9R4QCgUtfNtHDaGq+AZ3DbKajCxH1lG02+t+RNifOQSDRMA28vcgrAykwjm/yX9Dd1oazx1E YpXSJzRdbFmiX88xFqjsa0D5bM+jMO1wT0vh0ZstZOmZYh1jCIs8avF4r/ML2EC2naEfeH5f5g/ gs/cK9qlhO3xi17S8abiLWPT2giDpyS/DRoDCRengFPrLIXWdGtNPSDrDW6J/q9ZQG3aChOnFG5 bZ0yeAdKB7qsXECFZ2irXhoWxlx8tdNH2gZnRrQ== X-Received: by 2002:a4a:e84b:0:b0:6ac:b1ae:6ce3 with SMTP id 006d021491bc7-6b1c66f1945mr24425031eaf.32.1788185431066; Mon, 31 Aug 2026 07:10:31 -0700 (PDT) X-Received: by 2002:a4a:e84b:0:b0:6ac:b1ae:6ce3 with SMTP id 006d021491bc7-6b1c66f1945mr24424957eaf.32.1788185430616; Mon, 31 Aug 2026 07:10:30 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, chao.liu@processmission.com, Chao Liu , Daniel Henrique Barboza , Tao Tang , Palmer Dabbelt Subject: [PATCH v7 6/7] target/riscv: add sdtrig trigger action=debug mode Date: Mon, 31 Aug 2026 11:10:05 -0300 Message-ID: <20260831141007.353854-7-daniel.barboza@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831141007.353854-1-daniel.barboza@oss.qualcomm.com> References: <20260831141007.353854-1-daniel.barboza@oss.qualcomm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: 4u4yCdtJfokmYCIYHWkRjwNIE6O5sWaM X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDEyMiBTYWx0ZWRfXyYMokBTvEE5o 9B4IGkXbLL0EBYZ7WhrWMpzPBIdE5bE79E7z21tFYjbHQOIuP5/iFGkHlcP1dccuycFFIatnRpD BKVKor3Be+l3HgxMjEQ6x13XnKHIrsQBEi83wi/R0SshXa3o17qevzCWYltsfz00cBjGmspp69X 0Odc27Ymr9VqBKjMoHvHDPN48vJXASyuy00ix94hY+fwK2tou3fzqHDxZcYZy8uJod5nDyWAJOX SZt5a06NRM1PagOMZNgHDSo0OaicB0yADVgC0H0JwvAu0zkecFBYW/nA7sNbEBAKlIXy6FK13w/ XALvTqqvS45iGQ6IUjyNHwygw8DIqedsnS3xRgRzki66UJT4e9AXW6C4OSGyHcOpLJOIVxNeJEv +ns82pDa7mKg9SwmyQpg0B/RMAFUb0BQ8jduLV1AyBlRqjGFFXHOXonEiQtQlzzgtaFgCbe/aGy 6dbB1E/WzTpZsbGdEXg== X-Proofpoint-GUID: 4u4yCdtJfokmYCIYHWkRjwNIE6O5sWaM X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDEyMiBTYWx0ZWRfX9V9gQo6f2h/y LWzRoCnDtLNNaMFpvtHY4KVPhTUo69HNk23KlgB+PKNPFN1OXyde9zGgDH0cE16tMQcd3fVsKl4 UwkGFhll1lhOUktxxdBcOa6VAe99yvc= X-Authority-Analysis: v=2.4 cv=GbQnWwXL c=1 sm=1 tr=0 ts=6a958b57 cx=c_pps a=lkkFf9KBb43tY3aOjL++dA==:117 a=CXdxNCAnTuDr1kYd6DjE4g==:17 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=xvfqbYfxAAAA:20 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=fgrLqfBXAAAA:8 a=jq8im54kr7_wP6Zmv5cA:9 a=k4UEASGLJojhI9HsvVT1:22 a=_Ge82aPy-h_wFa7gWU4u:22 a=bA3UWDv6hWIuX7UZL3qL:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_04,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 priorityscore=1501 adultscore=0 malwarescore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310122 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=daniel.barboza@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1788185468011154100 Content-Type: text/plain; charset="utf-8" From: Chao Liu RISC-V Debug Specification: https://github.com/riscv/riscv-debug-spec/releases/tag/1.0 Allow mcontrol/mcontrol6 action=3D1 when Sdext is enabled. When such a trigger hits, enter Debug Mode with cause=3Dtrigger and stop with EXCP_DEBUG. Also report inst-count triggers in tinfo and read their action field. Signed-off-by: Chao Liu Reviewed-by: Daniel Henrique Barboza Tested-by: Tao Tang --- target/riscv/tcg/debug.c | 54 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 52 insertions(+), 2 deletions(-) diff --git a/target/riscv/tcg/debug.c b/target/riscv/tcg/debug.c index 5ab69bdc8e..44399a5d53 100644 --- a/target/riscv/tcg/debug.c +++ b/target/riscv/tcg/debug.c @@ -34,6 +34,7 @@ #include "exec/watchpoint.h" #include "system/cpu-timers.h" #include "exec/icount.h" +#include "accel/tcg/cpu-loop.h" =20 /* * The following M-mode trigger CSRs are implemented: @@ -117,6 +118,8 @@ static trigger_action_t get_trigger_action(CPURISCVStat= e *env, action =3D (tdata1 & TYPE6_ACTION) >> 12; break; case TRIGGER_TYPE_INST_CNT: + action =3D tdata1 & ITRIGGER_ACTION; + break; case TRIGGER_TYPE_INT: case TRIGGER_TYPE_EXCP: case TRIGGER_TYPE_EXT_SRC: @@ -287,6 +290,7 @@ static target_ulong textra_validate(CPURISCVState *env,= target_ulong tdata3) =20 static void do_trigger_action(CPURISCVState *env, target_ulong trigger_ind= ex) { + CPUState *cs =3D env_cpu(env); trigger_action_t action =3D get_trigger_action(env, trigger_index); =20 switch (action) { @@ -296,6 +300,21 @@ static void do_trigger_action(CPURISCVState *env, targ= et_ulong trigger_index) riscv_raise_exception(env, RISCV_EXCP_BREAKPOINT, 0); break; case DBG_ACTION_DBG_MODE: + if (!env_archcpu(env)->cfg.ext_sdext) { + qemu_log_mask(LOG_GUEST_ERROR, + "trigger action=3Ddebug mode requires Sdext\n"); + riscv_raise_exception(env, RISCV_EXCP_BREAKPOINT, 0); + } + riscv_cpu_enter_debug_mode(env, env->pc, DCSR_CAUSE_TRIGGER); + /* + * If this came from the Trigger Module's CPU breakpoint/watchpoin= t, + * we're already returning via EXCP_DEBUG. Otherwise, stop now. + */ + if (cs->exception_index !=3D EXCP_DEBUG) { + cs->exception_index =3D EXCP_DEBUG; + cpu_loop_exit_restore(cs, GETPC()); + } + break; case DBG_ACTION_TRACE0: case DBG_ACTION_TRACE1: case DBG_ACTION_TRACE2: @@ -448,6 +467,7 @@ static target_ulong type2_mcontrol_validate(CPURISCVSta= te *env, { target_ulong val; uint32_t size; + uint32_t action; =20 /* validate the generic part first */ val =3D tdata1_validate(env, ctrl, TRIGGER_TYPE_AD_MATCH); @@ -455,11 +475,25 @@ static target_ulong type2_mcontrol_validate(CPURISCVS= tate *env, /* validate unimplemented (always zero) bits */ warn_always_zero_bit(ctrl, TYPE2_MATCH, "match"); warn_always_zero_bit(ctrl, TYPE2_CHAIN, "chain"); - warn_always_zero_bit(ctrl, TYPE2_ACTION, "action"); warn_always_zero_bit(ctrl, TYPE2_TIMING, "timing"); warn_always_zero_bit(ctrl, TYPE2_SELECT, "select"); warn_always_zero_bit(ctrl, TYPE2_HIT, "hit"); =20 + action =3D (ctrl & TYPE2_ACTION) >> 12; + if (action =3D=3D DBG_ACTION_BP) { + val |=3D ctrl & TYPE2_ACTION; + } else if (action =3D=3D DBG_ACTION_DBG_MODE) { + if (env_archcpu(env)->cfg.ext_sdext) { + val |=3D ctrl & TYPE2_ACTION; + } else { + qemu_log_mask(LOG_GUEST_ERROR, + "trigger action=3Ddebug mode requires Sdext\n"); + } + } else { + qemu_log_mask(LOG_UNIMP, "trigger action: %u is not supported\n", + action); + } + /* validate size encoding */ size =3D type2_breakpoint_size(env, ctrl); if (access_size[size] =3D=3D -1) { @@ -576,6 +610,7 @@ static target_ulong type6_mcontrol6_validate(CPURISCVSt= ate *env, { target_ulong val; uint32_t size; + uint32_t action; =20 /* validate the generic part first */ val =3D tdata1_validate(env, ctrl, TRIGGER_TYPE_AD_MATCH6); @@ -583,7 +618,6 @@ static target_ulong type6_mcontrol6_validate(CPURISCVSt= ate *env, /* validate unimplemented (always zero) bits */ warn_always_zero_bit(ctrl, TYPE6_MATCH, "match"); warn_always_zero_bit(ctrl, TYPE6_CHAIN, "chain"); - warn_always_zero_bit(ctrl, TYPE6_ACTION, "action"); warn_always_zero_bit(ctrl, TYPE6_SELECT, "select"); warn_always_zero_bit(ctrl, TYPE6_HIT, "hit"); =20 @@ -593,6 +627,21 @@ static target_ulong type6_mcontrol6_validate(CPURISCVS= tate *env, warn_always_zero_bit(ctrl, TYPE6_TIMING_0_13, "timing"); } =20 + action =3D (ctrl & TYPE6_ACTION) >> 12; + if (action =3D=3D DBG_ACTION_BP) { + val |=3D ctrl & TYPE6_ACTION; + } else if (action =3D=3D DBG_ACTION_DBG_MODE) { + if (env_archcpu(env)->cfg.ext_sdext) { + val |=3D ctrl & TYPE6_ACTION; + } else { + qemu_log_mask(LOG_GUEST_ERROR, + "trigger action=3Ddebug mode requires Sdext\n"); + } + } else { + qemu_log_mask(LOG_UNIMP, "trigger action: %u is not supported\n", + action); + } + /* validate size encoding */ size =3D extract32(ctrl, 16, 4); if (access_size[size] =3D=3D -1) { @@ -958,6 +1007,7 @@ void tdata_csr_write(CPURISCVState *env, int tdata_ind= ex, target_ulong val) target_ulong tinfo_csr_read(CPURISCVState *env) { target_ulong val =3D BIT(TRIGGER_TYPE_AD_MATCH) | + BIT(TRIGGER_TYPE_INST_CNT) | BIT(TRIGGER_TYPE_AD_MATCH6); =20 if (debug_trigger_version_1_0(env)) { --=20 2.43.0 From nobody Sat Sep 26 20:50:56 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1788185486; cv=none; d=zohomail.com; s=zohoarc; b=OaLGRXi30vrkQ6RYevF+4xk9wcdArnpCLp0DLLk0LJz4luAeGnQbWG1dmkvtkLtqAxDyb49ujp0DBPLrZRd11GeidOfN6G0cS9eWAkrkzRFMnVlWKSiwiofuvs/noEQN0dWKe9xLss8EOIHFLGHAa2BlNYPj98vthGRQ3JSiRmI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1788185486; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=7F+h/izz5m8Ql6K/eu+v2vbYtEL3lKlYqdFbJP7M/1o=; b=W7gp+IKpJStcgSjJL4xF+jdJgK0Nx4vxPsxbaYiDK4ioK0zV9mYo7XWp7+zhbqje6t+9WGQoyoFsCLX6ZCjthGtTXVmCfFFQcrjV/HIwb+KWb6kzblWNgg141fHWDFzb+GjIYrMmwldBWCk02x0cSBiFBqvB4WiNasUw8wVd9Fk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1788185486000583.3412115703225; Mon, 31 Aug 2026 07:11:26 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1x12id-000460-HB; Mon, 31 Aug 2026 10:10:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x12ib-00042G-HP for qemu-devel@nongnu.org; Mon, 31 Aug 2026 10:10:37 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x12iZ-0006h7-M2 for qemu-devel@nongnu.org; Mon, 31 Aug 2026 10:10:37 -0400 Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67VBA7gM3517859 for ; Mon, 31 Aug 2026 14:10:34 GMT Received: from mail-oo1-f69.google.com (mail-oo1-f69.google.com [209.85.161.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gd6h919ts-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 31 Aug 2026 14:10:34 +0000 (GMT) Received: by mail-oo1-f69.google.com with SMTP id 006d021491bc7-6b1a3f01d2aso2106782eaf.1 for ; Mon, 31 Aug 2026 07:10:34 -0700 (PDT) Received: from QCOM-UWl2o8bcGT.qualcomm.com ([152.250.131.13]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-468a3535e25sm9886129fac.5.2026.08.31.07.10.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2026 07:10:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=7F+h/izz5m8 Ql6K/eu+v2vbYtEL3lKlYqdFbJP7M/1o=; b=i5u9qQQt68e2TMvjzg4hLgbTOta rS+vMnNUW2Z5aNIUssHm3VylbpHev0WuMkQw9eaugLFSHdGT6rMvtSvSKzhJiewv bjA7wOEKYKpCOs82gnT88HfExI1bvH9QTUnr6enLl9h5SGwfoCzOWyWLJkZUVpga Mth6oyt/W1wbmftvPJI4sYRKP339o0wgvMJ3ixG61VkdAqIRo2QppzC/M0ftqiRy nNnvBXK/EXif204zRcYOym56e7W4kHOQhU61KNbtU5Y5xgFmffUwdugiCBJnxQu6 T/xXmiAjBh7TZDM3WQn1vW2Ey1KnVrHmtCWtqQ8LEy3tOcooTLKJqDc13hg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1788185434; x=1788790234; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=7F+h/izz5m8Ql6K/eu+v2vbYtEL3lKlYqdFbJP7M/1o=; b=UJ8q8afqH/h+bLnZvypGewmPqSfcwVIFt78PvHy9MpDjxPIfgM2ewD3CYv5rw2GECx iNN99DyveOc1UI9d5ogfpaEs1L07D/XWtsGanQQuPIApx3J49E9WUQYr3x6bl0mPttc+ 7YCXZnChuPPCeUQgce1mMdJI/PJ+lkytzWnUIL5DpVLy86D2hXDcdGt8nw5aYBo0iAhv K9A94jSvkp+rwUm/98mpXJKzZL86KqH108aQkbfBtsmLM+spQdiN8lEHbz1C2hO1R4L4 bAOcEmqORGkH7g1VQdw8Rqi6aan5zQnehRiKDDsmybAIhYgqibSvbzApC/fRZ8bgDdPQ ehJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1788185434; x=1788790234; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=7F+h/izz5m8Ql6K/eu+v2vbYtEL3lKlYqdFbJP7M/1o=; b=EcbVufZuPDNvBIk86KHGO4cy1Enb8FFIQMbwC182jrTV+vDEQecFTWfHXSyLxuNoKG CclgQmGfkU+0ZyMvGAWLojvsaynX64oXc8uX4Y4nE544t+NRzzS3H8bo/qBtZsYyydry rVkuK13nz55zsdAhyKu0WhIjuJSubzZ1QTRd7bd22/VZtJi3bbpWkT98I4UfLgHg56ji mAEeDiWYglmL2dQ805D9rYS2r+waxhrviIxlBOztCPzlnyHHn5ez5ahJzQbhMfyD+OFA JMuMXaVDugtF758alHepfg6FnYu1nKxMRZSi40IuYkULAIYbh2WR4Ozqe/J1Ck5qnK02 ob5w== X-Gm-Message-State: AFuF++mlGF5MEPMNv+7vGM0CJZCMVliDBI28x8LFaKj3su9G8xZtGxW3 9As24oqHGHNikahW9sjocg93NjPYv9N3ri8qcJy60Oplgx+26AYytU2xBob1PoHLaVaecVXAoKW zJGnMir0B5Z9Sr8WpCe8GfME23BZ1tobI4plmX27q674ts8jCFxZUWutSYN/78cdsSQ== X-Gm-Gg: AR+sD11/54jPBdyfl7eP7QSuzg4j8w1Rqe/jU+rZUmsUcVPvlCybDUQWD/Oe7ZXdoTm Doyukht71+vBTUa+yn0WkS1l0QXF7Mck4rdj6DB6yPJzR5HgipT664jwu4/zCzkIcCq7cvDgl7M 8HCtRMSbKIfPegDpTi3AX84JsHVXt7eqRCSB9gOoe1ZFVLbCOtLQkNmiWeQAyxOrIPbercbIodi X1T2aNan/UfAdi6GreOMKuoOToyQrUXGsxMEPu8sBgFNTUO/ZdTLbo7KcrVo1byAxWSSZ9dzFmK +I1Jer4d0bjMso2pJKPnOnTq8RQowUaCrcz5Bl2FvQluX5yd/66KqlqEWH9dUwDAx45Z17Norvk HnjgU8VSvkFFaCfVpNKD4mU++BGuOtIxC39j2Jg== X-Received: by 2002:a05:6820:a558:b0:6aa:e573:9ce0 with SMTP id 006d021491bc7-6b1c65fc8cbmr20715921eaf.16.1788185433676; Mon, 31 Aug 2026 07:10:33 -0700 (PDT) X-Received: by 2002:a05:6820:a558:b0:6aa:e573:9ce0 with SMTP id 006d021491bc7-6b1c65fc8cbmr20715861eaf.16.1788185433185; Mon, 31 Aug 2026 07:10:33 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, chao.liu@processmission.com, Daniel Henrique Barboza , Palmer Dabbelt Subject: [PATCH v7 7/7] tests/tcg/riscv64: add sdext "not on Debug mode" sigill tests Date: Mon, 31 Aug 2026 11:10:06 -0300 Message-ID: <20260831141007.353854-8-daniel.barboza@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831141007.353854-1-daniel.barboza@oss.qualcomm.com> References: <20260831141007.353854-1-daniel.barboza@oss.qualcomm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=W6UIkxWk c=1 sm=1 tr=0 ts=6a958b5a cx=c_pps a=lVi5GcDxkcJcfCmEjVJoaw==:117 a=CXdxNCAnTuDr1kYd6DjE4g==:17 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=FibE5N0eoUlo320SlN0A:9 a=rBiNkAWo9uy_4UTK5NWh:22 X-Proofpoint-ORIG-GUID: qk01jly503QRZpVJ1dPsrx_NnWZ8lxqm X-Proofpoint-GUID: qk01jly503QRZpVJ1dPsrx_NnWZ8lxqm X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDEyMiBTYWx0ZWRfXzLN+GmgepPGD jHal2wv0i44yYmFjy8SXkiHQAqvh3UJKmxfVlm4gaFUocNgwK4E8UQ6eRUa8G2nPy/JqsaTEXgt FjXmNDJNhdWxuq1RI/A9E+03VZmoOAk= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDEyMiBTYWx0ZWRfXxD6Hqs+KdrN5 BRzSn07XA96ne5bQ75KJBlKd6VOqayAgTs9gkHdzSAJ6x6vn1NMqwMq9dIjmq+fyH9ZboI4STN1 0JmkOA1EnXRXhqq3kIWwxGkwwyag3n0OuiKDxQfCMXa48u9Q2S+a2N/mmXhXHfbl0UBCSrDHxqt qgedWuLcd5lFP+jQJeoFBpKl5YKIqMzSPnt8ErPdQTcAEZbH3wsZZw6JwJevk6VxFdz4Nph9QHg mVaTKgGG1+kfrbhAfkjEcnb8XA500XpHE3YywIFT+voWmL8dBVfydxSHI399C/owgUbSwJcuONP CdjS+64ADu17pAS2y2okfVKcI9jzcMiw4Id6pr/vtuordU+Ant+yiVPjbuEFspRjM/XH6KJu7MK MmBebD2pe1JKHehVCluaKupWKwQ91FBb9q3QglXBSH3x5xgFO0+I/pQtWqC08Y2qfKXqwtuXmLC 7Potms1IVV+htp85LTA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_04,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 malwarescore=0 suspectscore=0 bulkscore=0 clxscore=1015 phishscore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310122 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=daniel.barboza@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1788185487247158500 Content-Type: text/plain; charset="utf-8" Adding proper TCG automated tests to sdext CSRs requires enabling gdbstub support for riscv64, which we don't have, since the nature of the CSRs added is that they run in a higher privilege than M mode. DCSR has bits to allow for context switching from other modes to Debug mode, but those bits must be set via an external entity (e.g. gdb) beforehand. What we can do for now is a "negative" TCG test to ensure that we'll throw illegal insn traps when trying to write sdext CSRs in machine mode. Signed-off-by: Daniel Henrique Barboza --- tests/tcg/riscv64/Makefile.softmmu-target | 5 ++ tests/tcg/riscv64/test-sdext-sigill.S | 83 +++++++++++++++++++++++ 2 files changed, 88 insertions(+) create mode 100644 tests/tcg/riscv64/test-sdext-sigill.S diff --git a/tests/tcg/riscv64/Makefile.softmmu-target b/tests/tcg/riscv64/= Makefile.softmmu-target index 6a219c306c..acfa7981ec 100644 --- a/tests/tcg/riscv64/Makefile.softmmu-target +++ b/tests/tcg/riscv64/Makefile.softmmu-target @@ -71,5 +71,10 @@ EXTRA_RUNS +=3D run-test-misa-w run-test-misa-w: test-misa-w $(call run-test, $<, $(QEMU) -cpu rv64$(comma)x-misa-w=3Dtrue$(comma)c=3D= true$(comma)v=3Dtrue $(QEMU_OPTS)$<) =20 +EXTRA_RUNS +=3D run-test-sdext-sigill +SDEXT_CPU =3D rv64$(comma)sdtrig=3Dtrue$(comma)sdext=3Dtrue +run-test-sdext-sigill: test-sdext-sigill + $(call run-test, $<, $(QEMU) -cpu $(SDEXT_CPU) $(QEMU_OPTS)$<) + # We don't currently support the multiarch system tests undefine MULTIARCH_TESTS diff --git a/tests/tcg/riscv64/test-sdext-sigill.S b/tests/tcg/riscv64/test= -sdext-sigill.S new file mode 100644 index 0000000000..80a6c06465 --- /dev/null +++ b/tests/tcg/riscv64/test-sdext-sigill.S @@ -0,0 +1,83 @@ +/* + * RISC-V sdext extension "SIGILL" test: check if sdext CSRs + * and 'dret' will throw SIGILLs outside of Debug Mode. + * + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +.equ CSR_DCSR, 0x7b0 +.equ CSR_DPC, 0x7b1 +.equ CSR_DSCRATCH0, 0x7b2 + + .option norvc + .text + + .global _start + +_start: + la t0, trap_handler + csrw mtvec, t0 + + dret + j _fail + + li t0, 1 + csrw CSR_DPC, t0 + j _fail + + li t0, 1 + csrw CSR_DSCRATCH0, t0 + j _fail + + li t0, 1 + csrw CSR_DCSR, t0 + j _fail + + li a0, 0 + j _exit + +_fail: + li a0, 1 + +/* Exit through the semihosting SYS_EXIT_EXTENDED call with a0 as the code= . */ +_exit: + la a1, semiargs + li t0, 0x20026 /* ADP_Stopped_ApplicationExit */ + sd t0, 0(a1) + sd a0, 8(a1) + li a0, 0x20 /* TARGET_SYS_EXIT_EXTENDED */ + .balign 16 + slli zero, zero, 0x1f + ebreak + srai zero, zero, 0x7 + j . + + + .balign 4 +trap_handler: + csrr t4, mcause + la t5, trap_mcause + sd t4, 0(t5) + csrr t4, mtval + la t5, trap_mtval + sd t4, 0(t5) + csrr t4, mepc + + /* + * Skip 2 insns (8 increment in mepc) to skip both the + * insn that caused the trap and the "j _fail" insn + * that follows it. + */ + addi t4, t4, 8 + csrw mepc, t4 + mret + + .data + .balign 8 +semiargs: + .space 16 +trap_mcause: + .space 8 +trap_mtval: + .space 8 --=20 2.43.0