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Tue, 25 Aug 2026 23:35:39 -0400 Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Aug 2026 20:35:31 -0700 Received: from d404e69c8b80.jf.intel.com ([10.54.34.91]) by orviesa002.jf.intel.com with ESMTP; 25 Aug 2026 20:35:31 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1787715338; x=1819251338; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mKgfwYnh3Nxsc7j3MuW13LeqbxyzE/A3vdhb9NnzUFI=; b=V9tkyCuLbZdxPA42f2TK4OuFn3+g9xp8mO4yMEO2CqchPfbd9MT/SsOQ sUhYbH4ZccYWCsDBej0lxC9XAUfWwQOiSdYiJbtrh62TkXiHH4SJi7G3d Z9OdClv7Rl+yhAmmcdRo/Yi1JTv+RdejVfCXrzlYFb2PjSxKeLqA0LFaM hrR+gOFKMzF698nsvWJTCrpmRE2Khva1bmAIqDCtHYsdfwmJEUrl/F32r nwKmRyfqkTXFQqAL8VBVnlRi7BymMDnnTMaHDKj27Jq6fSxQGRVjoUEuQ ghIkPExFBmtKygI+lUT1PqGf7U0b73TEF76E5TeUFukf7UGUkv13XAp/D A==; X-CSE-ConnectionGUID: GKaSlIJTT06HPwZFQSdMdQ== X-CSE-MsgGUID: XVkJ09AFTjyOobt2GojHCg== X-IronPort-AV: E=McAfee;i="6800,10657,11886"; a="75728374" X-IronPort-AV: E=Sophos;i="6.25,244,1779174000"; d="scan'208";a="75728374" X-CSE-ConnectionGUID: Zouley78REiWurQpir744w== X-CSE-MsgGUID: +b4IBeoWQXm0LteFefmUYg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,244,1779174000"; d="scan'208";a="297364011" From: Kishen Maloor To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, zhao1.liu@intel.com, kvm@vger.kernel.org, sohil.mehta@intel.com, xiaoyao.li@intel.com, binbin.wu@linux.intel.com, farrah.chen@intel.com, kishen.maloor@intel.com Subject: [PATCH 1/5] target/i386: Add support for LASS in CPUID enumeration Date: Tue, 25 Aug 2026 20:57:30 -0700 Message-ID: <20260826035734.114685-2-kishen.maloor@intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20260826035734.114685-1-kishen.maloor@intel.com> References: <20260826035734.114685-1-kishen.maloor@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=192.198.163.16; envelope-from=kishen.maloor@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1787715376121158500 Content-Type: text/plain; charset="utf-8" From: Isaku Yamahata Linear Address Space Separation (LASS) is a security feature that prevents a class of side-channel attacks relying on speculative accesses across the user/kernel boundary. Paging, along with SMEP and SMAP, already provides mode-based access protection, but enforcing it requires a page walk whose timing can leak the layout of kernel memory. LASS applies the equivalent protections during linear-address pre-processing, before any page walk. Given the usual partitioning of the linear address space into a user half (bit 63 clear) and a supervisor half (bit 63 set), an access targeting the opposite half is rejected on the basis of bit 63 alone, raising a #GP. LASS is enabled via CR4.LASS[bit 27] and applies only in IA-32e mode. Feature bit: CPUID.(EAX=3D7,ECX=3D1):EAX[6] A CPUID_7_1_EAX_LASS macro was previously added in commit 31df29c532a9 ("i386/tdx: Add supported CPUID bits related to TD Attributes"), but the bit was left unnamed in feature_word_info[FEAT_7_1_EAX]. Add the "lass" feature name to expose it via -cpu host, -cpu max, or an explicit +lass. Exposing LASS to a guest also requires KVM support: KVM must validate the CPUID bit and CR4.LASS, and enforce LASS violations in its instruction emulator. LASS is not implemented in TCG, so the bit is not added to TCG_7_1_EAX_FEATURES. More details can be found in the Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A, Section 4.3, "Linear-Address-Space Separation (LASS)". Signed-off-by: Isaku Yamahata [kishen: rewrote commit message, rebased] Signed-off-by: Kishen Maloor Acked-by: Sohil Mehta Reviewed-by: Binbin Wu Reviewed-by: Zhao Liu Tested-by: Farrah Chen --- KVM support for LASS is currently under review: https://lore.kernel.org/kvm/20260806011536.4172258-1-sohil.mehta@intel.com/ target/i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 5805d33ab9..5496e9475b 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1243,7 +1243,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] =3D { .type =3D CPUID_FEATURE_WORD, .feat_names =3D { "sha512", "sm3", "sm4", NULL, - "avx-vnni", "avx512-bf16", NULL, "cmpccxadd", + "avx-vnni", "avx512-bf16", "lass", "cmpccxadd", NULL, NULL, "fzrm", "fsrs", "fsrc", NULL, NULL, NULL, NULL, "fred", "lkgs", "wrmsrns", --=20 2.47.1 From nobody Sat Sep 26 21:37:17 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; 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Tue, 25 Aug 2026 23:35:41 -0400 Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Aug 2026 20:35:31 -0700 Received: from d404e69c8b80.jf.intel.com ([10.54.34.91]) by orviesa002.jf.intel.com with ESMTP; 25 Aug 2026 20:35:31 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1787715339; x=1819251339; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=r8OGA1E4Kgzq5lM4GWV1Y2V9ktJQGlzkwRiX5qY63q4=; b=afIdmBBDrcjeBEO1lA4APcPT3x78slxBEu3p6Hw25vHHV413IRuHorSY 8WaFylgjNsfYitDYAORbuRK+BhNE32xdDywizSZzV+6DAH6WM8epAb1eM QqSov/34mZYX8dVDjw5QrEONHDxpI7BTGg/EpW0T7eVAVjI7Bq0vOeLqv uInN+oHhUauOatPg6znpT2o6fWX4+8UFYcaWSWw/4v6LdRhIy3rkeWe23 g63DWugLv+UVP3vrMvvYKLi1crNb/q9yoKSfr3NC7Nm7vAaphemUDsDk6 qbj52kEKtD3D6W7aVNBQsn6sUNAg6DceDdBGKEICN8ls2f24YI3t3iiUL g==; X-CSE-ConnectionGUID: ciAojpdYRParvy/BYZpLfw== X-CSE-MsgGUID: kiShrs1IQYOlJG3WbuGJdA== X-IronPort-AV: E=McAfee;i="6800,10657,11886"; a="75728377" X-IronPort-AV: E=Sophos;i="6.25,244,1779174000"; d="scan'208";a="75728377" X-CSE-ConnectionGUID: VecMJVsPRamcTwE1P4SDxA== X-CSE-MsgGUID: abejyrZwQ+WzXLKojnlnMg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,244,1779174000"; d="scan'208";a="297364014" From: Kishen Maloor To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, zhao1.liu@intel.com, kvm@vger.kernel.org, sohil.mehta@intel.com, xiaoyao.li@intel.com, binbin.wu@linux.intel.com, farrah.chen@intel.com, kishen.maloor@intel.com Subject: [PATCH 2/5] target/i386: Add LASS support in CR4 Date: Tue, 25 Aug 2026 20:57:31 -0700 Message-ID: <20260826035734.114685-3-kishen.maloor@intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20260826035734.114685-1-kishen.maloor@intel.com> References: <20260826035734.114685-1-kishen.maloor@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=192.198.163.16; envelope-from=kishen.maloor@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1787715376090158500 Content-Type: text/plain; charset="utf-8" From: Isaku Yamahata CR4.LASS[bit 27] enables Linear Address Space Separation, and may be set only when CPUID.(EAX=3D7,ECX=3D1):EAX[6] enumerates LASS. Recognize CR4.LASS as a valid bit by adding CR4_LASS_MASK to the known bits, i.e. clearing it from CR4_RESERVED_MASK. Mark it reserved in cr4_reserved_bits() and clear it in cpu_x86_update_cr4() when the guest CPUID does not enumerate LASS. This keeps CR4 handling consistent on paths that reach cpu_x86_update_cr4(), such as gdbstub register writes. LASS is not emulated by TCG, so it is not added to TCG_7_1_EAX_FEATURES and cannot be set under TCG (helper_write_crN() and helper_vmrun() both reject reserved bits via cr4_reserved_bits()). Signed-off-by: Isaku Yamahata [kishen: rewrote commit message, rebased, fixed formatting] Signed-off-by: Kishen Maloor Acked-by: Sohil Mehta Reviewed-by: Binbin Wu Reviewed-by: Zhao Liu Tested-by: Farrah Chen --- target/i386/cpu.h | 7 ++++++- target/i386/helper.c | 4 ++++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index e6a197602d..98c406db32 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -277,6 +277,7 @@ typedef enum X86Seg { #define CR4_PKE_MASK (1U << 22) #define CR4_CET_MASK (1U << 23) #define CR4_PKS_MASK (1U << 24) +#define CR4_LASS_MASK (1U << 27) #define CR4_LAM_SUP_MASK (1U << 28) =20 #ifdef TARGET_X86_64 @@ -293,7 +294,8 @@ typedef enum X86Seg { | CR4_LA57_MASK \ | CR4_FSGSBASE_MASK | CR4_PCIDE_MASK | CR4_OSXSAVE_MASK \ | CR4_SMEP_MASK | CR4_SMAP_MASK | CR4_PKE_MASK | CR4_CET_M= ASK \ - | CR4_PKS_MASK | CR4_LAM_SUP_MASK | CR4_FRED_MASK)) + | CR4_PKS_MASK | CR4_LASS_MASK | CR4_LAM_SUP_MASK \ + | CR4_FRED_MASK)) =20 #define DR6_BD (1 << 13) #define DR6_BS (1 << 14) @@ -3064,6 +3066,9 @@ static inline uint64_t cr4_reserved_bits(CPUX86State = *env) if (!(env->features[FEAT_7_0_ECX] & CPUID_7_0_ECX_PKS)) { reserved_bits |=3D CR4_PKS_MASK; } + if (!(env->features[FEAT_7_1_EAX] & CPUID_7_1_EAX_LASS)) { + reserved_bits |=3D CR4_LASS_MASK; + } if (!(env->features[FEAT_7_1_EAX] & CPUID_7_1_EAX_LAM)) { reserved_bits |=3D CR4_LAM_SUP_MASK; } diff --git a/target/i386/helper.c b/target/i386/helper.c index 6836214162..43cfcfdafe 100644 --- a/target/i386/helper.c +++ b/target/i386/helper.c @@ -229,6 +229,10 @@ void cpu_x86_update_cr4(CPUX86State *env, uint32_t new= _cr4) new_cr4 &=3D ~CR4_PKS_MASK; } =20 + if (!(env->features[FEAT_7_1_EAX] & CPUID_7_1_EAX_LASS)) { + new_cr4 &=3D ~CR4_LASS_MASK; + } + if (!(env->features[FEAT_7_1_EAX] & CPUID_7_1_EAX_LAM)) { new_cr4 &=3D ~CR4_LAM_SUP_MASK; } --=20 2.47.1 From nobody Sat Sep 26 21:37:17 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; 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d="scan'208";a="297364017" From: Kishen Maloor To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, zhao1.liu@intel.com, kvm@vger.kernel.org, sohil.mehta@intel.com, xiaoyao.li@intel.com, binbin.wu@linux.intel.com, farrah.chen@intel.com, kishen.maloor@intel.com Subject: [PATCH 3/5] target/i386: Introduce DiamondRapids-v3 to enable LASS Date: Tue, 25 Aug 2026 20:57:32 -0700 Message-ID: <20260826035734.114685-4-kishen.maloor@intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20260826035734.114685-1-kishen.maloor@intel.com> References: <20260826035734.114685-1-kishen.maloor@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=192.198.163.16; envelope-from=kishen.maloor@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1787715375537158500 Content-Type: text/plain; charset="utf-8" Add DiamondRapids-v3 to expose Linear Address Space Separation (LASS) on the DiamondRapids CPU model. Signed-off-by: Kishen Maloor Acked-by: Sohil Mehta Reviewed-by: Binbin Wu Reviewed-by: Zhao Liu Tested-by: Farrah Chen --- target/i386/cpu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 5496e9475b..fa6b76be27 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5829,6 +5829,14 @@ static const X86CPUDefinition builtin_x86_defs[] =3D= { { /* end of list */ }, } }, + { + .version =3D 3, + .note =3D "with LASS", + .props =3D (PropValue[]) { + { "lass", "on" }, + { /* end of list */ }, + } + }, { /* end of list */ }, }, }, --=20 2.47.1 From nobody Sat Sep 26 21:37:17 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1787715376; cv=none; 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d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1787715341; x=1819251341; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fIqB/q6xq21Itqsn2ztBWJFiSntXIZKCsqRrTY+RK/U=; b=gwVDuhVJKGKi6xFbB9lLbKfzgR/0JnFy7MqZ5IRyn5ylp7Si5yTqFQfV yARJijTMSRyh7bb3CM9JCxcccJ56XCu1VpTWlCWeSTNcmwe22otqx4H/A cxColtA5xUI2sq0NRbvcPJSlLmkgAZ+xGI6MdUQXwEJdbgEGaOw2sFdiD V3q7kUXKMyKyXKLRTUhJ0sjj7GH7UFlNDYbRyfP2OggXxfdcr+pyuvVj8 XRYfajs8Fhr+9AqaAnQkdq6OifB4mHIuuY/1h44VF5CK5ZUBj6Cl4YHfH uhcLWI/dLyTHOgZCY8/oLB/AgucgQtmGfcGCJHzLbzFVU8HWfmm9rEyIK g==; X-CSE-ConnectionGUID: gVuMImHyT4CSBYz/fztoKQ== X-CSE-MsgGUID: gLH8UiG0RoCkDkbmTS765Q== X-IronPort-AV: E=McAfee;i="6800,10657,11886"; a="75728383" X-IronPort-AV: E=Sophos;i="6.25,244,1779174000"; d="scan'208";a="75728383" X-CSE-ConnectionGUID: V0DeUYCfThqt7OfqTVKgCg== X-CSE-MsgGUID: t4X+5MgxRVuHTSLeJg+vSA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,244,1779174000"; d="scan'208";a="297364020" From: Kishen Maloor To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, zhao1.liu@intel.com, kvm@vger.kernel.org, sohil.mehta@intel.com, xiaoyao.li@intel.com, binbin.wu@linux.intel.com, farrah.chen@intel.com, kishen.maloor@intel.com Subject: [PATCH 4/5] target/i386: Introduce SierraForest-v7 to enable LASS Date: Tue, 25 Aug 2026 20:57:33 -0700 Message-ID: <20260826035734.114685-5-kishen.maloor@intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20260826035734.114685-1-kishen.maloor@intel.com> References: <20260826035734.114685-1-kishen.maloor@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=192.198.163.16; envelope-from=kishen.maloor@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1787715378517158500 Content-Type: text/plain; charset="utf-8" Add SierraForest-v7 to expose Linear Address Space Separation (LASS) on the SierraForest CPU model. Signed-off-by: Kishen Maloor Acked-by: Sohil Mehta Reviewed-by: Binbin Wu Reviewed-by: Zhao Liu Tested-by: Farrah Chen --- target/i386/cpu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index fa6b76be27..167df0e6cb 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6018,6 +6018,14 @@ static const X86CPUDefinition builtin_x86_defs[] =3D= { { /* end of list */ }, } }, + { + .version =3D 7, + .note =3D "with LASS", + .props =3D (PropValue[]) { + { "lass", "on" }, + { /* end of list */ }, + } + }, { /* end of list */ }, }, }, --=20 2.47.1 From nobody Sat Sep 26 21:37:17 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1787715373; cv=none; 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d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1787715341; x=1819251341; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=TL0nsKy/oXqswhT7Lwv1p9BiWBw4zNH45YqxIkGZHLI=; b=n8EllJ5208Q4D6SlL7tB7FEM4MMLUjEIhkupGya2LKrwNaFcfzKjKVus DGnjZD6rBZEb1T9/UgtUtNsqrqLBgBtCV93OgzrvzCD8dpke0CXJkhx1v j/f9phOq8zT+C9/ZiARI+3jBp5ZCd0h81sQHC3EfXO0R3gJ1q+SpHhhLT YMCFyO/raXnvPNfVYIQnr7yRsSyzaIXKHhfhprsHvCljkSBjCN9U4dXnQ deurW0rJ889p6YkzXPtK42WgHebFuz1PHXvv0ZWdKI9Tk3Erjocq12oda bnTaW5hcOh3KpoMmHJknJ8Q59d7liPYYqIzB0I0bjgq3OX3jSff73ePKB Q==; X-CSE-ConnectionGUID: BQtF2ssZSmKW/ypV5SPVNQ== X-CSE-MsgGUID: dzZvjGy+QZe6qQsNdOOXJA== X-IronPort-AV: E=McAfee;i="6800,10657,11886"; a="75728386" X-IronPort-AV: E=Sophos;i="6.25,244,1779174000"; d="scan'208";a="75728386" X-CSE-ConnectionGUID: YLyEMtjBQXCxoqDPF67y4w== X-CSE-MsgGUID: IwedR1tATYm2ie0NB50pbQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,244,1779174000"; d="scan'208";a="297364024" From: Kishen Maloor To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, zhao1.liu@intel.com, kvm@vger.kernel.org, sohil.mehta@intel.com, xiaoyao.li@intel.com, binbin.wu@linux.intel.com, farrah.chen@intel.com, kishen.maloor@intel.com Subject: [PATCH 5/5] target/i386: Introduce ClearwaterForest-v5 to enable LASS Date: Tue, 25 Aug 2026 20:57:34 -0700 Message-ID: <20260826035734.114685-6-kishen.maloor@intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20260826035734.114685-1-kishen.maloor@intel.com> References: <20260826035734.114685-1-kishen.maloor@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=192.198.163.16; envelope-from=kishen.maloor@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1787715376070158500 Content-Type: text/plain; charset="utf-8" Add ClearwaterForest-v5 to expose Linear Address Space Separation (LASS) on the ClearwaterForest CPU model. Signed-off-by: Kishen Maloor Acked-by: Sohil Mehta Reviewed-by: Binbin Wu Reviewed-by: Zhao Liu Tested-by: Farrah Chen --- target/i386/cpu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 167df0e6cb..1c333c2780 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6190,6 +6190,14 @@ static const X86CPUDefinition builtin_x86_defs[] =3D= { { /* end of list */ }, } }, + { + .version =3D 5, + .note =3D "with LASS", + .props =3D (PropValue[]) { + { "lass", "on" }, + { /* end of list */ }, + } + }, { /* end of list */ }, }, }, --=20 2.47.1